Commit Graph

2605 Commits

Author SHA1 Message Date
Jacob Pratt
fa2edee758
Rollup merge of #133446 - Zalathar:querify, r=cjgillot
coverage: Use a query to identify which counter/expression IDs are used

Given that we already have a query to identify the highest-numbered counter ID in a MIR body, we can extend that query to also build bitsets of used counter/expression IDs. That lets us avoid some messy coverage bookkeeping during the main MIR traversal for codegen.

This does mean that we fail to treat some IDs as used in certain MIR-inlining scenarios, but I think that's fine, because it means that the results will be consistent across all instantiations of a function.

---

There's some more cleanup I want to do in the function coverage collector, since it isn't really collecting anything any more, but I'll leave that for future work.
2024-12-01 21:38:25 -05:00
bors
8ac313bdbe Auto merge of #133499 - nikic:no-backend-verify, r=Mark-Simulacrum
Respect verify-llvm-ir option in the backend

We are currently unconditionally verifying the LLVM IR in the backend (twice), ignoring the value of the verify-llvm-ir option. This has substantial compile-time impact for debug builds.
2024-12-01 04:54:02 +00:00
许杰友 Jieyou Xu (Joe)
1aa01927d3
Rollup merge of #131551 - taiki-e:ppc-asm-vreg-inout, r=Amanieu
Support input/output in vector registers of PowerPC inline assembly

This extends currently clobber-only vector registers (`vreg`) support to allow passing `#[repr(simd)]` types as input/output.

| Architecture | Register class | Target feature | Allowed types |
| ------------ | -------------- | -------------- | -------------- |
| PowerPC      | `vreg` | `altivec` | `i8x16`, `i16x8`, `i32x4`, `f32x4` |
| PowerPC      | `vreg` | `vsx` | `f32`, `f64`, `i64x2`, `f64x2` |

In addition to floats and `core::simd` types listed above, `core::arch` types and custom `#[repr(simd)]` types of the same size and type are also allowed. All allowed types and relevant target features are currently unstable.

r? `@Amanieu`

`@rustbot` label +O-PowerPC +A-inline-assembly
2024-11-30 12:57:32 +08:00
Zalathar
6fc0fe76e8 coverage: Use a query to identify which counter/expression IDs are used 2024-11-30 00:58:48 +11:00
Zalathar
121a17ccc3 coverage: All counter terms in an unused function are zero
This is currently handled automatically by the fact that codegen doesn't visit
coverage statements in unused functions, but that will no longer be the case
when unused IDs are identified by a separate query instead.
2024-11-30 00:54:53 +11:00
Zalathar
58e122fef8 coverage: Hoist and explain the check for coverage_cx 2024-11-30 00:54:53 +11:00
Zalathar
3f65114ffc coverage: Rename CrateCoverageContext to CguCoverageContext
This context is stored in `CodegenCx`, which makes it per-CGU rather than
per-crate. A single crate can have multiple CGUs.
2024-11-30 00:54:53 +11:00
Zalathar
9461f4296f Revert "Rollup merge of #133418 - Zalathar:spans, r=jieyouxu"
This reverts commit adf9b5fcd1, reversing
changes made to af1ca153d4.

Reverting due to <https://github.com/rust-lang/rust/issues/133606>.
2024-11-29 14:57:01 +11:00
bors
d53f0b1d8e Auto merge of #123244 - Mark-Simulacrum:share-inline-never-generics, r=saethlin
Enable -Zshare-generics for inline(never) functions

This avoids inlining cross-crate generic items when possible that are
already marked inline(never), implying that the author is not intending
for the function to be inlined by callers. As such, having a local copy
may make it easier for LLVM to optimize but mostly just adds to binary
bloat and codegen time. In practice our benchmarks indicate this is
indeed a win for larger compilations, where the extra cost in dynamic
linking to these symbols is diminished compared to the advantages in
fewer copies that need optimizing in each binary.

It might also make sense it expand this with other heuristics (e.g.,
`#[cold]`) in the future, but this seems like a good starting point.

FWIW, I expect that doing cleanup in where we make the decision
what should/shouldn't be shared is also a good idea. Way too
much code needed to be tweaked to check this. But I'm hoping
to leave that for a follow-up PR rather than blocking this on it.
2024-11-28 21:44:34 +00:00
Mark Rousskov
4a216a25d1 Share inline(never) generics across crates
This reduces code sizes and better respects programmer intent when
marking inline(never). Previously such a marking was essentially ignored
for generic functions, as we'd still inline them in remote crates.
2024-11-28 13:43:05 -05:00
Taiki Endo
df8feb5067 Support floats in input/output in vector registers of PowerPC inline assembly 2024-11-29 03:10:07 +09:00
Taiki Endo
0f8ebba54a Support #[repr(simd)] types in input/output of PowerPC inline assembly 2024-11-29 00:24:36 +09:00
Guillaume Gomez
470c4f94e8
Rollup merge of #133452 - taiki-e:hexagon-asm-pred, r=Amanieu
Support predicate registers (clobber-only) in Hexagon inline assembly

The result of the Hexagon instructions such as comparison, store conditional, etc. is stored in predicate registers (`p[0-3]`), but currently there is no way to mark it as clobbered in `asm!`.

This is also needed for `clobber_abi` (although implementing `clobber_abi` will require the addition of support for [several more register classes](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp#L71-L90). see also https://github.com/rust-lang/rust/issues/93335#issuecomment-2395210055).

Refs:
- [Section 6 "Conditional Execution" in Qualcomm Hexagon V73 Programmer’s Reference Manual](https://docs.qualcomm.com/bundle/publicresource/80-N2040-53_REV_AB_Qualcomm_Hexagon_V73_Programmers_Reference_Manual.pdf#page=90)
- [Register definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/Hexagon/HexagonRegisterInfo.td#L155)

cc `@androm3da` (target maintainer of hexagon-unknown-{[none-elf](https://doc.rust-lang.org/nightly/rustc/platform-support/hexagon-unknown-none-elf.html#target-maintainers),[linux-musl](https://doc.rust-lang.org/nightly/rustc/platform-support/hexagon-unknown-linux-musl.html#target-maintainers)})

r? `@Amanieu`

`@rustbot` label +A-inline-assembly
(Currently there is no O-hexagon label...)
2024-11-28 12:06:02 +01:00
Matthias Krüger
adf9b5fcd1
Rollup merge of #133418 - Zalathar:spans, r=jieyouxu
coverage: Store coverage source regions as `Span` until codegen

Historically, coverage spans were converted into line/column coordinates during the MIR instrumentation pass.

This PR moves that conversion step into codegen, so that coverage spans spend most of their time stored as `Span` instead.

In addition to being conceptually nicer, this also reduces the size of coverage mappings in MIR, because `Span` is smaller than 4x u32.

---

There should be no changes to coverage output.
2024-11-27 22:23:25 +01:00
Nikita Popov
d3ad000943 Respect verify-llvm-ir option in the backend
We are currently unconditionally verifying the LLVM IR in the
backend (twice), ignoring the value of the verify-llvm-ir option.
2024-11-26 15:26:03 +01:00
beetrees
68227a3777
Pass end position of span through inline ASM cookie 2024-11-26 13:00:08 +00:00
Taiki Endo
59f01cdbf4 Support predicate registers (clobber-only) in Hexagon inline assembly 2024-11-25 23:11:17 +09:00
Matthias Krüger
3f86eddf83
Rollup merge of #131664 - taiki-e:s390x-asm-vreg-inout, r=Amanieu
Support input/output in vector registers of s390x inline assembly (under asm_experimental_reg feature)

This extends currently clobber-only vector registers (`vreg`) support to allow passing `#[repr(simd)]` types, floats (f32/f64/f128), and integers (i32/i64/i128) as input/output.

This is unstable and gated under new `#![feature(asm_experimental_reg)]` (tracking issue: https://github.com/rust-lang/rust/issues/133416). If the feature is not enabled, only clober is supported as before.

| Architecture | Register class | Target feature | Allowed types |
| ------------ | -------------- | -------------- | -------------- |
| s390x | `vreg` | `vector` | `i32`, `f32`, `i64`, `f64`, `i128`, `f128`, `i8x16`, `i16x8`, `i32x4`, `i64x2`, `f32x4`, `f64x2` |

This matches the list of types that are supported by the vector registers in LLVM:
https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L301-L313

In addition to `core::simd` types and floats listed above, custom `#[repr(simd)]` types of the same size and type are also allowed. All allowed types other than i32/f32/i64/f64/i128, and relevant target features are currently unstable.

Currently there is no SIMD type for s390x in `core::arch`, but this is tracked in https://github.com/rust-lang/rust/issues/130869.

cc https://github.com/rust-lang/rust/issues/130869 about vector facility support in s390x
cc https://github.com/rust-lang/rust/issues/125398 & https://github.com/rust-lang/rust/issues/116909 about f128 support in asm

`@rustbot` label +O-SystemZ +A-inline-assembly
2024-11-25 07:01:37 +01:00
Matthias Krüger
c5230d1148
Rollup merge of #131523 - nbdd0121:asm, r=compiler-errors
Fix asm goto with outputs and move it to a separate feature gate

Tracking issue: #119364

This PR addresses 3 aspects of asm goto with outputs:
* Codegen is fixed. My initial implementation has an oversight which cause the output to be only stored in fallthrough path, but not in label blocks.
* Outputs can now be used with `options(noreturn)` if a label block is given.
* All of this is moved to a new feature gate, because we likely want to stabilise `asm_goto` before asm goto with outputs.

`@rustbot` labels: +A-inline-assembly +F-asm
2024-11-25 07:01:37 +01:00
许杰友 Jieyou Xu (Joe)
8d20d71256
Rollup merge of #133297 - DianQK:embed-bitcode-ios, r=nikic
Remove legacy bitcode for iOS

Follow #117364.
2024-11-25 00:39:05 +08:00
Gary Guo
73f8309300 Support use of asm goto with outputs and options(noreturn)
When labels are present, the `noreturn` option really means that asm block
won't fallthrough -- if labels are present, then outputs can still be
meaningfully used.
2024-11-24 14:18:10 +00:00
Gary Guo
b8df869ebb Fix asm goto with outputs
When outputs are used together with labels, they are considered
to be written for all destinations, not only when falling through.
2024-11-24 14:18:10 +00:00
Zalathar
2748009aad coverage: Identify source files by ID, not by interned filename 2024-11-24 23:46:41 +11:00
Zalathar
b9fb1a69d2 coverage: Store coverage source regions as Span until codegen 2024-11-24 23:46:39 +11:00
Taiki Endo
c024d8ccdf Make s390x non-clobber-only vector register support unstable 2024-11-24 21:42:22 +09:00
Zalathar
87fe7def12 coverage: Rename some FFI fields from span to cov_span
This will avoid confusion with actual `Span` spans.
2024-11-24 23:29:02 +11:00
Zalathar
619a272612 coverage: Ignore functions that end up having no mappings
A used function with no mappings has historically indicated a bug, but that
will no longer be the case after moving some fallible span-processing steps
into codegen.
2024-11-24 23:28:02 +11:00
DianQK
3a23669787
embed-bitcode is no longer used in iOS 2024-11-24 15:51:47 +08:00
Caleb Zulawski
e73e9f9af2 Add simd_relaxed_fma intrinsic 2024-11-23 14:39:42 -05:00
许杰友 Jieyou Xu (Joe)
c6d36256a6
Rollup merge of #127483 - BertalanD:no_sanitize-global-var, r=rcvalle
Allow disabling ASan instrumentation for globals

AddressSanitizer adds instrumentation to global variables unless the [`no_sanitize_address`](https://llvm.org/docs/LangRef.html#global-attributes) attribute is set on them.

This commit extends the existing `#[no_sanitize(address)]` attribute to set this; previously it only had the desired effect on functions.

(cc https://github.com/rust-lang/rust/issues/39699)
2024-11-23 20:19:51 +08:00
Taiki Endo
2c8f6de1ba Support input/output in vector registers of s390x inline assembly 2024-11-22 04:18:14 +09:00
Kyle Huey
f5b023bd9c When the required discriminator value exceeds LLVM's limits, drop the debug info for the function instead of panicking.
The maximum discriminator value LLVM can currently encode is 2^12. If macro use
results in more than 2^12 calls to the same function attributed to the same
callsite, and those calls are MIR-inlined, we will require more than the maximum
discriminator value to completely represent the debug information. Once we reach
that point drop the debug info instead.
2024-11-19 05:19:09 -08:00
Kyle Huey
1e4ebb0ccd Honor collapse_debuginfo when dealing with MIR-inlined functions inside macros.
The test relies on the fact that inlining more than 2^12 calls at the same
callsite will trigger a panic (and after the following commit, a warning) due to
LLVM limitations but with collapse_debuginfo the callsites should not be the
same.
2024-11-19 05:18:56 -08:00
lcnr
9cba14b95b use TypingEnv when no infcx is available
the behavior of the type system not only depends on the current
assumptions, but also the currentnphase of the compiler. This is
mostly necessary as we need to decide whether and how to reveal
opaque types. We track this via the `TypingMode`.
2024-11-18 10:38:56 +01:00
Jiri Bobek
777003ae9f Likely unlikely fix 2024-11-17 21:49:10 +01:00
bors
3bc6916f4c Auto merge of #132965 - mati865:cfguard-gnullvm, r=wesleywiser
allow CFGuard on windows-gnullvm

No unit tests because of https://github.com/rust-lang/rust/issues/132278
2024-11-15 00:21:07 +00:00
Matthias Krüger
bd79fe7a94
Rollup merge of #132702 - 1c3t3a:issue-132615, r=rcvalle
CFI: Append debug location to CFI blocks

Currently we're not appending debug locations to the inserted CFI blocks. This shows up in #132615 and #100783. This change fixes that by passing down the debug location to the CFI type-test generation and appending it to the blocks.

Credits also belong to `@jakos-sec` who worked with me on this.
2024-11-12 23:26:41 +01:00
Mateusz Mikuła
811c1db715 allow CFGuard on windows-gnullvm 2024-11-12 01:18:53 +01:00
Matthias Krüger
35225d61f4
Rollup merge of #132820 - bjorn3:default_backend_link_impl, r=jieyouxu
Add a default implementation for CodegenBackend::link

As a side effect this should add raw-dylib support to cg_gcc as the default ArchiveBuilderBuilder that is used implements create_dll_import_lib. I haven't tested if the raw-dylib support actually works however.
2024-11-11 21:58:32 +01:00
Bastian Kersting
c2102259a0 CFI: Append debug location to CFI blocks 2024-11-11 09:17:43 +00:00
bors
71042b4b20 Auto merge of #132880 - RalfJung:implied-features, r=workingjubilee
target_features: explain what exacty 'implied' means here
2024-11-11 09:12:03 +00:00
Ralf Jung
2c7f3badcf target_features: explain what exacty 'implied' means here 2024-11-11 07:33:39 +01:00
Matthias Krüger
b95232dabb
Rollup merge of #132675 - Zalathar:empty-spans, r=jieyouxu
coverage: Restrict empty-span expansion to only cover `{` and `}`

Coverage instrumentation has some tricky code for converting a coverage-relevant `Span` into a set of start/end line/byte-column coordinates that will be embedded in the CGU's coverage metadata.

A big part of this complexity is special code for handling empty spans, which are expanded into non-empty spans (if possible) because LLVM's coverage reporter does not handle empty spans well.

This PR simplifies that code by restricting it to only apply in two specific situations: when the character after the empty span is `{`, or the character before the empty span is `}`.

(As an added benefit, this means that the expanded spans no longer extend awkwardly beyond the end of a physical line, which was common under the previous implementation.)

Along the way, this PR also removes some unhelpful code for dealing with function source code spread across multiple files. Functions currently can't have coverage spans in multiple files, and if that ever changes (e.g. to properly support expansion regions) then this code will need to be completely overhauled anyway.
2024-11-10 17:43:07 +01:00
Zalathar
925dfc8608 coverage: Pass a LocalFileId to CoverageSpan::from_source_region 2024-11-10 11:58:44 +11:00
bjorn3
0a619dbc5d Pass owned CodegenResults to link_binary
After link_binary the temporary files referenced by CodegenResults are
deleted, so calling link_binary again with the same CodegenResults
should not be allowed.
2024-11-09 21:22:00 +00:00
Kyle Huey
1dc106121b Add discriminators to DILocations when multiple functions are inlined into a single point.
LLVM does not expect to ever see multiple dbg_declares for the same variable at the same
location with different values. proc-macros make it possible for arbitrary code,
including multiple calls that get inlined, to happen at any given location in the source
code. Add discriminators when that happens so these locations are different to LLVM.

This may interfere with the AddDiscriminators pass in LLVM, which is added by the
unstable flag -Zdebug-info-for-profiling.

Fixes #131944
2024-11-09 08:01:31 -08:00
bors
80445576d0 Auto merge of #132800 - matthiaskrgr:rollup-c1kkj56, r=matthiaskrgr
Rollup of 5 pull requests

Successful merges:

 - #132552 (Add v9, v8plus, and leoncasa target feature to sparc and use v8plus in create_object_file)
 - #132745 (pointee_info_at: fix logic for recursing into enums)
 - #132777 (try_question_mark_nop: update test for LLVM 20)
 - #132785 (rustc_target: more target string fixes for LLVM 20)
 - #132794 (Use a separate dir for r-a builds consistently in helix config)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-11-09 12:23:47 +00:00
Matthias Krüger
b9d4ef16c9
Rollup merge of #132552 - taiki-e:sparc-target-feature, r=workingjubilee
Add v9, v8plus, and leoncasa target feature to sparc and use v8plus in create_object_file

This adds the following three unstable target features:

- `v9`: SPARC-V9 instructions ([LLVM definition][sparc-v9])
  - Relevant to https://github.com/rust-lang/rust/pull/131222#issuecomment-2453310963
  - Relevant to https://github.com/rust-lang/rust/pull/132472#discussion_r1832606081
  - This is also needed to implement https://github.com/taiki-e/atomic-maybe-uninit/pull/31 (depends on inline assembly support) more robustly.
- `v8plus`: SPARC-V8+ ABI ([LLVM definition][sparc-v8plus])
  - This is added in LLVM 20. In LLVM 19 and older, it is emulated to work the same way as LLVM in each LLVM version.
  - See https://github.com/rust-lang/rust/issues/132585#issuecomment-2453926257 for more.
- `leoncasa`: CASA instruction[^1] of LEON3 and LEON4 processors ([LLVM definition][sparc-leoncasa], LLVM feature name: `hasleoncasa`)
  - This is needed to implement https://github.com/taiki-e/atomic-maybe-uninit/pull/31 (depends on inline assembly support) more robustly.

[^1]: Atomic CAS instruction

[sparc-v9]: f5e4ffaa49/llvm/lib/Target/Sparc/Sparc.td (L37-L39)
[sparc-v8plus]: f5e4ffaa49/llvm/lib/Target/Sparc/Sparc.td (L37-L39)
[sparc-leoncasa]: https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/Sparc/LeonFeatures.td#L32-L37
2024-11-09 10:52:03 +01:00
bors
4b198d6871 Auto merge of #132584 - Zalathar:includes, r=cuviper
Trim and tidy includes in `rustc_llvm`

These includes tend to accumulate over time, and are usually only removed when something breaks in a new LLVM version, so it's nice to clean them up manually once in a while.

General strategy used for this PR:
- Remove all includes from `LLVMWrapper.h` that aren't needed by the header itself, transplanting them to individual source files as necessary.
- For each source file, temporarily remove each include if doing so doesn't cause a compile error.
- If a “required” include looks like it shouldn't be needed, try replacing it with its sub-includes, then trim that list.
- After doing all of the above, go back and re-add any removed include if the file does actually use things defined in that header, even if the header happens to also be included by something else.
2024-11-09 09:46:08 +00:00
Zalathar
89d7efaf8f Make RustString an extern type to avoid improper_ctypes warnings 2024-11-09 11:07:44 +11:00
Taiki Endo
c059eb7750 Add v8plus target feature to sparc and use it in create_object_file 2024-11-09 03:22:09 +09:00
Taiki Endo
400a690b5f Add v9 and leoncasa target feature to sparc 2024-11-09 03:17:24 +09:00
Zalathar
996bdabc2a coverage: Remove unhelpful code for handling multiple files per function
Functions currently can't have mappings in multiple files, and if that ever
changes (e.g. to properly support expansion regions), this code will need to be
completely overhauled anyway.
2024-11-08 20:43:08 +11:00
Zalathar
3f9c54caf0 coverage: Add GlobalFileId for stricter type-checking of file IDs
We already had a dedicated `LocalFileId` index type, but previously we used a
raw `u32` for global file IDs, because index types were harder to pass through
FFI.
2024-11-08 20:43:08 +11:00
Stuart Cook
3a48d80155
Rollup merge of #132590 - Zalathar:z-timings-stats, r=jieyouxu
Simplify FFI calls for `-Ztime-llvm-passes` and `-Zprint-codegen-stats`

The existing code for these unstable LLVM-infodump flags was jumping through hoops to pass an allocated C string across the FFI boundary, when it's much simpler to just write to a `&RustString` instead.
2024-11-08 18:51:30 +11:00
Stuart Cook
758a904764
Rollup merge of #132452 - Zalathar:llvm-cov-wrappers, r=jieyouxu
coverage: Extract safe FFI wrapper functions to `llvm_cov`

This PR takes all of the inline `unsafe` calls in coverage codegen, and all the safe wrapper functions in `coverageinfo/mod.rs`, and moves them to a new `llvm_cov` submodule that is dedicated to safe FFI wrapper functions. This reduces the mixing of abstraction levels in the rest of coverage codegen.

As a follow-up, this PR also tidies up the names and signatures of several of the coverage FFI functions.
2024-11-08 18:51:29 +11:00
Jubilee
97dbab9124
Rollup merge of #132741 - zmodem:mips_data_layout, r=nikic
Update mips64 data layout to match LLVM 20 change

LLVM changed the data layout in https://github.com/llvm/llvm-project/pull/112084
2024-11-07 18:48:26 -08:00
Jubilee
60e8ab6ba8
Rollup merge of #130586 - dpaoliello:fixrawdylib, r=wesleywiser
Set "symbol name" in raw-dylib import libraries to the decorated name

`windows-rs` received a bug report that mixing raw-dylib generated and the Windows SDK import libraries was causing linker failures: <https://github.com/microsoft/windows-rs/issues/3285>

The root cause turned out to be #124958, that is we are not including the decorated name in the import library and so the import name type is also not being correctly set.

This change modifies the generation of import libraries to set the "symbol name" to the fully decorated name and correctly marks the import as being data vs function.

Note that this also required some changes to how the symbol is named within Rust: for MSVC we now need to use the decorated name but for MinGW we still need to use partially decorated (or undecorated) name.

Fixes #124958

Passing i686 MSVC and MinGW build: <https://github.com/rust-lang/rust/actions/runs/11000433888?pr=130586>

r? `@ChrisDenton`
2024-11-07 18:48:20 -08:00
Hans Wennborg
eb7d95bafd remove the extra specification for llvm versions < 20 2024-11-07 20:59:50 +01:00
Taiki Endo
241f82ad91 Basic inline assembly support for SPARC and SPARC64 2024-11-07 21:19:03 +09:00
Matt Weber
8286299742 Clean up use requirements after rebasing 2024-11-06 22:26:18 -05:00
Matt Weber
f9ac7aca5d Add location info for f16 2024-11-06 22:26:18 -05:00
Matt Weber
21c58b1b2c Rename option and add doc 2024-11-06 22:26:18 -05:00
Matt Weber
4692d46a46 Add additional option checks 2024-11-06 22:26:17 -05:00
Matt Weber
a4833a8089 Move additional source location info behind -Z option 2024-11-06 22:26:17 -05:00
Matt Weber
27b1b01daa Refactor type_stub from DefId to tuple 2024-11-06 22:25:04 -05:00
Matt Weber
aa485fc2a1 Add file and line metadata for enum variant and fields 2024-11-06 22:25:04 -05:00
Matt Weber
af6b0deaf3 Add file and line metadata for struct/union members 2024-11-06 22:25:04 -05:00
Matt Weber
c07797a854 Add file and line metadata for coroutines 2024-11-06 22:24:58 -05:00
Matt Weber
f3da828185 Refactor type_map::stub parameters
Push span lookup into `type_map::stub` and pass the `DefId` instead of
doing the lookup outside and passing in the location metadata.
2024-11-06 22:12:03 -05:00
Matt Weber
94669d9d47 Add file and line metadata for closures 2024-11-06 22:12:03 -05:00
Matt Weber
2f00b6affd Require type_map::stub callers to supply file information
This change attaches file information (`DIFile` reference and line
number) to struct debug info nodes.

Before:

```
; foo.ll
...
!5 = !DIFile(filename: "<unknown>", directory: "")
...
!16 = !DICompositeType(tag: DW_TAG_structure_type, name: "MyType", scope: !2, file: !5, size: 32, align: 32, elements: !17, templateParams: !19, identifier: "4cb373851db92e732c4cb5651b886dd0")
...
```

After:

```
; foo.ll
...
!3 = !DIFile(filename: "foo.rs", directory: "/home/matt/src/rust98678", checksumkind: CSK_SHA1, checksum: "bcb9f08512c8f3b8181ef4726012bc6807bc9be4")
...
!16 = !DICompositeType(tag: DW_TAG_structure_type, name: "MyType", scope: !2, file: !3, line: 3, size: 32, align: 32, elements: !17, templateParams: !19, identifier: "9e5968c7af39c148acb253912b7f409f")
...
```

Fixes #98678
2024-11-06 22:12:02 -05:00
bors
a69df72bdc Auto merge of #132664 - matthiaskrgr:rollup-i27nr7i, r=matthiaskrgr
Rollup of 5 pull requests

Successful merges:

 - #131261 (Stabilize `UnsafeCell::from_mut`)
 - #131405 (bootstrap/codegen_ssa: ship llvm-strip and use it for -Cstrip)
 - #132077 (Add a new `wide-arithmetic` feature for WebAssembly)
 - #132562 (Remove the `wasm32-wasi` target from rustc)
 - #132660 (Remove unused errs.rs file)

Failed merges:

 - #131721 (Add new unstable feature `const_eq_ignore_ascii_case`)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-11-06 01:21:42 +00:00
Matthias Krüger
088e698835
Rollup merge of #132077 - alexcrichton:wide-arithmetic, r=jieyouxu
Add a new `wide-arithmetic` feature for WebAssembly

This commit adds a new rustc target feature named `wide-arithmetic` for WebAssembly targets. This corresponds to the [wide-arithmetic] proposal for WebAssembly which adds new instructions catered towards accelerating integer arithmetic larger than 64-bits. This proposal to WebAssembly is not standard yet so this new feature is flagged as an unstable target feature. Additionally Rust's LLVM version doesn't support this new feature yet since support will first be added in LLVM 20, so the feature filtering logic for LLVM is updated to handle this.

I'll also note that I'm not currently planning to add wasm-specific intrinsics to `std::arch::wasm32` at this time. The currently proposed instructions are all accessible through `i128` or `u128`-based operations which Rust already supports, so intrinsic shouldn't be necessary to get access to these new instructions.

[wide-arithmetic]: https://github.com/WebAssembly/wide-arithmetic
2024-11-05 23:43:57 +01:00
Matthias Krüger
c8247c0a19
Rollup merge of #132259 - mrkajetanp:branch-protection-pauth-lr, r=davidtwco
rustc_codegen_llvm: Add a new 'pc' option to branch-protection

Add a new 'pc' option to -Z branch-protection for aarch64 that enables the use of PC as a diversifier in PAC branch protection code.

When the pauth-lr target feature is enabled in combination with -Z branch-protection=pac-ret,pc, the new 9.5-a instructions (pacibsppc, retaasppc, etc) will be generated.
2024-11-05 20:10:49 +01:00
bors
e8c698bb3b Auto merge of #129884 - RalfJung:forbidden-target-features, r=workingjubilee
mark some target features as 'forbidden' so they cannot be (un)set with -Ctarget-feature

The context for this is https://github.com/rust-lang/rust/issues/116344: some target features change the way floats are passed between functions. Changing those target features is unsound as code compiled for the same target may now use different ABIs.

So this introduces a new concept of "forbidden" target features (on top of the existing "stable " and "unstable" categories), and makes it a hard error to (un)set such a target feature. For now, the x86 and ARM feature `soft-float` is on that list. We'll have to make some effort to collect more relevant features, and similar features from other targets, but that can happen after the basic infrastructure for this landed. (These features are being collected in https://github.com/rust-lang/rust/issues/131799.)

I've made this a warning for now to give people some time to speak up if this would break something.

MCP: https://github.com/rust-lang/compiler-team/issues/780
2024-11-05 16:25:45 +00:00
Zalathar
19d5dc0ed1 coverage: Tidy up coverage-specific FFI functions 2024-11-05 15:32:36 +11:00
Zalathar
b790e4473c coverage: Extract safe FFI wrapper functions to llvm_cov 2024-11-05 15:32:34 +11:00
bors
96477c55bc Auto merge of #131341 - taiki-e:ppc-clobber-abi, r=bzEq,workingjubilee
Support clobber_abi and vector registers (clobber-only) in PowerPC inline assembly

This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335.

This basically does a similar thing I did in https://github.com/rust-lang/rust/pull/130630 to implement `clobber_abi` for s390x, but for powerpc/powerpc64/powerpc64le.
- This also supports vector registers (as `vreg`) as clobber-only, which need to support clobbering of them to implement `clobber_abi`.
- `vreg` should be able to accept `#[repr(simd)]` types as input/output if the unstable `altivec` target feature is enabled, but `core::arch::{powerpc,powerpc64}` vector types, `#[repr(simd)]`, and `core::simd` are all unstable, so the fact that this is currently a clobber-only should not be considered a blocker of clobber_abi implementation or stabilization. So I have not implemented it in this PR.
  - See https://github.com/rust-lang/rust/pull/131551 (which is based on this PR) for a PR to implement this.
  - (I'm not sticking to whether that PR should be a separate PR or part of this PR, so I can merge that PR into this PR if needed.)

Refs:
- PPC32 SysV: Section "Function Calling Sequence" in [System V Application Binary Interface PowerPC Processor Supplement](https://refspecs.linuxfoundation.org/elf/elfspec_ppc.pdf)
- PPC64 ELFv1: Section 3.2 "Function Calling Sequence" in [64-bit PowerPC ELF Application Binary Interface Supplement](https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html#FUNC-CALL)
- PPC64 ELFv2: Section 2.2 "Function Calling Sequence" in [64-Bit ELF V2 ABI Specification](https://openpowerfoundation.org/specifications/64bitelfabi/)
- AIX: [Register usage and conventions](https://www.ibm.com/docs/en/aix/7.3?topic=overview-register-usage-conventions), [Special registers in the PowerPC®](https://www.ibm.com/docs/en/aix/7.3?topic=overview-special-registers-in-powerpc), [AIX vector programming](https://www.ibm.com/docs/en/aix/7.3?topic=concepts-aix-vector-programming)
- Register definition in LLVM: https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPCRegisterInfo.td#L189

If I understand the above four ABI documentations correctly, except for the PPC32 SysV's VR (Vector Registers) and 32-bit AIX (currently not supported by rustc)'s r13, there does not appear to be important differences in terms of implementing `clobber_abi`:
- The above four ABIs are consistent about FPR (0-13: volatile, 14-31: nonvolatile), CR (0-1,5-7: volatile, 2-4: nonvolatile), XER (volatile), and CTR (volatile).
- As for GPR, only the registers we are treating as reserved are slightly different
  - r0, r3-r12 are volatile
  - r1(sp, reserved), r14-31 are nonvolatile
  - r2(reserved) is TOC pointer in PPC64 ELF/AIX, system-reserved register in PPC32 SysV (AFAIK used as thread pointer in Linux/BSDs)
  - r13(reserved for non-32-bit-AIX) is thread pointer in PPC64 ELF, small data area pointer register in PPC32 SysV, "reserved under 64-bit environment; not restored across system calls[^r13]" in AIX)
- As for FPSCR, volatile in PPC64 ELFv1/AIX, some fields are volatile only in certain situations (rest are volatile) in PPC32 SysV/PPC64 ELFv2.
- As for VR (Vector Registers), it is not mentioned in PPC32 SysV, v0-v19 are volatile in both in PPC64 ELF/AIX, v20-v31 are nonvolatile in PPC64 ELF, reserved or nonvolatile depending on the ABI ([vec-extabi vs vec-default in LLVM](https://reviews.llvm.org/D89684), we are [using vec-extabi](https://github.com/rust-lang/rust/pull/131341#discussion_r1797693299)) in AIX:
  > When the default Vector enabled mode is used, these registers are reserved and must not be used.
  > In the extended ABI vector enabled mode, these registers are nonvolatile and their values are preserved across function calls

  I left [FIXME comment about PPC32 SysV](https://github.com/rust-lang/rust/pull/131341#discussion_r1790496095) and added ABI check for AIX.
- As for VRSAVE, it is not mentioned in PPC32 SysV, nonvolatile in PPC64 ELFv1, reserved in PPC64 ELFv2/AIX
- As for VSCR, it is not mentioned in PPC32 SysV/PPC64 ELFv1, some fields are volatile only in certain situations (rest are volatile) in PPC64 ELFv2, volatile in AIX

We are currently treating r1-r2, r13 (non-32-bit-AIX), r29-r31, LR, CTR, and VRSAVE as reserved.
We are currently not processing anything about FPSCR and VSCR, but I feel those are things that should be processed by `preserves_flags` rather than `clobber_abi` if we need to do something about them. (However, PPCRegisterInfo.td in LLVM does not seem to define anything about them.)

Replaces #111335 and #124279

cc `@ecnelises` `@bzEq` `@lu-zero`

r? `@Amanieu`

`@rustbot` label +O-PowerPC +A-inline-assembly

[^r13]: callee-saved, according to [LLVM](6a6af0246b/llvm/lib/Target/PowerPC/PPCCallingConv.td (L322)) and [GCC](a9173a50e7/gcc/config/rs6000/rs6000.h (L859)).
2024-11-05 03:13:47 +00:00
Ralf Jung
ffad9aac27 mark some target features as 'forbidden' so they cannot be (un)set
For now, this is just a warning, but should become a hard error in the future
2024-11-04 22:56:47 +01:00
Zalathar
5bfa0b106e Simplify FFI calls for -Ztime-llvm-passes and -Zprint-codegen-stats 2024-11-04 20:31:16 +11:00
Jubilee
7155c65d68
Rollup merge of #132565 - bjorn3:less_target_name_dependence, r=workingjubilee
Reduce dependence on the target name

The target name can be anything with custom target specs. Matching on fields inside the target spec is much more robust than matching on the target name.

Also remove the unused is_builtin target spec field.
2024-11-03 20:08:14 -08:00
Zalathar
44a056a50b Move LLVMRustAttribute[Kind] out of LLVMWrapper.h 2024-11-04 12:27:23 +11:00
Jubilee Young
b895bf4fdc compiler: Directly use rustc_abi in codegen 2024-11-03 12:30:32 -08:00
bjorn3
9e6d2da83d Reduce dependence on the target name
The target name can be anything with custom target specs. Matching on
fields inside the target spec is much more robust than matching on the
target name.
2024-11-03 18:29:01 +00:00
bors
59ae5eba7e Auto merge of #132514 - Zalathar:print-target-cpus, r=jieyouxu
Port most of `--print=target-cpus` to Rust

The logic and formatting needed by `--print=target-cpus` has historically been carried out in C++ code. Originally it used `printf` to write directly to the console, but later it switched over to writing to a `std::ostringstream` and then passing its buffer to a callback function pointer.

This PR replaces that C++ code with a very simple function that writes a list of CPU names to a `&RustString`, with the rest of the logic and formatting being handled by ordinary safe Rust code.
2024-11-03 11:09:38 +00:00
Daniel Bertalan
204b2281fa Allow disabling ASan instrumentation for globals
AddressSanitizer adds instrumentation to global variables unless the
[`no_sanitize_address`](https://llvm.org/docs/LangRef.html#global-attributes)
attribute is set on them.

This commit extends the existing `#[no_sanitize(address)]` attribute to
set this; previously it only had the desired effect on functions.
2024-11-02 22:35:34 +01:00
Noratrieb
a26450cf81 Rename target triple to target tuple in many places in the compiler
This changes the naming to the new naming, used by `--print
target-tuple`.
It does not change all locations, but many.
2024-11-02 21:29:59 +01:00
Zalathar
90f2075b66 Port most of LLVMRustPrintTargetCPUs to Rust 2024-11-02 23:39:29 +11:00
Zalathar
0fa86f9660 Use a dedicated safe wrapper for LLVMRustGetHostCPUName 2024-11-02 23:39:29 +11:00
Taiki Endo
d19517dcd0 Support clobber_abi and vector registers (clobber-only) in PowerPC inline assembly 2024-11-02 20:26:08 +09:00
Matthias Krüger
bb544f863f
Rollup merge of #131037 - madsmtm:move-llvm-target-versioning, r=petrochenkov
Move versioned Apple LLVM targets from `rustc_target` to `rustc_codegen_ssa`

Fully specified LLVM targets contain the OS version on macOS/iOS/tvOS/watchOS/visionOS, and this version depends on the deployment target environment variables like `MACOSX_DEPLOYMENT_TARGET`, `IPHONEOS_DEPLOYMENT_TARGET` etc.

We would like to move this to later in the compilation pipeline, both because it feels impure to access environment variables when fetching target information, but mostly because we need access to more information from https://github.com/rust-lang/rust/pull/130883 to do https://github.com/rust-lang/rust/issues/118204. See also https://github.com/rust-lang/rust/pull/129342#issuecomment-2335156119 for some discussion.

The first and second commit does the actual refactor, it should be a non-functional change, the third commit adds diagnostics for invalid deployment targets, which are now possible to do because we have access to the session.

Tested with the same commands as in https://github.com/rust-lang/rust/pull/130435.

r? ``````@petrochenkov``````
2024-11-02 08:33:10 +01:00
Guillaume Gomez
526c67f37b
Rollup merge of #131829 - Zalathar:goodbye-zprofile, r=chenyukang
Remove support for `-Zprofile` (gcov-style coverage instrumentation)

Tracking issue: #42524

MCP: https://github.com/rust-lang/compiler-team/issues/798

---

This PR removes the unstable `-Zprofile` flag, which enables ”gcov-style” coverage instrumentation, along with its associated `-Zprofile-emit` configuration flag.

(The profile flag predates and is almost entirely separate from the stable `-Cinstrument-coverage` flag.)

Notably, the `-Zprofile` flag:
- Is largely untested in-tree, having only one run-make test that does not check whether its output is correct or useful.
- Has no known maintainer.
- Has seen no push towards stabilization.
- Has at least one severe regression reported in 2022 that apparently remains unaddressed.
  - #100125
- Is confusingly named, since it appears to be more about coverage than performance profiling, and has nothing to do with PGO.
- Is fundamentally limited by relying on counters auto-inserted by LLVM, with no knowledge of Rust beyond debuginfo.
2024-11-02 03:08:49 +08:00
Mads Marquart
e1233153ac Move versioned LLVM target creation to rustc_codegen_ssa
The OS version depends on the deployment target environment variables,
the access of which we want to move to later in the compilation pipeline
that has access to more information, for example `env_depinfo`.
2024-11-01 17:07:18 +01:00
Matthew Maurer
9caced7bad llvm: Match new LLVM 128-bit integer alignment on sparc
LLVM continues to align more 128-bit integers to 128-bits in the data
layout rather than relying on the high level language to do it. Update
SPARC target files to match and add a backcompat replacement for current
LLVMs.

See llvm/llvm-project#106951 for details
2024-10-31 20:37:54 +00:00
Kajetan Puchalski
10edeea4b4 rustc_codegen_llvm: Add a new 'pc' option to branch-protection
Add a new 'pc' option to -Z branch-protection for aarch64 that
enables the use of PC as a diversifier in PAC branch protection code.

When the pauth-lr target feature is enabled in combination
with -Z branch-protection=pac-ret,pc, the new 9.5-a instructions
(pacibsppc, retaasppc, etc) will be generated.
2024-10-31 11:59:17 +00:00
Zalathar
8dddd1ae60 coverage: Avoid ICE when coverage_cx is unexpectedly unavailable 2024-10-31 21:25:43 +11:00
Zalathar
ce3e14a448 Remove support for -Zprofile (gcov-style coverage instrumentation) 2024-10-31 09:09:25 +11:00
Jubilee
847b6fe6b0
Rollup merge of #132246 - workingjubilee:campaign-on-irform, r=compiler-errors
Rename `rustc_abi::Abi` to `BackendRepr`

Remove the confabulation of `rustc_abi::Abi` with what "ABI" actually means by renaming it to `BackendRepr`, and rename `Abi::Aggregate` to `BackendRepr::Memory`. The type never actually represented how things are passed, as that has to have `PassMode` considered, at minimum, but rather it just is how we represented some things to the backend. This conflation arose because LLVM, the primary backend at the time, would lower certain IR forms using certain ABIs. Even that only somewhat was true, as it broke down when one ventured significantly afield of what is described by the System V AMD64 ABI either by using different architectures, ABI-modifying IR annotations, the same architecture **with different ISA extensions enabled**, or other... unexpected delights.

Unfortunately both names are still somewhat of a misnomer right now, as people have written code for years based on this misunderstanding. Still, their original names are even moreso, and for better or worse, this backend code hasn't received as much maintenance as the rest of the compiler, lately. Actually arriving at a correct end-state will simply require us to disentangle a lot of code in order to fix, much of it pointlessly repeated in several places. Thus this is not an "actual fix", just a way to deflect further misunderstandings.
2024-10-30 14:01:37 -07:00
Matthias Krüger
879c4d5ccc
Rollup merge of #132342 - Zalathar:operand-bundle, r=workingjubilee
cg_llvm: Clean up FFI calls for operand bundles

All of these FFI functions have equivalents in the stable LLVM-C API, though `LLVMBuildCallBr` requires a temporary polyfill on LLVM 18.

This PR also creates a clear split between `OperandBundleOwned` and `OperandBundle`, and updates the internals of the owner to be a little less terrifying.
2024-10-30 06:40:38 +01:00
Zalathar
c3071590ab Clean up FFI calls for operand bundles 2024-10-30 13:26:24 +11:00
Zalathar
65ff2a6ad7 Consistently use safe wrapper function set_section 2024-10-30 11:38:20 +11:00
Jubilee Young
7086dd83cc compiler: rustc_abi::Abi => BackendRepr
The initial naming of "Abi" was an awful mistake, conveying wrong ideas
about how psABIs worked and even more about what the enum meant.
It was only meant to represent the way the value would be described to
a codegen backend as it was lowered to that intermediate representation.
It was never meant to mean anything about the actual psABI handling!
The conflation is because LLVM typically will associate a certain form
with a certain ABI, but even that does not hold when the special cases
that actually exist arise, plus the IR annotations that modify the ABI.

Reframe `rustc_abi::Abi` as the `BackendRepr` of the type, and rename
`BackendRepr::Aggregate` as `BackendRepr::Memory`. Unfortunately, due to
the persistent misunderstandings, this too is now incorrect:
- Scattered ABI-relevant code is entangled with BackendRepr
- We do not always pre-compute a correct BackendRepr that reflects how
  we "actually" want this value to be handled, so we leave the backend
  interface to also inject various special-cases here
- In some cases `BackendRepr::Memory` is a "real" aggregate, but in
  others it is in fact using memory, and in some cases it is a scalar!

Our rustc-to-backend lowering code handles this sort of thing right now.
That will eventually be addressed by lifting duplicated lowering code
to either rustc_codegen_ssa or rustc_target as appropriate.
2024-10-29 14:56:00 -07:00
Matthias Krüger
2707cd670c
Rollup merge of #132319 - Zalathar:add-module-flag, r=jieyouxu
cg_llvm: Clean up FFI calls for setting module flags

This is a combination of several inter-related changes to how module flags are set:

- Remove some unnecessary code for setting an `"LTOPostLink"` flag, which has been obsolete since LLVM 17.
- Define our own enum instead of relying on enum values defined by LLVM's unstable C++ API.
- Use safe wrapper functions to set module flags, instead of direct `unsafe` calls.
- Consistently pass pointer/length strings instead of C strings.
- Remove or shrink some `unsafe` blocks.
2024-10-29 18:38:59 +01:00
Zalathar
8d2ed4f0f3 Clean up FFI calls for setting module flags
- Don't rely on enum values defined by LLVM's C++ API
- Use safe wrapper functions instead of direct `unsafe` calls
- Consistently pass pointer/length strings instead of C strings
2024-10-29 21:40:34 +11:00
Zalathar
ba81dbf3c6 Don't set unnecessary module flag "LTOPostLink"
This module flag was an internal detail of LLVM's optimization passes, and all
code involving it was removed in LLVM 17.

<200cc952a2>
2024-10-29 21:17:13 +11:00
Jubilee
a70b90b822
Rollup merge of #132216 - klensy:c_uint, r=cuviper
correct LLVMRustCreateThinLTOData arg types

`LLVMRustCreateThinLTOData` defined in rust as
```rust
    pub fn LLVMRustCreateThinLTOData(
        Modules: *const ThinLTOModule,
        NumModules: c_uint,
        PreservedSymbols: *const *const c_char,
        PreservedSymbolsLen: c_uint,
    ) -> Option<&'static mut ThinLTOData>;
```
but in cpp as
```cpp
extern "C" LLVMRustThinLTOData *
LLVMRustCreateThinLTOData(LLVMRustThinLTOModule *modules, int num_modules,
                          const char **preserved_symbols, int num_symbols) {
```

(note `c_unit` vs `int` types). Let it be actually `size_t`.

Also fixes return type of `LLVMRustDIBuilderCreateOpLLVMFragment` to uint64_t as other similar functions around, which should be correct, i assume.
2024-10-29 03:11:42 -07:00
Jubilee
5d0f52efa4
Rollup merge of #131375 - klensy:clone_on_ref_ptr, r=cjgillot
compiler: apply clippy::clone_on_ref_ptr for CI

Apply lint https://rust-lang.github.io/rust-clippy/master/index.html#/clone_on_ref_ptr for compiler, also see https://github.com/rust-lang/rust/pull/131225#discussion_r1790109443.

Some Arc's can be misplaced with Lrc's, sorry.

https://rust-lang.zulipchat.com/#narrow/channel/131828-t-compiler/topic/enable.20more.20clippy.20lints.20for.20compiler.20.28and.5Cor.20std.29
2024-10-29 03:11:39 -07:00
klensy
17636374de correct LLVMRustCreateThinLTOData arg types 2024-10-29 00:47:20 +03:00
Jubilee
6fd4a76d3b
Rollup merge of #132261 - ChrisCho-H:refactor/cleaner-check-none, r=compiler-errors
refactor: cleaner check to return None

It's very nit change. Refactor to shorten verbose check when returning None for `backend_feature_name`.
2024-10-28 10:18:52 -07:00
Jubilee
bd43f8e9fd
Rollup merge of #132260 - Zalathar:type-safe-cast, r=compiler-errors
cg_llvm: Use a type-safe helper to cast `&str` and `&[u8]` to `*const c_char`

In `rustc_codegen_llvm` there are many uses of `.as_ptr().cast()` to convert a string or byte-slice to `*const c_char`, which then gets passed through FFI.

This works, but is fragile, because there's nothing constraining the pointer cast to actually be from `u8` to `c_char`. If the original value changes to something else that has an `as_ptr` method, or the context changes to expect something other than `c_char`, the cast will silently do the wrong thing.

By making the cast more explicit via a helper method, we can be sure that it will either perform the intended cast, or fail at compile time.
2024-10-28 10:18:52 -07:00
Jubilee Young
88a9edc091 compiler: Add is_uninhabited and use LayoutS accessors
This reduces the need of the compiler to peek on the fields of LayoutS.
2024-10-28 09:58:30 -07:00
Alex Crichton
f534974037 Add a new wide-arithmetic feature for WebAssembly
This commit adds a new rustc target feature named `wide-arithmetic` for
WebAssembly targets. This corresponds to the [wide-arithmetic] proposal
for WebAssembly which adds new instructions catered towards accelerating
integer arithmetic larger than 64-bits. This proposal to WebAssembly is
not standard yet so this new feature is flagged as an unstable target
feature. Additionally Rust's LLVM version doesn't support this new
feature yet since support will first be added in LLVM 20, so the
feature filtering logic for LLVM is updated to handle this.

I'll also note that I'm not currently planning to add wasm-specific
intrinsics to `std::arch::wasm32` at this time. The currently proposed
instructions are all accessible through `i128` or `u128`-based
operations which Rust already supports, so intrinsic shouldn't be
necessary to get access to these new instructions.

[wide-arithmetic]: https://github.com/WebAssembly/wide-arithmetic
2024-10-28 08:11:47 -07:00
klensy
746b675c5a fix clippy::clone_on_ref_ptr for compiler 2024-10-28 18:05:08 +03:00
ChrisCho-H
82bfe05309 refactor: cleaner check to return None 2024-10-28 20:16:35 +09:00
Zalathar
4bd84b23a8 Use a type-safe helper to cast &str and &[u8] to *const c_char 2024-10-28 21:31:32 +11:00
bors
be33e4f3d6 Auto merge of #132167 - Zalathar:llvm-wrappers, r=jieyouxu
Replace some LLVMRust wrappers with calls to the LLVM C API

This PR removes the LLVMRust wrapper functions for getting/setting linkage and visibility, and replaces them with direct calls to the corresponding functions in LLVM's C API.

To make this convenient and sound, two pieces of supporting code have also been added:
- A simple proc-macro that derives `TryFrom<u32>` for fieldless enums
- A wrapper type for C enum values returned by LLVM functions, to ensure soundness if LLVM returns an enum value we don't know about

In a few places, the use of safe wrapper functions means that an `unsafe` block is no longer needed, so the affected code has changed its indentation level.
2024-10-27 03:24:54 +00:00
bors
f7cf41c973 Auto merge of #131900 - mrkajetanp:target-feature-pauth-lr, r=Amanieu
rustc_target: Add pauth-lr aarch64 target feature

Add the pauth-lr target feature, corresponding to aarch64 FEAT_PAuth_LR. This feature has been added in LLVM 19.
It is currently not supported by the Linux hwcap and so we cannot add runtime feature detection for it at this time.

r? `@Amanieu`
2024-10-27 00:09:49 +00:00
Zalathar
d976ca8701 Use LLVM-C APIs for getting/setting visibility 2024-10-27 11:05:33 +11:00
许杰友 Jieyou Xu (Joe)
c26280a8ba
Rollup merge of #132124 - Zalathar:consolidate-covstar, r=jieyouxu
coverage: Consolidate creation of covmap/covfun records

This code for creating covmap/covfun records during codegen was split across multiple functions and files for dubious historical reasons. Having it all in one place makes it easier to follow.

This PR also includes two semi-related cleanups:
- Getting the codegen context's `coverage_cx` state is made infallible, since it should always exist when running the code paths that need it.
- The value of `covfun_section_name` is saved in the codegen context, since it never changes at runtime, and the code that needs it has access to the context anyway.

---

Background: Coverage instrumentation generates two kinds of metadata that are embedded in the final binary. There is per-CGU information that goes in the `__llvm_covmap` linker section, and per-function information that goes in the `__llvm_covfun` section (except on Windows, where slightly different section names are used).
2024-10-26 22:01:12 +08:00
Zalathar
96993a9b5e Use LLVM-C APIs for getting/setting linkage 2024-10-26 20:20:20 +11:00
Zalathar
ec41e6d1b0 Add a wrapper type for raw enum values returned by LLVM 2024-10-26 20:20:20 +11:00
Zalathar
b114040afb Use safe wrappers get_visibility and set_visibility 2024-10-26 20:20:20 +11:00
Zalathar
983d258be3 Use safe wrappers get_linkage and set_linkage 2024-10-26 20:20:18 +11:00
Zalathar
0d653a5866 coverage: Add links to LLVM docs for the coverage mapping format 2024-10-26 17:37:04 +11:00
Deadbeef
f6fea83342 Effects cleanup
- removed extra bits from predicates queries that are no longer needed in the new system
- removed the need for `non_erasable_generics` to take in tcx and DefId, removed unused arguments in callers
2024-10-26 10:19:07 +08:00
Zalathar
8f07514520 coverage: SSA doesn't need to know about instrprof_increment 2024-10-25 14:24:05 +11:00
Zalathar
b3d65852c3 coverage: Emit MC/DC intrinsics using the normal helper method 2024-10-25 14:01:36 +11:00
Zalathar
4923e856be coverage: Emit llvm.instrprof.increment using the normal helper method 2024-10-25 13:55:44 +11:00
Zalathar
0356908cf5 coverage: Store covfun_section_name in the codegen context
Adding an extra `OnceCell` to `CrateCoverageContext` is much nicer than trying
to thread this string through multiple layers of function calls that already
have access to the context.
2024-10-25 12:42:42 +11:00
Zalathar
0a96176533 coverage: Make obtaining the codegen coverage context infallible
In all the situations where this context is needed, it should always be
available.
2024-10-25 12:42:42 +11:00
Zalathar
9f8a6be221 coverage: Consolidate creation of covmap/covfun records
There is no need for this code to be split across multiple functions in
multiple files.
2024-10-25 12:42:23 +11:00
Stuart Cook
8f354fc94a
Rollup merge of #131956 - Zalathar:llvm-counters, r=compiler-errors,Swatinem
coverage: Pass coverage mappings to LLVM as separate structs

Instead of trying to cram *N* different kinds of coverage mapping data into a single list for FFI, pass *N* different lists of simpler structs.

This avoids the need to fill unused fields with dummy values, and avoids the need to tag structs with their underlying kind. It also lets us call the dedicated LLVM constructors for each different mapping type, instead of having to go through the complex general-purpose constructor.

Even though this adds multiple new structs to the FFI surface area, the resulting C++ code is simpler and shorter.

---

I've structured this mostly as a single atomic patch, rather than a series of incremental changes, because that avoids the need to make fiddly fixes to code that is about to be deleted anyway.
2024-10-24 14:19:57 +11:00
Josh Triplett
ecdc2441b6 "innermost", "outermost", "leftmost", and "rightmost" don't need hyphens
These are all standard dictionary words and don't require hyphenation.
2024-10-23 02:45:24 -07:00
bors
f2ba41113d Auto merge of #130950 - compiler-errors:yeet-eval, r=BoxyUwU
Continue to get rid of `ty::Const::{try_}eval*`

This PR mostly does:

* Removes all of the `try_eval_*` and `eval_*` helpers from `ty::Const`, and replace their usages with `try_to_*`.
* Remove `ty::Const::eval`.
* Rename `ty::Const::normalize` to `ty::Const::normalize_internal`. This function is still used in the normalization code itself.
* Fix some weirdness around the `TransmuteFrom` goal.

I'm happy to split it out further; for example, I could probably land the first part which removes the helpers, or the changes to codegen which are more obvious than the changes to tools.

r? BoxyUwU

Part of https://github.com/rust-lang/rust/issues/130704
2024-10-21 03:46:28 +00:00
Zalathar
3310419d35 Make llvm::set_section take a &CStr 2024-10-20 17:08:05 +11:00
Zalathar
d1bf77eb34 Pass coverage mappings to LLVM as separate structs 2024-10-20 13:29:34 +11:00
Zalathar
98c4d96957 Reduce visibility of coverage FFI functions/types 2024-10-20 10:55:47 +11:00
Michael Goulet
e83e4e8112 Get rid of const eval_* and try_eval_* helpers 2024-10-19 18:07:35 +00:00
Jubilee Young
45d61b0d26 cg_llvm: Reuse LLVM-C Comdat support
Migrate `llvm::set_comdat` and `llvm::SetUniqueComdat` to LLVM-C FFI.

Note, now we can call `llvm::set_comdat` only when the target actually
supports adding comdat. As this has no convenient LLVM-C API, we
implement this as `TargetOptions::supports_comdat`.

Co-authored-by: Stuart Cook <Zalathar@users.noreply.github.com>
2024-10-19 10:46:10 -07:00
Jubilee Young
888efe74a3 cg_llvm: Switch llvm::add_global to &CStr 2024-10-18 17:46:33 -07:00
Kajetan Puchalski
f641c32aad rustc_target: Add pauth-lr aarch64 target feature
Add the pauth-lr target feature, corresponding to aarch64 FEAT_PAuth_LR.
This feature has been added in LLVM 19.
It is currently not supported by the Linux hwcap and so we cannot add
runtime feature detection for it at this time.
2024-10-16 18:00:51 +01:00
Matthew Maurer
e985396145 llvm: Match aarch64 data layout to new LLVM layout
LLVM has added 3 new address spaces to support special Windows use
cases. These shouldn't trouble us for now, but LLVM requires matching
data layouts.

See llvm/llvm-project#111879 for details
2024-10-16 01:16:44 +00:00
Taiki Endo
67ebb6c20b Fix AArch64InlineAsmReg::emit 2024-10-14 06:04:07 +09:00
Trevor Gross
39071fdc58
Rollup merge of #131626 - matthiaskrgr:dont_string, r=lqd
remove a couple of redundant String to String conversion
2024-10-12 21:38:38 -05:00
Matthias Krüger
4bc21e318c remove a couple of redundant String to String conversion 2024-10-12 22:07:46 +02:00
DianQK
1efffe720d
LLVMConstInt only allows integer types 2024-10-12 23:02:15 +08:00
Trevor Gross
3f9aa50b70
Rollup merge of #124874 - jedbrown:float-mul-add-fast, r=saethlin
intrinsics fmuladdf{32,64}: expose llvm.fmuladd.* semantics

Add intrinsics `fmuladd{f32,f64}`. This computes `(a * b) + c`, to be fused if the code generator determines that (i) the target instruction set has support for a fused operation, and (ii) that the fused operation is more efficient than the equivalent, separate pair of `mul` and `add` instructions.

https://llvm.org/docs/LangRef.html#llvm-fmuladd-intrinsic

The codegen_cranelift uses the `fma` function from libc, which is a correct implementation, but without the desired performance semantic. I think this requires an update to cranelift to expose a suitable instruction in its IR.

I have not tested with codegen_gcc, but it should behave the same way (using `fma` from libc).

---
This topic has been discussed a few times on Zulip and was suggested, for example, by `@workingjubilee` in [Effect of fma disabled](https://rust-lang.zulipchat.com/#narrow/stream/122651-general/topic/Effect.20of.20fma.20disabled/near/274179331).
2024-10-11 23:57:44 -04:00
Trevor Gross
2c385ba329
Rollup merge of #131543 - Zalathar:goodbye-llvm-17, r=petrochenkov
coverage: Remove code related to LLVM 17

In-tree LLVM is 19, and the minimum external LLVM was increased to 18 in #130487.
2024-10-11 16:53:49 -05:00
Jed Brown
0d8a978e8a intrinsics.fmuladdf{16,32,64,128}: expose llvm.fmuladd.* semantics
Add intrinsics `fmuladd{f16,f32,f64,f128}`. This computes `(a * b) +
c`, to be fused if the code generator determines that (i) the target
instruction set has support for a fused operation, and (ii) that the
fused operation is more efficient than the equivalent, separate pair
of `mul` and `add` instructions.

https://llvm.org/docs/LangRef.html#llvm-fmuladd-intrinsic

MIRI support is included for f32 and f64.

The codegen_cranelift uses the `fma` function from libc, which is a
correct implementation, but without the desired performance semantic. I
think this requires an update to cranelift to expose a suitable
instruction in its IR.

I have not tested with codegen_gcc, but it should behave the same
way (using `fma` from libc).
2024-10-11 15:32:56 -06:00
Matthias Krüger
33b1264540
Rollup merge of #131519 - davidlattimore:intrinsics-default-vis, r=Urgau
Use Default visibility for rustc-generated C symbol declarations

Non-default visibilities should only be used for definitions, not declarations, otherwise linking can fail.

This is based on https://github.com/rust-lang/rust/pull/123994.

Issue https://github.com/rust-lang/rust/issues/123427

When I changed `default-hidden-visibility` to `default-visibility` in https://github.com/rust-lang/rust/pull/130005, I updated all places in the code that used `default-hidden-visibility`, replicating the hidden-visibility bug to also happen for protected visibility.

Without this change, trying to build rustc with `-Z default-visibility=protected` fails with a link error.
2024-10-11 15:36:52 +02:00
Zalathar
9357277de7 coverage: Remove code related to LLVM 17 2024-10-11 21:44:36 +11:00
David Lattimore
42c0494499 Use Default visibility for rustc-generated C symbol declarations
Non-default visibilities should only be used for definitions, not
declarations, otherwise linking can fail.

Co-authored-by: Collin Baker <collinbaker@chromium.org>
2024-10-11 08:43:27 +11:00
Matthias Krüger
edb669350a
Rollup merge of #130741 - mrkajetanp:detect-b16b16, r=Amanieu
rustc_target: Add sme-b16b16 as an explicit aarch64 target feature

LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.

Resolves https://github.com/rust-lang/rust/pull/129894.
2024-10-10 22:00:48 +02:00
Matthias Krüger
13976f1f25
Rollup merge of #130308 - davidtwco:tied-target-consolidation, r=wesleywiser
codegen_ssa: consolidate tied target checks

Fixes #105110.
Fixes #105111.

`rustc_codegen_llvm` and `rustc_codegen_gcc` duplicated logic for checking if tied target features were partially enabled. This PR consolidates these checks into `rustc_codegen_ssa` in the `codegen_fn_attrs` query, which also is run pre-monomorphisation for each function, which ensures that this check is run for unused functions, as would be expected.

Also adds a test confirming that enabling one tied feature doesn't imply another - the appropriate error for this was already being emitted. I did a bisect and narrowed it down to two patches it was likely to be - something in #128796, probably #128221 or #128679.
2024-10-10 22:00:45 +02:00
Kajetan Puchalski
335f67b652 rustc_target: Add sme-b16b16 as an explicit aarch64 target feature
LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.
2024-10-10 10:24:57 +00:00
Matthias Krüger
e642442f12
Rollup merge of #131424 - workingjubilee:stem-the-tyde-of-glob-imports, r=jieyouxu
compiler: Stop reexporting enum-globs from `rustc_target::abi`

Three enums had **all** their variants glob-exported into a distressingly large amount of the tree. Cease to do that, and also cease to glob import the contents of the module that contained them. Redirect relevant imports to their actual source, the `rustc_abi` crate.

No functional changes.
2024-10-09 20:27:24 +02:00
Jubilee Young
1379ef592a compiler: Factor rustc_target::abi out of cg_llvm 2024-10-08 18:24:56 -07:00
Michael Goulet
17eca60c24 Dont ICE when encountering post-mono layout cycle error 2024-10-08 16:46:16 -04:00
bors
cf24c73141 Auto merge of #126733 - ZhuUx:llvm-19-adapt, r=Zalathar
[Coverage][MCDC] Adapt mcdc to llvm 19

Related issue: #126672

Also finish task 4 at #124144

[llvm #82448](https://github.com/llvm/llvm-project/pull/82448) has introduced some break changes into mcdc, causing incompatibility between llvm 18 and 19. This draft adapts to that change and gives up supporting for llvm-18.
2024-10-08 07:08:41 +00:00
zhuyunxing
6e3e19f714 coverage. Adapt to mcdc mapping formats introduced by llvm 19 2024-10-08 11:15:24 +08:00
zhuyunxing
99bd601df5 coverage. MCDC ConditionId start from 0 to keep with llvm 19 2024-10-08 10:50:18 +08:00
zhuyunxing
911ac56e95 coverage. Disable supporting mcdc on llvm-18 2024-10-08 10:50:18 +08:00
Stuart Cook
4d63896018
Rollup merge of #130824 - Darksonn:fix-function-return, r=wesleywiser
Add missing module flags for `-Zfunction-return=thunk-extern`

This fixes a bug in the `-Zfunction-return=thunk-extern` flag. The flag needs to be passed onto LLVM to ensure that functions such as `asan.module_ctor` and `asan.module_dtor` that are created internally in LLVM have the mitigation applied to them.

This was originally discovered [in the Linux kernel](https://lore.kernel.org/all/CANiq72myZL4_poCMuNFevtpYYc0V0embjSuKb7y=C+m3vVA_8g@mail.gmail.com/).

Original flag PR: #116892
PR for similar issue: #129373
Tracking issue: #116853

cc ``@ojeda``
r? ``@wesleywiser``
2024-10-08 13:19:43 +11:00
Urgau
018ba0528f Use wide pointers consistenly across the compiler 2024-10-04 14:06:48 +02:00
Jacob Kiesel
bb5a8276be add unstable support for outputting file checksums for use in cargo 2024-10-01 21:23:20 -06:00
bors
06bb8364aa Auto merge of #131111 - matthiaskrgr:rollup-n6do187, r=matthiaskrgr
Rollup of 4 pull requests

Successful merges:

 - #130005 (Replace -Z default-hidden-visibility with -Z default-visibility)
 - #130229 (ptr::add/sub: do not claim equivalence with `offset(c as isize)`)
 - #130773 (Update Unicode escapes in `/library/core/src/char/methods.rs`)
 - #130933 (rustdoc: lists items that contain multiple paragraphs are more clear)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-10-01 19:29:26 +00:00
Matthias Krüger
389a399a50
Rollup merge of #130005 - davidlattimore:protected-vis-flag, r=Urgau
Replace -Z default-hidden-visibility with -Z default-visibility

Issue #105518
2024-10-01 21:09:18 +02:00
Guillaume Gomez
344b6a1668
Rollup merge of #130630 - taiki-e:s390x-clobber-abi, r=Amanieu
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly

This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335.

This also supports vector registers (as `vreg`) and access registers (as `areg`) as clobber-only, which need to support clobbering of them to implement clobber_abi.

Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
  - Vector registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L249
  - Access registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L332

I have three questions:
- ~~ELF Application Binary Interface s390x Supplement says that `cc` (condition code, bits 18-19 of PSW) is "Volatile".
  However, we do not have a register class for `cc` and instead mark `cc` as clobbered unless `preserves_flags` is specified (https://github.com/rust-lang/rust/pull/111331).
  Therefore, in the current implementation, if both `preserves_flags` and `clobber_abi` are specified, `cc` is not marked as clobbered. Is this okay? Or even if `preserves_flags` is used, should `cc` be marked as clobbered if `clobber_abi` is used?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- ~~ELF Application Binary Interface s390x Supplement says that `pm` (program mask, bits 20-23 of PSW) is "Cleared".
  There does not appear to be any registers associated with this in either [LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td) or [GCC](33ccc1314d/gcc/config/s390/s390.h (L407-L431)), so at this point I don't see any way other than to just ignore it. Is this okay as-is?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and `reg_addr`, which uses the “a” constraint (https://github.com/rust-lang/rust/pull/119431)...

Note:

- GCC seems to [recognize only `a0` and `a1`](33ccc1314d/gcc/config/s390/s390.h (L428-L429)), and using `a[2-15]` [causes errors](https://godbolt.org/z/a46vx8jjn).
  Given that cg_gcc has a similar problem with other architecture (https://github.com/rust-lang/rustc_codegen_gcc/issues/485), I don't feel this is a blocker for this PR, but it is worth mentioning here.
- `vreg` should be able to accept `#[repr(simd)]` types as input if the `vector` target feature added in https://github.com/rust-lang/rust/pull/127506 is enabled, but core_arch has no s390x vector type and both `#[repr(simd)]` and `core::simd` are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... https://github.com/rust-lang/rust/pull/88245#issuecomment-905559591

cc `@uweigand`

r? `@Amanieu`

`@rustbot` label +O-SystemZ
2024-10-01 17:32:07 +02:00
David Lattimore
f48194ea55 Replace -Z default-hidden-visibility with -Z default-visibility
MCP: https://github.com/rust-lang/compiler-team/issues/782

Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
2024-10-01 22:32:13 +10:00
Trevor Gross
acaa6cee07
Rollup merge of #130877 - taiki-e:riscv-atomic, r=Amanieu
rustc_target: Add RISC-V atomic-related features

This adds the following three target features to unstable riscv_target_feature.

- `zaamo` (Zaamo Extension 1.0.0): Atomic Memory Operations (`amo*.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L229-L231), [available since LLVM 19](8be079cddd))
- `zabha` (Zabha Extension 1.0.0): Byte and Halfword Atomic Memory Operations (`amo*.{b,h}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L238-L240), [available since LLVM 19](6b7444964a))
- `zalrsc` (Zalrsc Extension 1.0.0): Load-Reserved/Store-Conditional Instructions (`lr.{w,d}{,.aq,.rl,.aqrl}` and `sc.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L261-L263), [available since LLVM 19](8be079cddd))

(Zacas Extension is not included here because it is still marked as experimental in LLVM 19 70e7d26e56 and will become non-experimental in LLVM 20 614aeda93b)

`a` implies `zaamo` and `zalrsc`, and `zabha` implies `zaamo`:

- After Zaamo and Zalrsc Extensions are frozen, riscv-isa-manual says "The A extension comprises instructions provided by the Zaamo and Zalrsc extensions" (e87412e621), and [`a` implies `zaamo` and `zalrsc` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L44)). However, in LLVM, [`a` does not define them as implying `zaamo` and `zalrsc`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L206).
- Zabha and Zaamo are in a similar situation, [riscv-isa-manual](https://github.com/riscv/riscv-isa-manual/blob/main/src/zabha.adoc) says "The Zabha extension depends upon the Zaamo standard extension", and [`zabha` implies `zaamo` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L45-L46)), but [does not in LLVM (but enabling `zabha` without `zaamo` or `a` is not allowed)](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/TargetParser/RISCVISAInfo.cpp#L776-L778).

r? `@Amanieu`

`@rustbot` label +O-riscv +A-target-feature
2024-09-30 19:18:49 -04:00
Ralf Jung
a78fd694d4 extend comment in global_llvm_features regarding target-cpu=native handling 2024-09-29 12:16:35 +02:00
Taiki Endo
62612af372 rustc_target: Add RISC-V atomic-related features 2024-09-28 11:26:09 +09:00
Josh Stone
4160a54dc5 Use &raw in the compiler
Like #130865 did for the standard library, we can use `&raw` in the
compiler now that stage0 supports it. Also like the other issue, I did
not make any doc or test changes at this time.
2024-09-26 20:33:26 -07:00
Alice Ryhl
540e41f8b3 Add missing module flags for function-return=thunk-extern 2024-09-25 15:53:53 +02:00
Josh Stone
0999b019f8 Dogfood feature(file_buffered) 2024-09-24 14:25:16 -07:00
Daniel Paoliello
b2fd8a0192 Test fixing raw-dylib 2024-09-24 10:10:31 -07:00
David Wood
207bc77e15
codegen_ssa: consolidate tied feature checking
`rustc_codegen_llvm` and `rustc_codegen_gcc` duplicated logic for
checking if tied target features were partially enabled. This commit
consolidates these checks into `rustc_codegen_ssa` in the
`codegen_fn_attrs` query, which also is run pre-monomorphisation for
each function, which ensures that this check is run for unused functions,
as would be expected.
2024-09-24 15:48:49 +01:00
bors
4cbfcf1b7f Auto merge of #130389 - Luv-Ray:LLVMMDNodeInContext2, r=nikic
llvm: replace some deprecated functions

`LLVMMDStringInContext` and `LLVMMDNodeInContext` are deprecated, replace them with `LLVMMDStringInContext2` and `LLVMMDNodeInContext2`.
Also replace `Value` with `Metadata` in some function signatures for better consistency.
2024-09-24 12:07:48 +00:00
Michael Goulet
702a644b74 Check vtable projections for validity in miri 2024-09-23 19:38:26 -04:00
Luv-Ray
d7ebf9e541 format 2024-09-23 23:45:13 +08:00
bors
66b0b29e65 Auto merge of #130724 - compiler-errors:bump, r=Mark-Simulacrum
Bump stage0 to beta-2024-09-22 and rustfmt to nightly-2024-09-22

I'm doing this to apply the changes to version sorting (https://github.com/rust-lang/rustfmt/pull/6284) that have occurred since rustfmt last upgraded (and a few other miscellaneous changes, like changes to expression overflowing: https://github.com/rust-lang/rustfmt/pull/6260). Eagerly updating rustfmt and formatting-the-world will ideally move some of the pressure off of the beta bump which will happen at the beginning of the next release cycle.

You can verify this is correct by checking out the changes, reverting the last commit, reapplying them, and diffing the changes:

```
git fetch git@github.com:compiler-errors/rust.git bump
git checkout -b bump FETCH_HEAD
git reset --hard HEAD~5
./x.py fmt --all
git diff FETCH_HEAD
# ignore the changes to stage0, and rustfmt.toml,
# and test file changes in rustdoc-js-std, run-make.
```

Or just take my word for it? Up to the reviewer.

r? release
2024-09-23 02:02:22 +00:00
bors
d14c1c75ab Auto merge of #130680 - saethlin:module-name-to-str, r=jieyouxu
Call module_name_to_str instead of just unwrapping

This makes the ICE message in https://github.com/rust-lang/rust/issues/130678 more clear. It looks like not calling this function was just an oversight in https://github.com/rust-lang/rust/pull/76859, but clearly not a major one because it's taken us 4 years to notice.

try-job: i686-msvc
2024-09-22 23:14:12 +00:00
Michael Goulet
c682aa162b Reformat using the new identifier sorting from rustfmt 2024-09-22 19:11:29 -04:00
Ben Kimock
6419aeb1ec Call module_name_to_str instead of just unwrapping 2024-09-21 18:42:51 -04:00
Folkert
5722a80782 remove #[cmse_nonsecure_entry] 2024-09-21 13:05:21 +02:00
Folkert de Vries
1ddd67a79a add C-cmse-nonsecure-entry ABI 2024-09-21 13:04:14 +02:00
Michael Goulet
914193c8f4 Do not unnecessarily eval consts in codegen 2024-09-20 20:38:11 -04:00
Guillaume Gomez
bf6389f077
Rollup merge of #128209 - beetrees:no-macos-10.10, r=jieyouxu
Remove macOS 10.10 dynamic linker bug workaround

Rust's current minimum macOS version is 10.12, so the hack can be removed. This PR also updates the `remove_dir_all` docs to reflect that all supported macOS versions are protected against TOCTOU race conditions (the fallback implementation was already removed in #127683).

try-job: dist-x86_64-apple
try-job: dist-aarch64-apple
try-job: dist-apple-various
try-job: aarch64-apple
try-job: x86_64-apple-1
2024-09-20 19:46:37 +02:00
Taiki Endo
fa125e2be6 Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly 2024-09-21 01:51:26 +09:00
Luv-Ray
6da2d6e026 MetadataType type cast 2024-09-19 18:56:02 +08:00
Luv-Ray
e2ec83ced9 move place 2024-09-19 18:52:09 +08:00
Luv-Ray
632342a135 wrap LLVMSetMetadata 2024-09-19 18:45:23 +08:00
Nicholas Nethercote
1f359405cb Reformat some comments.
So they are less than 100 chars.
2024-09-19 20:11:28 +10:00
Nicholas Nethercote
5fd16dffdc Merge adjacent unsafe extern "C" blocks. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
c5af8b2722 Avoid heavy repetition in llvm/ffi.rs.
Through judicious use of `use` and `Self`.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
3b071692cb Remove a low-value local variable. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
ccd6c6102d Fix a comment.
I'm pretty sure `CodegenCx` applies to codegen units, rather than
compilation units.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
badd8cc8f4 Reduce visibility. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
bfef2611d9 Reorder ConstMethods.
It's crazy to have the integer methods in something close to random
order.

The reordering makes the gaps clear: `const_i64`, `const_i128`,
`const_isize`, and `const_u16`. I guess they just aren't needed.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
fda530d729 Streamline hidden visibility setting.
In `get_fn` there is a complicated set of if/elses to determine if
`hidden` visibility should be applied. There are five calls to
`LLVMRustSetVisibility` and some repetition in the comments.

This commit streamlines it a bit:
- Computes `hidden` and then uses it to determine if a single call to
  `LLVMRustSetVisibility` occurs.
- Converts some of the if/elses into boolean expressions.
- Removes the repetitive comments.

Overall this makes it quite a bit shorter, and I find it easier to read.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
eb575506f2 Remove a low-value comment.
We rarely use parameter comments, and these ones don't tell us anything
interesting.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
4ce010efcf Use a macro to factor out some repetitive code.
Similar to the existing macro just above.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
0d78f1e86b Reduce repetition in target_is_apple. 2024-09-19 20:10:41 +10:00
Nicholas Nethercote
9429e64c24 Streamline report_inline_asm.
By using `use`.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
63210bd68c Rename a parameter.
This seems to be a typo. `singletree` doesn't make sense, and everywhere
else it is `singlethread`.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
785a26af03 Streamline register methods.
These can be made more concise, mostly through appropriate use of `use`
declarations.
2024-09-19 20:10:41 +10:00
Luv-Ray
b7c5656713 replace some deprecated functions 2024-09-19 09:39:28 +08:00
Josh Stone
6fd8a50680 Update the minimum external LLVM to 18 2024-09-18 13:53:31 -07:00
Matthias Krüger
21313d7947
Rollup merge of #130457 - nnethercote:cleanup-codegen-traits, r=bjorn3
Cleanup codegen traits

The traits governing codegen are quite complicated and hard to follow. This PR cleans them up a bit.

r? `@bjorn3`
2024-09-18 17:49:43 +02:00
Nicholas Nethercote
acb832d640 Use associative type defaults in {Layout,FnAbi}OfHelpers.
This avoids some repetitive boilerplate code.
2024-09-17 10:25:06 +10:00
Nicholas Nethercote
a8d22eb39e Rename supertraits of CodegenMethods.
Supertraits of `BuilderMethods` are all called `XyzBuilderMethods`.
Supertraits of `CodegenMethods` are all called `XyzMethods`. This commit
changes the latter to `XyzCodegenMethods`, for consistency.
2024-09-17 10:24:43 +10:00
Nicholas Nethercote
410a2de0c0 Rename {ArgAbi,IntrinsicCall}Methods.
They both are part of `BuilderMethods`, and so should have `Builder` in
their name like all the other traits in `BuilderMethods`.
2024-09-17 10:24:43 +10:00
Nicholas Nethercote
5f98943b5a Merge HasCodegen into BuilderMethods.
It has `Backend` and `Deref` boudns, plus an associated type
`CodegenCx`, and it has a single use. This commit "inlines" it into
`BuilderMethods`, which makes the complicated backend trait situation a
little simpler.
2024-09-17 10:24:43 +10:00
Jubilee
68758c0560
Rollup merge of #130325 - workingjubilee:plus-minus-zero-redux, r=RalfJung,jieyouxu
Use -0.0 in `intrinsics::simd::reduce_add_unordered`

-0.0 is the actual neutral additive float, not +0.0, and this matters to codegen.

try-job: aarch64-gnu
2024-09-15 23:51:25 -07:00
Jubilee Young
ab8c202527 Use -0.0 in intrinsics::simd::reduce_add_unordered
-0.0 is the actual neutral additive float, not +0.0, and this matters to codegen.
2024-09-15 16:40:23 -07:00
Matthias Krüger
0daa636b93
Rollup merge of #129897 - RalfJung:soft-float-ignored, r=Urgau
deprecate -Csoft-float because it is unsound (and not fixable)

See  https://github.com/rust-lang/rust/issues/129893 for details. The general sentiment there seems to be that this flag has no use and sound alternatives exist, so let's add this warning and see if anyone out there disagrees.

Also show a different warning on targets where it does nothing (as documented since https://github.com/rust-lang/rust/pull/36261): it seems to correspond to `-mfloat-abi` in GCC/clang, which is an ARM-specific option. To be really sure it does nothing, only forward the flag to LLVM for eabihf targets. This should not change behavior but makes me sleep better ;)
2024-09-15 20:55:12 +02:00
Ralf Jung
60ee1b7ac6 simd_shuffle: require index argument to be a vector 2024-09-14 14:43:24 +02:00
bors
5e842953cc Auto merge of #130052 - khuey:clear-dilocation-after-const-emission, r=michaelwoerister
Don't leave debug locations for constants sitting on the builder indefinitely

Because constants are currently emitted *before* the prologue, leaving the debug location on the IRBuilder spills onto other instructions in the prologue and messes up both line numbers as well as the point LLVM chooses to be the prologue end.

Example LLVM IR (irrelevant IR elided):
Before:
```
define internal { i64, i64 } `@_ZN3tmp3Foo18var_return_opt_try17he02116165b0fc08cE(ptr` align 8 %self) !dbg !347 { start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8, !dbg !357
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)
```
After:
```
define internal { i64, i64 } `@_ZN3tmp3Foo18var_return_opt_try17h00b17d08874ddd90E(ptr` align 8 %self) !dbg !347 { start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)
```
Note in particular how !357 from %residual.dbg.spill's dbg_declare no longer falls through onto the store to %self.dbg.spill. This fixes argument values at entry when the constant is a ZST (e.g. `<Option as Try>::Residual`). This fixes #130003 (but note that it does *not* fix issues with argument values and non-ZST constants, which emit their own stores that have debug info on them, like #128945).

r? `@michaelwoerister`
2024-09-13 08:57:41 +00:00
Stuart Cook
3ba12756d3
Rollup merge of #130235 - compiler-errors:nested-if, r=michaelwoerister
Simplify some nested `if` statements

Applies some but not all instances of `clippy::collapsible_if`. Some ended up looking worse afterwards, though, so I left those out. Also applies instances of `clippy::collapsible_else_if`

Review with whitespace disabled please.
2024-09-12 20:37:16 +10:00
bors
1f51450c68 Auto merge of #117465 - paulmenage:small-data-limit, r=compiler-errors
Add -Z small-data-threshold

This flag allows specifying the threshold size above which LLVM should not consider placing small objects in a `.sdata` or `.sbss` section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-12 04:27:08 +00:00
Jubilee
a31a8fe0cf
Rollup merge of #130114 - eduardosm:needless-returns, r=compiler-errors
Remove needless returns detected by clippy in the compiler
2024-09-11 15:53:22 -07:00
Michael Goulet
954419aab0 Simplify some nested if statements 2024-09-11 13:45:23 -04:00
Paul Menage
3810386bbe Add -Z small-data-threshold
This flag allows specifying the threshold size above which LLVM should
not consider placing small objects in a .sdata or .sbss section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-10 12:19:16 -07:00
Jubilee
88a2c62652
Rollup merge of #129981 - nnethercote:rm-serialize_bitcode, r=antoyo,tmiasko
Remove `serialized_bitcode` from `LtoModuleCodegen`.

It's unused.

r? ``@bjorn3``
2024-09-09 19:20:36 -07:00
Eduardo Sánchez Muñoz
0b20ffcb63 Remove needless returns detected by clippy in the compiler 2024-09-09 13:32:22 +02:00
Nicholas Nethercote
bbe28cf1d9 Remove serialized_bitcode from LtoModuleCodegen.
It's unused.
2024-09-09 09:00:50 +10:00
bors
12b26c13fb Auto merge of #129941 - BoxyUwU:bump-boostrap, r=albertlarsan68
Bump boostrap compiler to new beta

Accidentally left some comments on the update cfgs commit directly xd
2024-09-07 20:37:30 +00:00
Michael Goulet
bc2244f027
Rollup merge of #129940 - liushuyu:s390x-target-features, r=RalfJung
s390x: Fix a regression related to backchain feature

In #127506, we introduced a new IBM Z-specific target feature, `backchain`.

This particular `target-feature` was available as a function-level attribute in LLVM 17 and below, so some hacks were used to avoid blowing up LLVM when querying the supported LLVM features.

This led to an unfortunate regression where `cfg!(target-feature = "backchain")` will always return true.

This pull request aims to fix this issue, and a test has been introduced to ensure it will never happen again.

Fixes #129927.

r? `@RalfJung`
2024-09-07 14:21:22 +03:00
Michael Goulet
6dd07e4e26
Rollup merge of #129891 - nikic:naked-no-san, r=jackh726
Do not request sanitizers for naked functions

Naked functions can only contain inline asm, so any instrumentation inserted by sanitizers is illegal. Don't request it.

Fixes https://github.com/rust-lang/rust/issues/129224.
2024-09-07 14:21:21 +03:00
Kyle Huey
7ed9f945a2 Don't leave debug locations for constants sitting on the builder indefinitely.
Because constants are currently emitted *before* the prologue, leaving the
debug location on the IRBuilder spills onto other instructions in the prologue
and messes up both line numbers as well as the point LLVM chooses to be the
prologue end.

Example LLVM IR (irrelevant IR elided):
Before:

define internal { i64, i64 } @_ZN3tmp3Foo18var_return_opt_try17he02116165b0fc08cE(ptr align 8 %self) !dbg !347 {
start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8, !dbg !357
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)

After:

define internal { i64, i64 } @_ZN3tmp3Foo18var_return_opt_try17h00b17d08874ddd90E(ptr align 8 %self) !dbg !347 {
start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)

Note in particular how !357 from %residual.dbg.spill's dbg_declare no longer
falls through onto the store to %self.dbg.spill. This fixes argument values
at entry when the constant is a ZST (e.g. <Option as Try>::Residual). This
fixes #130003 (but note that it does *not* fix issues with argument values and
non-ZST constants, which emit their own stores that have debug info on them,
like #128945).
2024-09-06 23:12:18 +00:00
Nikita Popov
54ebb9d489 Do not request sanitizers for naked functions
Naked functions can only contain inline asm, so any instrumentation
inserted by sanitizers is illegal. Don't request it.

Fixes https://github.com/rust-lang/rust/issues/129224.
2024-09-06 14:11:13 +02:00
Matthias Krüger
0180b8fff0
Rollup merge of #129969 - GrigorenkoPV:boxed-ty, r=compiler-errors
Make `Ty::boxed_ty` return an `Option`

Looks like a good place to use Rust's type system.

---

Most of 4ac7bcbaad/compiler/rustc_middle/src/ty/sty.rs (L971-L1963) looks like it could be moved to `TyKind` (then I guess  `Ty` should be made to deref to `TyKind`).
2024-09-06 07:33:58 +02:00
bors
54fdef7799 Auto merge of #121614 - clubby789:no-expect, r=saethlin
Don't emit `expect`/`assume` in opt-level=0

LLVM does not make use of expect/assume calls in `opt-level=0`, so we can simplify IR by not emitting them in this case.
2024-09-06 00:42:58 +00:00
Pavel Grigorenko
f6e8a84eea Make Ty::boxed_ty return an Option 2024-09-06 00:30:36 +03:00
Matthias Krüger
b89ee99d57
Rollup merge of #128820 - LYF1999:yf/dev, r=nikic
fix: get llvm type of global val

using `LLVMTypeOf` on a global var always return ptr. so create a new function to access the value type of a global
2024-09-05 18:58:53 +02:00
Boxy
0091b8ab2a update cfgs 2024-09-05 17:24:01 +01:00
beetrees
0444056aa3
Remove macOS 10.10 dynamic linker bug workaround 2024-09-04 13:13:48 +01:00
clubby789
5b96ae7106 Don't codegen expect in opt-level=0 2024-09-04 11:49:00 +00:00
liushuyu
e98e88bfdf rustc_codegen_llvm: fix a regression where backchain feature ...
... can not be correctly gated using #[cfg] macro
2024-09-03 12:42:57 -06:00
Ralf Jung
df38e644ce deprecate -Csoft-float because it is unsound (and not fixable) 2024-09-03 12:19:50 +02:00
Alexander Cyon
ac69544a17
chore: Fix typos in 'compiler' (batch 1) 2024-09-02 07:42:38 +02:00
Ralf Jung
d0aedfbb90 interpret, codegen: tweak some comments and checks regarding Box with custom allocator 2024-08-31 11:29:02 +02:00
Guillaume Gomez
d5c40d03dc
Rollup merge of #128970 - DianQK:lint-llvm-ir, r=nikic
Add `-Zlint-llvm-ir`

This flag is similar to `-Zverify-llvm-ir` and allows us to lint the generated IR.

r? compiler
2024-08-29 16:21:47 +02:00
DianQK
9589eb95d2
Add -Zlint-llvm-ir 2024-08-29 18:12:31 +08:00
Jubilee
4c8c9e092d
Rollup merge of #128192 - mrkajetanp:feature-detect, r=Amanieu
rustc_target: Add various aarch64 features

Add various aarch64 features already supported by LLVM and Linux.
Additionally include some comment fixes to ensure consistency of feature names with the Arm ARM.
Compiler support for features added to stdarch by https://github.com/rust-lang/stdarch/pull/1614.
Tracking issue for unstable aarch64 features is https://github.com/rust-lang/rust/issues/127764.

List of added features:

- FEAT_CSSC
- FEAT_ECV
- FEAT_FAMINMAX
- FEAT_FLAGM2
- FEAT_FP8
- FEAT_FP8DOT2
- FEAT_FP8DOT4
- FEAT_FP8FMA
- FEAT_HBC
- FEAT_LSE128
- FEAT_LSE2
- FEAT_LUT
- FEAT_MOPS
- FEAT_LRCPC3
- FEAT_SVE_B16B16
- FEAT_SVE2p1
- FEAT_WFxT
- FEAT_SME
- FEAT_SME_F16F16
- FEAT_SME_F64F64
- FEAT_SME_F8F16
- FEAT_SME_F8F32
- FEAT_SME_FA64
- FEAT_SME_I16I64
- FEAT_SME_LUTv2
- FEAT_SME2
- FEAT_SME2p1
- FEAT_SSVE_FP8DOT2
- FEAT_SSVE_FP8DOT4
- FEAT_SSVE_FP8FMA

FEAT_FPMR is added in the first commit and then removed in a separate one to highlight it being removed from upstream LLVM 19. The intention is for it to be detectable at runtime through stdarch but not have a corresponding Rust compile-time feature.
2024-08-28 19:12:49 -07:00
Zalathar
46e1b5b6dd coverage: Rename CodeRegion to SourceRegion
LLVM uses the word "code" to refer to a particular kind of coverage mapping.
This unrelated usage of the word is confusing, and makes it harder to introduce
types whose names correspond to the LLVM classification of coverage kinds.
2024-08-28 22:17:42 +10:00
Matthias Krüger
3299e30abc
Rollup merge of #129635 - compiler-errors:unsafe-blocks, r=spastorino
Use unsafe extern blocks throughout the compiler

Making this change in preparation for edition 2024.

r? spastorino
2024-08-27 18:59:28 +02:00
Kajetan Puchalski
3a0fbb5d4e rustc_codegen_llvm: Filter out unavailable LLVM features
Convert to_llvm_features to return Option<LLVMFeature> so that it can
return None if the requested feature is not available for the current
LLVM version.

Add match rules to filter out aarch64 features not available in LLVM 17.
2024-08-27 11:13:01 +01:00
Kajetan Puchalski
4fc4019cbc rustc_target: Remove fpmr target feature
FEAT_FPMR has been removed from upstream LLVM as of LLVM 19.
Remove the feature from the target features list and temporarily hack
the LLVM codegen to always enable it until the minimum LLVM version is
bumped to 19.
2024-08-27 11:11:47 +01:00
Kajetan Puchalski
4f847bd326 rustc_target: Add various aarch64 features
Add various aarch64 features already supported by LLVM and Linux.

The features are marked as unstable using a newly added symbol, i.e.
aarch64_unstable_target_feature.

Additionally include some comment fixes to ensure consistency of
feature names with the Arm ARM and support for architecture version
target features up to v9.5a.

This commit adds compiler support for the following features:

- FEAT_CSSC
- FEAT_ECV
- FEAT_FAMINMAX
- FEAT_FLAGM2
- FEAT_FP8
- FEAT_FP8DOT2
- FEAT_FP8DOT4
- FEAT_FP8FMA
- FEAT_FPMR
- FEAT_HBC
- FEAT_LSE128
- FEAT_LSE2
- FEAT_LUT
- FEAT_MOPS
- FEAT_LRCPC3
- FEAT_SVE_B16B16
- FEAT_SVE2p1
- FEAT_WFxT
2024-08-27 11:11:47 +01:00
Trevor Gross
8ea70e9537
Rollup merge of #129536 - beetrees:f16-f128-inline-asm-aarch64, r=Amanieu
Add `f16` and `f128` inline ASM support for `aarch64`

Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in #127043.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128

try-job: aarch64-gnu
try-job: aarch64-apple
2024-08-27 01:46:53 -05:00
Trevor Gross
d2ff033302
Rollup merge of #128731 - RalfJung:simd-shuffle-vector, r=workingjubilee
simd_shuffle intrinsic: allow argument to be passed as vector

See https://github.com/rust-lang/rust/issues/128738 for context.

I'd like to get rid of [this hack](6c0b89dfac/compiler/rustc_codegen_ssa/src/mir/block.rs (L922-L935)). https://github.com/rust-lang/rust/pull/128537 almost lets us do that since constant SIMD vectors will then be passed as immediate arguments. However, simd_shuffle for some reason actually takes an *array* as argument, not a vector, so the hack is still required to ensure that the array becomes an immediate (which then later stages of codegen convert into a vector, as that's what LLVM needs).

This PR prepares simd_shuffle to also support a vector as the `idx` argument. Once this lands, stdarch can hopefully be updated to pass `idx` as a vector, and then support for arrays can be removed, which finally lets us get rid of that hack.
2024-08-27 01:46:50 -05:00
Trevor Gross
9c26ebe32e
Rollup merge of #126985 - Mrmaxmeier:dwarf-embed-source, r=davidtwco
Implement `-Z embed-source` (DWARFv5 source code embedding extension)

Implement https://github.com/rust-lang/compiler-team/issues/764 MCP which adds an unstable flag that exposes LLVM's [DWARFv5 source code embedding](https://dwarfstd.org/issues/180201.1.html) support.
2024-08-27 01:46:49 -05:00
Michael Goulet
38e62b9841 Use unsafe extern blocks throughout the compiler 2024-08-26 19:51:05 -04:00
Matthias Krüger
110c3df7fd
Rollup merge of #126013 - nnethercote:unreachable_pub, r=Urgau
Add `#[warn(unreachable_pub)]` to a bunch of compiler crates

By default `unreachable_pub` identifies things that need not be `pub` and tells you to make them `pub(crate)`. But sometimes those things don't need any kind of visibility. So they way I did these was to remove the visibility entirely for each thing the lint identifies, and then add `pub(crate)` back in everywhere the compiler said it was necessary. (Or occasionally `pub(super)` when context suggested that was appropriate.) Tedious, but results in more `pub` removal.

There are plenty more crates to do but this seems like enough for a first PR.

r? `@compiler-errors`
2024-08-27 00:41:57 +02:00
beetrees
abd44fc5f4
Add f16 and f128 inline ASM support for aarch64 2024-08-25 00:13:25 +01:00
Sami Tolvanen
40f1d9d154 Add missing module flags for CFI and KCFI sanitizers
Set the cfi-normalize-integers and kcfi-offset module flags when
Control-Flow Integrity sanitizers are used, so functions generated by
the LLVM backend use the same CFI/KCFI options as rustc.

cfi-normalize-integers tells LLVM to also use integer normalization
for generated functions when -Zsanitizer-cfi-normalize-integers is
used.

kcfi-offset specifies the number of prefix nops between the KCFI
type hash and the function entry when -Z patchable-function-entry is
used. Note that LLVM assumes all indirectly callable functions use the
same number of prefix NOPs with -Zsanitizer=kcfi.
2024-08-21 20:23:56 +00:00
Matthias Krüger
e961d6b204
Rollup merge of #129332 - cuviper:cstr-cast, r=compiler-errors
Avoid extra `cast()`s after `CStr::as_ptr()`

These used to be `&str` literals that did need a pointer cast, but that
became a no-op after switching to `c""` literals in #118566.
2024-08-21 18:15:04 +02:00
Matthias Krüger
dea325e583
Rollup merge of #128627 - khuey:DUMMY_SP-line-no, r=nnethercote
Special case DUMMY_SP to emit line 0/column 0 locations on DWARF platforms.

Line 0 has a special meaning in DWARF. From the version 5 spec:

    The compiler may emit the value 0 in cases
    where an instruction cannot be attributed to any
    source line.

DUMMY_SP spans cannot be attributed to any line. However, because rustc internally stores line numbers starting at zero, lookup_debug_loc() adjusts every line number by one. Special casing DUMMY_SP to actually emit line 0 ensures rustc communicates to the debugger that there's no meaningful source code for this instruction, rather than telling the debugger to jump to line 1 randomly.
2024-08-21 18:15:01 +02:00
Josh Stone
e424e7fcaa Avoid extra cast()s after CStr::as_ptr()
These used to be `&str` literals that did need a pointer cast, but that
became a no-op after switching to `c""` literals in #118566.
2024-08-20 14:04:48 -07:00
Kyle Huey
4e9725cd2f Add a comment. 2024-08-19 17:13:30 -07:00
Trevor Gross
f69e74e2f5 Update some dependency versions that allow better licensing
With the new resolver, a few dependencies get brought in twice with
different licenses. For example, all dependencies from `wasm-tools`
gained Apache-2.0 and MIT options, and with the v2 resolver we were
using one version from before and one version from after this change.
This made tidy's license check difficult.

Update some minimum versions to remove duplicate dependencies and smooth
out license checking.
2024-08-18 13:59:27 -05:00
许杰友 Jieyou Xu (Joe)
42b54a98b6
Rollup merge of #129173 - beetrees:statically-known-float, r=compiler-errors
Fix `is_val_statically_known` for floats

The LLVM intrinsic name for floats differs from the LLVM type name, so handle them explicitly. Also adds support for `f16` and `f128`.

`f16`/`f128` tracking issue: #116909
2024-08-18 14:55:22 +08:00
Chris Denton
0156eb57a1
Always use ar_archive_writer for import libs 2024-08-17 19:10:46 +00:00
beetrees
9bc7cea412
Fix is_val_statically_known for floats 2024-08-17 02:14:23 +01:00
Nicholas Nethercote
61627438eb Add warn(unreachable_pub) to rustc_codegen_llvm. 2024-08-16 08:46:57 +10:00
bors
d2b5aa6552 Auto merge of #128936 - bjorn3:fix_thin_archive_reading, r=jieyouxu
Support reading thin archives in ArArchiveBuilder

And switch to using ArArchiveBuilder with the LLVM backend too now that all regressions are fixed.

Fixes https://github.com/rust-lang/rust/issues/107407
Fixes https://github.com/rust-lang/rust/issues/107162
https://github.com/rust-lang/rust/issues/107495 has been fixed in a previous PR already.
2024-08-15 14:13:52 +00:00
bors
3139ff09e9 Auto merge of #128861 - khuey:mir-inlining-parameters-debuginfo, r=wesleywiser
Rework MIR inlining debuginfo so function parameters show up in debuggers.

Line numbers of multiply-inlined functions were fixed in #114643 by using a single DISubprogram. That, however, triggered assertions because parameters weren't deduplicated. The "solution" to that in #115417 was to insert a DILexicalScope below the DISubprogram and parent all of the parameters to that scope. That fixed the assertion, but debuggers (including gdb and lldb) don't recognize variables that are not parented to the subprogram itself as parameters, even if they are emitted with DW_TAG_formal_parameter.

Consider the program:

```rust
use std::env;

#[inline(always)]
fn square(n: i32) -> i32 {
    n * n
}

#[inline(never)]
fn square_no_inline(n: i32) -> i32 {
    n * n
}

fn main() {
    let x = square(env::vars().count() as i32);
    let y = square_no_inline(env::vars().count() as i32);
    println!("{x} == {y}");
}
```

When making a release build with debug=2 and rustc 1.82.0-nightly (8b3870784 2024-08-07)

```
(gdb) r
Starting program: /ephemeral/tmp/target/release/tmp [Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".

Breakpoint 1, tmp::square () at src/main.rs:5
5	    n * n
(gdb) info args
No arguments.
(gdb) info locals
n = 31
(gdb) c
Continuing.

Breakpoint 2, tmp::square_no_inline (n=31) at src/main.rs:10
10	    n * n
(gdb) info args
n = 31
(gdb) info locals
No locals.
```

This issue is particularly annoying because it removes arguments from stack traces.

The DWARF for the inlined function looks like this:

```
< 2><0x00002132 GOFF=0x00002132>      DW_TAG_subprogram
                                        DW_AT_linkage_name          _ZN3tmp6square17hc507052ff3d2a488E
                                        DW_AT_name                  square
                                        DW_AT_decl_file             0x0000000f /ephemeral/tmp/src/main.rs
                                        DW_AT_decl_line             0x00000004
                                        DW_AT_type                  0x00001a56<.debug_info+0x00001a56>
                                        DW_AT_inline                DW_INL_inlined
< 3><0x00002142 GOFF=0x00002142>        DW_TAG_lexical_block
< 4><0x00002143 GOFF=0x00002143>          DW_TAG_formal_parameter
                                            DW_AT_name                  n
                                            DW_AT_decl_file             0x0000000f /ephemeral/tmp/src/main.rs
                                            DW_AT_decl_line             0x00000004
                                            DW_AT_type                  0x00001a56<.debug_info+0x00001a56>
< 4><0x0000214e GOFF=0x0000214e>          DW_TAG_null
< 3><0x0000214f GOFF=0x0000214f>        DW_TAG_null
```

That DW_TAG_lexical_block inhibits every debugger I've tested from recognizing 'n' as a parameter.

This patch removes the additional lexical scope. Parameters can be easily deduplicated by a tuple of their scope and the argument index, at the trivial cost of taking a Hash + Eq bound on DIScope.
2024-08-15 11:42:15 +00:00
bors
026e9ed3f0 Auto merge of #128037 - beetrees:repr128-c-style-use-natvis, r=michaelwoerister
Use the `enum2$` Natvis visualiser for repr128 C-style enums

Use the preexisting `enum2$` Natvis visualiser to allow PDB debuggers to display fieldless `#[repr(u128)]]`/`#[repr(i128)]]` enums correctly.

Tracking issue: #56071

try-job: x86_64-msvc
2024-08-15 09:17:24 +00:00
bjorn3
9de0d147f4 Unconditionally use the LLVM symbol reader
This may fix a linker error on MSVC
2024-08-14 16:50:48 +00:00
bors
e9c965df7b Auto merge of #128812 - nnethercote:shrink-TyKind-FnPtr, r=compiler-errors
Shrink `TyKind::FnPtr`.

By splitting the `FnSig` within `TyKind::FnPtr` into `FnSigTys` and `FnHeader`, which can be packed more efficiently. This reduces the size of the hot `TyKind` type from 32 bytes to 24 bytes on 64-bit platforms. This reduces peak memory usage by a few percent on some benchmarks. It also reduces cache misses and page faults similarly, though this doesn't translate to clear cycles or wall-time improvements on CI.

r? `@compiler-errors`
2024-08-14 00:56:53 +00:00
beetrees
fe4fa2f1da
Use the enum2$ Natvis visualiser for repr128 C-style enums 2024-08-13 19:53:21 +01:00
Ralf Jung
194baa820d simd_shuffle intrinsic: allow argument to be passed as vector (not just as array) 2024-08-13 07:51:17 +02:00
Kyle Huey
1c5e3c90cf Rework MIR inlining debuginfo so function parameters show up in debuggers.
Line numbers of multiply-inlined functions were fixed in #114643 by using a
single DISubprogram. That, however, triggered assertions because parameters
weren't deduplicated. The "solution" to that in #115417 was to insert a
DILexicalScope below the DISubprogram and parent all of the parameters to that
scope. That fixed the assertion, but debuggers (including gdb and lldb) don't
recognize variables that are not parented to the subprogram itself as parameters,
even if they are emitted with DW_TAG_formal_parameter.

Consider the program:

use std::env;

fn square(n: i32) -> i32 {
    n * n
}

fn square_no_inline(n: i32) -> i32 {
    n * n
}

fn main() {
    let x = square(env::vars().count() as i32);
    let y = square_no_inline(env::vars().count() as i32);
    println!("{x} == {y}");
}

When making a release build with debug=2 and rustc 1.82.0-nightly (8b3870784 2024-08-07)

(gdb) r
Starting program: /ephemeral/tmp/target/release/tmp
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".

Breakpoint 1, tmp::square () at src/main.rs:5
5	    n * n
(gdb) info args
No arguments.
(gdb) info locals
n = 31
(gdb) c
Continuing.

Breakpoint 2, tmp::square_no_inline (n=31) at src/main.rs:10
10	    n * n
(gdb) info args
n = 31
(gdb) info locals
No locals.

This issue is particularly annoying because it removes arguments from stack traces.

The DWARF for the inlined function looks like this:

< 2><0x00002132 GOFF=0x00002132>      DW_TAG_subprogram
                                        DW_AT_linkage_name          _ZN3tmp6square17hc507052ff3d2a488E
                                        DW_AT_name                  square
                                        DW_AT_decl_file             0x0000000f /ephemeral/tmp/src/main.rs
                                        DW_AT_decl_line             0x00000004
                                        DW_AT_type                  0x00001a56<.debug_info+0x00001a56>
                                        DW_AT_inline                DW_INL_inlined
< 3><0x00002142 GOFF=0x00002142>        DW_TAG_lexical_block
< 4><0x00002143 GOFF=0x00002143>          DW_TAG_formal_parameter
                                            DW_AT_name                  n
                                            DW_AT_decl_file             0x0000000f /ephemeral/tmp/src/main.rs
                                            DW_AT_decl_line             0x00000004
                                            DW_AT_type                  0x00001a56<.debug_info+0x00001a56>
< 4><0x0000214e GOFF=0x0000214e>          DW_TAG_null
< 3><0x0000214f GOFF=0x0000214f>        DW_TAG_null

That DW_TAG_lexical_block inhibits every debugger I've tested from recognizing
'n' as a parameter.

This patch removes the additional lexical scope. Parameters can be easily
deduplicated by a tuple of their scope and the argument index, at the trivial
cost of taking a Hash + Eq bound on DIScope.
2024-08-12 19:20:00 -07:00
Guillaume Gomez
7c6dca9050
Rollup merge of #128978 - compiler-errors:assert-matches, r=jieyouxu
Use `assert_matches` around the compiler more

It's a useful assertion, especially since it actually prints out the LHS.
2024-08-12 17:09:19 +02:00
Guillaume Gomez
aea5087964
Rollup merge of #128537 - Jamesbarford:118980-const-vector, r=RalfJung,nikic
const vector passed through to codegen

This allows constant vectors using a repr(simd) type to be propagated
through to the backend by reusing the functionality used to do a similar
thing for the simd_shuffle intrinsic

#118209

r​? RalfJung
2024-08-12 17:09:15 +02:00
Guillaume Gomez
095ca33bb6
Rollup merge of #128149 - RalfJung:nontemporal_store, r=jieyouxu,Amanieu,Jubilee
nontemporal_store: make sure that the intrinsic is truly just a hint

The `!nontemporal` flag for stores in LLVM *sounds* like it is just a hint, but actually, it is not -- at least on x86, non-temporal stores need very special treatment by the programmer or else the Rust memory model breaks down. LLVM still treats these stores as-if they were normal stores for optimizations, which is [highly dubious](https://github.com/llvm/llvm-project/issues/64521). Let's avoid all that dubiousness by making our own non-temporal stores be truly just a hint, which is possible on some targets (e.g. ARM). On all other targets, non-temporal stores become regular stores.

~~Blocked on https://github.com/rust-lang/stdarch/pull/1541 propagating to the rustc repo, to make sure the `_mm_stream` intrinsics are unaffected by this change.~~

Fixes https://github.com/rust-lang/rust/issues/114582
Cc `@Amanieu` `@workingjubilee`
2024-08-12 17:09:14 +02:00
bors
e08b80c0fb Auto merge of #128371 - andjo403:rangeAttribute, r=nikic
Add range attribute to scalar function results and arguments

as LLVM 19 adds the range attribute this starts to use it for better optimization.
hade been interesting to see a perf run with the https://github.com/rust-lang/rust/pull/127513

closes https://github.com/rust-lang/rust/issues/50156
cc https://github.com/rust-lang/rust/issues/49572 shall be fixed but not possible to see as there is asserts that already trigger the optimization.
2024-08-12 10:20:00 +00:00
Ralf Jung
75743dc5a0 make the codegen test also cover an ill-behaved arch, and add links 2024-08-12 11:42:38 +02:00
Andreas Jonson
cfadfabfcd Add range attribute to scalar function results and arguments 2024-08-11 19:40:44 +02:00
Michael Goulet
c361c924a0 Use assert_matches around the compiler 2024-08-11 12:25:39 -04:00
bjorn3
db68a19b61 Fix review comments and other improvements 2024-08-11 10:29:32 +00:00
bjorn3
d63a067bfd Add fixme for removing LlvmArchiveBuilder in the future 2024-08-10 18:49:36 +00:00
bjorn3
c1f5350df5 Use ArArchiveBuilder with the LLVM backend too
All regressions that were blocking usage of ArArchiveBuilder should now
be fixed.
2024-08-10 17:45:39 +00:00
Nicholas Nethercote
c4717cc9d1 Shrink TyKind::FnPtr.
By splitting the `FnSig` within `TyKind::FnPtr` into `FnSigTys` and
`FnHeader`, which can be packed more efficiently. This reduces the size
of the hot `TyKind` type from 32 bytes to 24 bytes on 64-bit platforms.
This reduces peak memory usage by a few percent on some benchmarks. It
also reduces cache misses and page faults similarly, though this doesn't
translate to clear cycles or wall-time improvements on CI.
2024-08-09 14:33:25 +10:00
yifei
27f92b6c10 fix: get llvm type of global val 2024-08-09 10:58:32 +08:00
Michael Goulet
b916431976 Rename struct_tail_erasing_lifetimes to struct_tail_for_codegen 2024-08-08 12:15:16 -04:00
Michael Goulet
85b5e42d5e Do normalize when computing struct tails in codegen 2024-08-08 11:58:11 -04:00
James Barford-Evans
27ca35aa1b const vector passed to codegen 2024-08-08 11:15:03 +01:00
Matthias Krüger
8f39b86a6a
Rollup merge of #128679 - RalfJung:codegen-fn-attrs, r=nikic
codegen: better centralize function declaration attribute computation

For some reason, the codegen backend has two functions that compute which attributes a function declaration gets: `apply_attrs_llfn` and `attributes::from_fn_attrs`. They are called in different places, on entirely different layers of abstraction.

To me the code seems cleaner if we centralize this entirely in `apply_attrs_llfn`, so that's what this PR does.
2024-08-07 20:28:18 +02:00
Matthias Krüger
904f5795a0
Rollup merge of #128221 - calebzulawski:implied-target-features, r=Amanieu
Add implied target features to target_feature attribute

See [zulip](https://rust-lang.zulipchat.com/#narrow/stream/208962-t-libs.2Fstdarch/topic/Why.20would.20target-feature.20include.20implied.20features.3F) for some context.  Adds implied target features, e.g. `#[target_feature(enable = "avx2")]` acts like `#[target_feature(enable = "avx2,avx,sse4.2,sse4.1...")]`.  Fixes #128125, fixes #128426

The implied feature sets are taken from [the rust reference](https://doc.rust-lang.org/reference/attributes/codegen.html?highlight=target-fea#x86-or-x86_64), there are certainly more features and targets to add.

Please feel free to reassign this to whoever should review it.

r? ``@Amanieu``
2024-08-07 20:28:16 +02:00
Ralf Jung
273c67db83 codegen: better centralize function attribute computation 2024-08-07 19:49:48 +02:00
Guillaume Gomez
355eb9c79f
Rollup merge of #128206 - bjorn3:import_lib_writing_refactor, r=jieyouxu
Make create_dll_import_lib easier to implement

This will make it easier to implement raw-dylib support in cg_clif and cg_gcc. This PR doesn't yet include an create_dll_import_lib implementation for cg_clif as I need to correctly implement dllimport in cg_clif first before raw-dylib can work at all with cg_clif.

Required for https://github.com/rust-lang/rustc_codegen_cranelift/issues/1345
2024-08-07 15:59:35 +02:00
Caleb Zulawski
8818c95528 Disallow enabling features without their implied features 2024-08-07 00:45:00 -04:00
Caleb Zulawski
83276f5680 Hide implicit target features from diagnostics when possible 2024-08-07 00:43:52 -04:00
Caleb Zulawski
6b96a60611 Add implied features to non-target-feature functions 2024-08-07 00:41:48 -04:00
Caleb Zulawski
5006711744 Remove redundant implied features 2024-08-07 00:41:48 -04:00
Caleb Zulawski
a25da077cf Don't use LLVM to compute -Ctarget-feature 2024-08-07 00:41:48 -04:00
Caleb Zulawski
484aca8857 Don't use LLVM's target features 2024-08-07 00:41:48 -04:00
Caleb Zulawski
fbd618d4aa Refactor and fill out target feature lists 2024-08-07 00:41:48 -04:00
Caleb Zulawski
74653b61a6 Add implied target features to target_feature attribute 2024-08-07 00:41:48 -04:00
Trevor Gross
b3bfd66627
Rollup merge of #128417 - tgross35:f16-f128-math, r=dtolnay
Add `f16` and `f128` math functions

This adds intrinsics and math functions for `f16` and `f128` floating point types. Support is quite limited and some things are broken so tests don't run on many platforms, but this provides a starting point.
2024-08-06 22:17:32 -05:00
Ralf Jung
697787a92d RISC-V also has sane nontemporal stores 2024-08-05 10:57:14 +02:00
Ralf Jung
28e0907111 nontemporal_store: make sure that the intrinsic is truly just a hint 2024-08-05 10:57:14 +02:00
Kyle Huey
5dc4a1969c Fix warning. 2024-08-04 06:09:55 -07:00
Kyle Huey
e587855538 Use Span::is_dummy(). 2024-08-04 05:26:50 -07:00
daxpedda
80b74d397f
Implement a implicit target feature mechanism 2024-08-04 08:44:23 +02:00
Kyle Huey
78caecf8f3 Special case DUMMY_SP to emit line 0/column 0 locations on DWARF platforms.
Line 0 has a special meaning in DWARF. From the version 5 spec:

    The compiler may emit the value 0 in cases
    where an instruction cannot be attributed to any
    source line.

DUMMY_SP spans cannot be attributed to any line. However, because rustc
internally stores line numbers starting at zero, lookup_debug_loc() adjusts
every line number by one. Special casing DUMMY_SP to actually emit line 0
ensures rustc communicates to the debugger that there's no meaningful source
code for this instruction, rather than telling the debugger to jump to line 1
randomly.
2024-08-03 21:18:52 -07:00
Trevor Gross
e6d570241f Specify the integer type of the powi LLVM intrinsic
Since LLVM <https://reviews.llvm.org/D99439> (4c7f820b2b20, "Update
@llvm.powi to handle different int sizes for the exponent"), the size of
the integer can be specified for the `powi` intrinsic. Make use of this
so it is more obvious that integer size is consistent across all float
types.

This feature is available since LLVM 13 (October 2021). Based on
bootstrap we currently support >= 17.0, so there should be no support
problems.
2024-08-01 15:36:15 -04:00
Matthias Krüger
75dfe1e63d
Rollup merge of #127830 - tgross35:archive-failure-message, r=BoxyUwU
When an archive fails to build, print the path

Currently the output on failure is as follows:

       Compiling block-buffer v0.10.4
       Compiling crypto-common v0.1.6
       Compiling digest v0.10.7
       Compiling sha2 v0.10.8
       Compiling xz2 v0.1.7
    error: failed to build archive: No such file or directory

    error: could not compile `bootstrap` (lib) due to 1 previous error

Change this to print which file is being constructed, to give some hint about what is going on.

    error: failed to build archive at `path/to/output`: No such file or directory
2024-07-31 15:36:30 +02:00
bjorn3
216686bfa5 Move mingw dlltool invocation to cg_ssa 2024-07-30 10:33:33 +00:00
bjorn3
3c987cbe02 Move computation of decorated names out of the create_dll_import_lib method 2024-07-30 10:32:32 +00:00
bjorn3
bb764bd406 Move is_mingw_gnu_toolchain and i686_decorated_name to cg_ssa 2024-07-30 10:30:09 +00:00
bjorn3
ee89db9b17 Move temp file name generation out of the create_dll_import_lib method 2024-07-30 10:10:41 +00:00
bors
7e3a971870 Auto merge of #128378 - matthiaskrgr:rollup-i3qz9uo, r=matthiaskrgr
Rollup of 4 pull requests

Successful merges:

 - #127574 (elaborate unknowable goals)
 - #128141 (Set branch protection function attributes)
 - #128315 (Fix vita build of std and forbid unsafe in unsafe in the os/vita module)
 - #128339 ([rustdoc] Make the buttons remain when code example is clicked)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-07-30 05:50:05 +00:00
bors
710ce90fbe Auto merge of #128250 - Amanieu:select_unpredictable, r=nikic
Add `select_unpredictable` to force LLVM to use CMOV

Since https://reviews.llvm.org/D118118, LLVM will no longer turn CMOVs into branches if it comes from a `select` marked with an `unpredictable` metadata attribute.

This PR introduces `core::intrinsics::select_unpredictable` which emits such a `select` and uses it in the implementation of `binary_search_by`.
2024-07-30 03:22:27 +00:00
Matthias Krüger
6b23cb5cdf
Rollup merge of #128141 - nikic:aarch64-bti, r=DianQK,cuviper
Set branch protection function attributes

Since LLVM 19, it is necessary to set not only module flags, but also function attributes for branch protection on aarch64. See e15d67cfc2 for the relevant LLVM change.

Fixes https://github.com/rust-lang/rust/issues/127829.
2024-07-30 04:31:54 +02:00
Mrmaxmeier
0b87af9d4f Add -Z embed-source=yes to embed source code in DWARF debug info 2024-07-29 12:35:36 +02:00
bors
80d8270d84 Auto merge of #125016 - nicholasbishop:bishop-cb-112, r=tgross35
Update compiler_builtins to 0.1.114

The `weak-intrinsics` feature was removed from compiler_builtins in https://github.com/rust-lang/compiler-builtins/pull/598, so dropped the `compiler-builtins-weak-intrinsics` feature from alloc/std/sysroot.

In https://github.com/rust-lang/compiler-builtins/pull/593, some builtins for f16/f128 were added. These don't work for all compiler backends, so add a `compiler-builtins-no-f16-f128` feature and disable it for cranelift and gcc.
2024-07-29 07:41:33 +00:00
Nicholas Nethercote
84ac80f192 Reformat use declarations.
The previous commit updated `rustfmt.toml` appropriately. This commit is
the outcome of running `x fmt --all` with the new formatting options.
2024-07-29 08:26:52 +10:00
Guillaume Gomez
19feb90d69
Rollup merge of #127860 - klensy:dedup, r=Mark-Simulacrum
deps: dedup object, wasmparser, wasm-encoder

* dedups one `object`, additional dupe will be removed, with next `thorin-dwp` update
* `wasmparser` pinned to minor versions, so full merge isn't possible
* same with `wasm-encoder`

Turned off some features for `wasmparser` (see features https://github.com/bytecodealliance/wasm-tools/blob/v1.208.1/crates/wasmparser/Cargo.toml) in `run-make-support`, looks working?
2024-07-28 20:07:45 +02:00
Amanieu d'Antras
4f78f9fbb0 Force LLVM to use CMOV for binary search
Since https://reviews.llvm.org/D118118, LLVM will no longer turn CMOVs
into branches if it comes from a `select` marked with an `unpredictable`
metadata attribute.

This PR introduces `core::intrinsics::select_unpredictable` which emits
such a `select` and uses it in the implementation of `binary_search_by`.
2024-07-28 17:24:57 +01:00
klensy
58c9999f25 dedup object
waiting on thorin-dwp update

dedup one wasmparser

run-make-support: drop some features for wasmparser

dedupe wasm-encoder
2024-07-28 17:21:07 +03:00
Matthew Maurer
38931cd227 LLVM: LLVM-20.0 removes MMX types
See llvm/llvm-project#98505
2024-07-25 17:58:37 +00:00
bors
28e684b470 Auto merge of #127995 - workingjubilee:say-turings-prayer, r=BoxyUwU
compiler: Never debug_assert in codegen

In the name of Turing and his Hoarey heralds, assert our truths before creating a monster!

The `rustc_codegen_llvm` and `rustc_codegen_ssa` crates are fairly critical for rustc's correctness. Small mistakes here can easily result in undefined behavior, since a "small mistake" can mean something like "link and execute the wrong code". We should probably run any and all asserts in these modules unconditionally on whether this is a "debug build", and damn the costs in performance.

...Especially because the costs in performance seem to be *nothing*. It is not clear how much correctness we gain here, but I'll take free correctness improvements.
2024-07-25 07:52:31 +00:00
Nikita Popov
ea7625f426 Set branch protection function attributes
Since LLVM 19, it is necessary to set not only module flags, but
also function attributes for branch protection on aarch64. See
e15d67cfc2
for the relevant LLVM change.
2024-07-24 17:13:25 +02:00
Trevor Gross
5e8e46cbd2
Rollup merge of #127506 - liushuyu:s390x-target-features, r=davidtwco
rustc_target: add known safe s390x target features

This pull request adds known safe target features for s390x (aka IBM Z systems).
Currently, these features are unstable since stabilizing the target features requires submitting proposals.

The `vector` feature was added in IBM Z13 (`arch11`), and this is a SIMD feature for the newer IBM Z systems.
The `backchain` attribute is the IBM Z way of adding frame pointers like unwinding capabilities (the "frame-pointer" switch on IBM Z and IBM POWER platforms will add _emulated_ frame pointers to the binary, which profilers can't use for unwinding the stack).

Both attributes can be applied at the LLVM module or function levels. However, the `backchain` attribute has to be enabled for all the functions in the call stack to get a successful unwind process.
2024-07-22 11:40:19 -05:00
Jubilee Young
ce7b069fd8 compiler: Never debug_assert in codegen
The gains in performance are not worth the costs in correctness.
This is partly because the gains are zero and the costs are unknown.
2024-07-20 00:16:44 -07:00
Trevor Gross
986d6bf9fb
Rollup merge of #121533 - ratmice:wasm_init_fini_array, r=nnethercote
Handle .init_array link_section specially on wasm

Given that wasm-ld now has support for [.init_array](8f2bd8ae68/llvm/lib/MC/WasmObjectWriter.cpp (L1852)), it appears we can easily implement that section by falling through to the normal path rather than taking the typical custom_section path for wasm.

The wasm-ld appears to have a bunch of limitations. Only one static with the `link_section` in a crate or else you hit the fatal error in the link above "only one .init_array section fragment supported". They do not get merged.

You can still call multiple constructors by setting it to an array.

```
unsafe extern "C" fn ctor() {
    println!("foo");
}
#[used]
#[link_section = ".init_array"]
static FOO: [unsafe extern "C" fn(); 2] = [ctor, ctor];
```

Another issue appears to be that if crate *A* depends on crate *B*, but *A* doesn't call any symbols from *B* and *B* doesn't `#[export_name = ...]` any symbols, then crate *B*'s constructor will not be called.  The workaround to this is to provide an exported symbol in crate *B*.
2024-07-19 03:27:46 -05:00
liushuyu
01e6e60bf3 rustc_codegen_llvm: properly passing backchain attribute to LLVM ...
... this is a special attribute that was made to be a target-feature in
LLVM 18+, but in all previous versions, this "feature" is a naked
attribute. We will have to handle this situation differently than all
other target-features.
2024-07-17 07:56:00 +08:00
Trevor Gross
63f239c89f
Rollup merge of #124033 - bjorn3:ar_archive_writer_0_3_0, r=davidtwco
Sync ar_archive_writer to LLVM 18.1.3

From LLVM 15.0.0-rc3. This adds support for COFF archives containing Arm64EC object files and has various fixes for AIX big archive files.
2024-07-16 16:15:13 -05:00
Trevor Gross
e0af3c61cd When an archive fails to build, print the path
Currently the output on failure is as follows:

       Compiling block-buffer v0.10.4
       Compiling crypto-common v0.1.6
       Compiling digest v0.10.7
       Compiling sha2 v0.10.8
       Compiling xz2 v0.1.7
    error: failed to build archive: No such file or directory

    error: could not compile `bootstrap` (lib) due to 1 previous error

Print which file is being constructed to give some hint about what is
going on.
2024-07-16 15:44:54 -05:00
Michael Goulet
28503d69ac Fix unsafe_op_in_unsafe_fn in compiler 2024-07-16 00:02:44 -04:00
Zalathar
d4f1f92426 coverage: Restrict ExpressionUsed simplification to Code mappings
In the future, branch and MC/DC mappings might have expressions that don't
correspond to any single point in the control-flow graph. That makes it
trickier to keep track of which expressions should expect an `ExpressionUsed`
node.

We therefore sidestep that complexity by only performing `ExpressionUsed`
simplification for expressions associated directly with ordinary `Code`
mappings.
2024-07-15 20:54:28 +10:00
Jacob Pratt
cb1ccc1842
Rollup merge of #127654 - nikic:llvm-ndebug-fix, r=cuviper
Fix incorrect NDEBUG handling in LLVM bindings

We currently compile our LLVM bindings using `-DNDEBUG` if debuginfo for LLVM is disabled. However, `NDEBUG` doesn't have any relation to debuginfo, it controls whether assertions are enabled.

Split the LLVM_NDEBUG environment variable into two, so that assertions and debuginfo are controlled independently.

After this change, `LLVMRustDIBuilderInsertDeclareAtEnd` triggers an assertion failure on LLVM 19 due to an incorrect cast. Fix it by removing the unused return value entirely.

r? `@cuviper`
2024-07-13 00:24:35 -04:00
Nikita Popov
8dfd3a455d Remove LLVMRustDIBuilderInsertDeclareAtEnd return value
The return value changed from an Instruction to a DbgRecord in
LLVM 19. As we don't actually use the result, drop the return
value entirely to support both.
2024-07-12 22:15:10 +02:00
bors
5e311f933d Auto merge of #127614 - matthiaskrgr:rollup-8geziwi, r=matthiaskrgr
Rollup of 8 pull requests

Successful merges:

 - #124599 (Suggest borrowing on fn argument that is `impl AsRef`)
 - #127572 (Don't mark `DEBUG_EVENT` struct as `repr(packed)`)
 - #127588 (core: Limit remaining f16 doctests to x86_64 linux)
 - #127591 (Make sure that labels are defined after the primary span in diagnostics)
 - #127598 (Allows `#[diagnostic::do_not_recommend]` to supress trait impls in suggestions as well)
 - #127599 (Rename `lazy_cell_consume` to `lazy_cell_into_inner`)
 - #127601 (check is_ident before parse_ident)
 - #127605 (Remove extern "wasm" ABI)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-07-11 22:56:52 +00:00
bors
bcf1f6db45 Auto merge of #127487 - tgross35:f16-f128-simd, r=Amanieu
Add `f16` and `f128` as simd types in LLVM

`@sayantn` is working on adding SIMD for `f16` and hitting the `FloatingPointVector` error. This should fix it and unblock adding support for `simd_fma` and `simd_fabs` in stdarch.
2024-07-11 14:08:58 +00:00
Nikita Popov
8a50bcbdce Remove extern "wasm" ABI
Remove the unstable `extern "wasm"` ABI (`wasm_abi` feature tracked
in #83788).

As discussed in https://github.com/rust-lang/rust/pull/127513#issuecomment-2220410679
and following, this ABI is a failed experiment that did not end
up being used for anything. Keeping support for this ABI in LLVM 19
would require us to switch wasm targets to the `experimental-mv`
ABI, which we do not want to do.

It should be noted that `Abi::Wasm` was internally used for two
things: The `-Z wasm-c-abi=legacy` ABI that is still used by
default on some wasm targets, and the `extern "wasm"` ABI. Despite
both being `Abi::Wasm` internally, they were not the same. An
explicit `extern "wasm"` additionally enabled the `+multivalue`
feature.

I've opted to remove `Abi::Wasm` in this patch entirely, instead
of keeping it as an ABI with only internal usage. Both
`-Z wasm-c-abi` variants are now treated as part of the normal
C ABI, just with different different treatment in
adjust_for_foreign_abi.
2024-07-11 12:20:26 +02:00
bors
8672b2b763 Auto merge of #127001 - beetrees:f16-debuginfo, r=michaelwoerister
Add Natvis visualiser and debuginfo tests for `f16`

To render `f16`s in debuggers on MSVC targets, this PR changes the compiler to output `f16`s as `struct f16 { bits: u16 }`, and includes a Natvis visualiser that manually converts the `f16`'s bits to a `float` which is can then be displayed by debuggers. `gdb`, `lldb` and `cdb` tests are also included for `f16` .

`f16`/`f128` MSVC debug info issue: #121837
Tracking issue: #116909
2024-07-09 09:07:42 +00:00
beetrees
b058de90a3
Add Natvis visualiser and debuginfo tests for f16 2024-07-09 03:47:50 +01:00
Trevor Gross
04caa5555a Add f16 and f128 as SIMD types in LLVM 2024-07-08 13:59:39 -04:00
bjorn3
58e551433d Sync ar_archive_writer to LLVM 18.1.3
From LLVM 15.0.0-rc3. This adds support for COFF archives containing
Arm64EC object files and has various fixes for AIX big archive files.
2024-07-07 16:56:35 +00:00
bors
51917ba8f2 Auto merge of #126171 - RalfJung:simd_bitmask_multibyte, r=workingjubilee
simd_bitmask intrinsic: add a non-power-of-2 multi-byte example

r? `@calebzulawski` `@workingjubilee`
2024-07-05 01:58:22 +00:00
bors
489233170a Auto merge of #123781 - RalfJung:miri-fn-identity, r=oli-obk
Miri function identity hack: account for possible inlining

Having a non-lifetime generic is not the only reason a function can be duplicated. Another possibility is that the function may be eligible for cross-crate inlining. So also take into account the inlining attribute in this Miri hack for function pointer identity.

That said, `cross_crate_inlinable` will still sometimes return true even for `inline(never)` functions:
- when they are `DefKind::Ctor(..) | DefKind::Closure` -- I assume those cannot be `InlineAttr::Never` anyway?
- when `cross_crate_inline_threshold == InliningThreshold::Always`

so maybe this is still not quite the right criterion to use for function pointer identity.
2024-07-04 23:45:56 +00:00
Matthias Krüger
c74d620635
Rollup merge of #126803 - tgross35:verbose-asm, r=Amanieu
Change `asm-comments` to `verbose-asm`, always emit user comments

Implements what is described in https://github.com/rust-lang/compiler-team/issues/762

Tracking issue: https://github.com/rust-lang/rust/issues/126802
2024-07-03 17:26:53 +02:00
bors
c872a1418a Auto merge of #125507 - compiler-errors:type-length-limit, r=lcnr
Re-implement a type-size based limit

r? lcnr

This PR reintroduces the type length limit added in #37789, which was accidentally made practically useless by the caching changes to `Ty::walk` in #72412, which caused the `walk` function to no longer walk over identical elements.

Hitting this length limit is not fatal unless we are in codegen -- so it shouldn't affect passes like the mir inliner which creates potentially very large types (which we observed, for example, when the new trait solver compiles `itertools` in `--release` mode).

This also increases the type length limit from `1048576 == 2 ** 20` to `2 ** 24`, which covers all of the code that can be reached with craterbot-check. Individual crates can increase the length limit further if desired.

Perf regression is mild and I think we should accept it -- reinstating this limit is important for the new trait solver and to make sure we don't accidentally hit more type-size related regressions in the future.

Fixes #125460
2024-07-03 11:56:36 +00:00
Trevor Gross
c15a698f56 Rename the asm-comments compiler flag to verbose-asm
Since this codegen flag now only controls LLVM-generated comments rather than
all assembly comments, make the name more accurate (and also match Clang).
2024-07-02 21:42:01 -04:00
Michael Goulet
3273ccea4b Fix spans 2024-07-02 15:48:48 -04:00