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Trevor Gross d2ff033302
Rollup merge of #128731 - RalfJung:simd-shuffle-vector, r=workingjubilee 
simd_shuffle intrinsic: allow argument to be passed as vector

See https://github.com/rust-lang/rust/issues/128738 for context.

I'd like to get rid of [this hack](6c0b89dfac/compiler/rustc_codegen_ssa/src/mir/block.rs (L922-L935)). https://github.com/rust-lang/rust/pull/128537 almost lets us do that since constant SIMD vectors will then be passed as immediate arguments. However, simd_shuffle for some reason actually takes an *array* as argument, not a vector, so the hack is still required to ensure that the array becomes an immediate (which then later stages of codegen convert into a vector, as that's what LLVM needs).

This PR prepares simd_shuffle to also support a vector as the `idx` argument. Once this lands, stdarch can hopefully be updated to pass `idx` as a vector, and then support for arrays can be removed, which finally lets us get rid of that hack.
2024-08-27 01:46:50 -05:00
..
src Rollup merge of #128731 - RalfJung:simd-shuffle-vector, r=workingjubilee 2024-08-27 01:46:50 -05:00
Cargo.toml Update some dependency versions that allow better licensing 2024-08-18 13:59:27 -05:00
messages.ftl Always use ar_archive_writer for import libs 2024-08-17 19:10:46 +00:00
README.md mv compiler to compiler/ 2020-08-30 18:45:07 +03:00

README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.