Commit Graph

87 Commits

Author SHA1 Message Date
Matthias Krüger
40988591ec
Rollup merge of #91625 - est31:remove_indexes, r=oli-obk
Remove redundant [..]s
2021-12-10 22:40:36 +01:00
est31
15de4cbc4b Remove redundant [..]s 2021-12-09 00:01:29 +01:00
Amanieu d'Antras
908f300dd7 Remove the reg_thumb register class for asm! on ARM
Also restricts r8-r14 from being used on Thumb1 targets as per #90736.
2021-12-07 23:54:09 +00:00
Andrew Dona-Couch
c6e8ae1a6c Implement inline asm! for AVR platform 2021-12-06 01:02:49 -05:00
cynecx
91021de1f6 LLVM codgen support for unwinding inline assembly 2021-12-03 23:51:49 +01:00
cynecx
491dd1f387 Adjust llvm wrapper for unwinding support for inlineasm 2021-12-03 23:51:49 +01:00
Alex Crichton
d2a3c24a95 Update more rustc/libtest things for wasm64
* Add wasm64 variants for inline assembly along the same lines as wasm32
* Update a few directives in libtest to check for `target_family`
  instead of `target_arch`
* Update some rustc codegen and typechecks specialized for wasm32 to
  also work for wasm64.
2021-11-10 08:35:42 -08:00
Yuki Okushi
12647eab79
Properly check target_features not to trigger an assertion 2021-10-26 11:02:51 +09:00
Guillaume Gomez
759eba0a08 Fix clippy lints 2021-10-01 23:17:19 +02:00
Andreas Liljeqvist
5b2f757dae Make abi::Abi Copy and remove a *lot* of refs
fix

fix

Remove more refs and clones

fix

more

fix
2021-09-09 10:41:19 +02:00
Mara Bos
494c563f3b
Rollup merge of #88350 - programmerjake:add-ppc-cr-xer-clobbers, r=Amanieu
add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC

Fixes #88315
2021-09-01 09:23:26 +02:00
Jacob Lifshay
5802f60355 add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC
Fixes #88315
2021-08-25 22:08:27 -07:00
linux1
5f5afba5fb Feat: added s390x reg-definitions, constraint codes, and tests 2021-08-22 17:55:03 -04:00
linux1
f28793dd13 Feat: added inline asm support for s390x 2021-08-22 17:55:03 -04:00
bors
85109e257a Auto merge of #87581 - Amanieu:asm_clobber_abi, r=nagisa
Add support for clobber_abi to asm!

This PR adds the `clobber_abi` feature that was proposed in #81092.

Fixes #81092

cc `@rust-lang/wg-inline-asm`

r? `@nagisa`
2021-08-14 22:29:27 +00:00
Gary Guo
1fb1643129 Implement black_box using intrinsic
The new implementation allows some `memcpy`s to be optimized away,
so the uninit value in ui/sanitize/memory.rs is constructed directly
onto the return place. Therefore the sanitizer now says that the
value is allocated by `main` rather than `random`.
2021-08-12 16:16:57 +01:00
Amanieu d'Antras
2f4612260d Mark RISC-V vector state as clobbered in inline assembly 2021-08-12 12:42:58 +01:00
Josh Stone
183d79cc09 Prepare call/invoke for opaque pointers
Rather than relying on `getPointerElementType()` from LLVM function
pointers, we now pass the function type explicitly when building `call`
or `invoke` instructions.
2021-08-05 10:58:55 -07:00
bors
99f8efec46 Auto merge of #86416 - Amanieu:asm_clobber_only, r=nagisa
Add clobber-only register classes for asm!

These are needed to properly express a function call ABI using a clobber
list, even though we don't support passing actual values into/out of
these registers.
2021-07-11 01:06:58 +00:00
Amanieu d'Antras
e1c3f5e017 Add clobber-only register classes for asm!
These are needed to properly express a function call ABI using a clobber
list, even though we don't support passing actual values into/out of
these registers.
2021-07-10 17:29:00 +02:00
Alessandro Decina
b2a6967114 Add support for BPF inline assembly 2021-05-23 18:03:27 +10:00
Dr. Chat
69acee3ffe Add asm!() support for PowerPC64 2021-05-13 22:31:47 -05:00
Amanieu d'Antras
5918ee4317 Add support for const operands and options to global_asm!
On x86, the default syntax is also switched to Intel to match asm!
2021-05-13 22:31:57 +01:00
Dr. Chat
b1bb5d662c Add initial asm!() support for PowerPC
This includes GPRs and FPRs only
2021-05-11 19:04:16 -05:00
Amanieu d'Antras
ddc53f809b Allow clobbering unsupported registers in asm!
Previously registers could only be marked as clobbered if the target feature for that register was enabled. This restriction is now removed.
2021-04-04 10:42:32 +01:00
Amanieu d'Antras
fa3694fada Always lower asm! to valid HIR 2021-03-13 20:49:32 +00:00
Nikita Popov
bc96516a28 Mark pure asm as willreturn 2021-03-01 23:35:35 +01:00
est31
c5b9264929 Replace vec![] calls with slice literals
There is no need to create vec's here
2021-02-17 10:37:47 +01:00
Johnathan Van Why
fd21eb18e9 32-bit ARM: Emit lr instead of r14 when specified as an asm! output register.
On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.
2021-02-14 23:41:10 -08:00
Gus Caplan
d9f237caa6
Add wasm32 support to inline asm 2020-12-01 12:18:21 -06:00
khyperia
0e34b73996 Change capitalization of Spirv to SpirV
This matches the capitalization of RiscV
2020-11-11 19:18:06 +01:00
khyperia
f3441348e0 Add asm register information for SPIR-V 2020-11-11 17:38:02 +01:00
Joshua Nelson
57c6ed0c07 Fix even more clippy warnings 2020-10-30 10:13:39 -04:00
est31
4fa5578774 Replace target.target with target and target.ptr_width with target.pointer_width
Preparation for a subsequent change that replaces
rustc_target::config::Config with its wrapped Target.

On its own, this commit breaks the build. I don't like making
build-breaking commits, but in this instance I believe that it
makes review easier, as the "real" changes of this PR can be
seen much more easily.

Result of running:

find compiler/ -type f -exec sed -i -e 's/target\.target\([)\.,; ]\)/target\1/g' {} \;
find compiler/ -type f -exec sed -i -e 's/target\.target$/target/g' {} \;
find compiler/ -type f -exec sed -i -e 's/target.ptr_width/target.pointer_width/g' {} \;
./x.py fmt
2020-10-15 12:02:24 +02:00
Lzu Tao
79f477bb1f Add asm! support for mips64 2020-10-04 12:01:21 +00:00
Lzu Tao
9000710959 Add MIPS asm! support
This patch also:
* Add soft-float supports: only f32
* zero-extend i8/i16 to i32 because MIPS only supports register-length
  arithmetic.
* Update table in asm! chapter in unstable book.
2020-09-27 02:36:50 +00:00
mark
9e5f7d5631 mv compiler to compiler/ 2020-08-30 18:45:07 +03:00