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Add clobber-only register classes for asm!
These are needed to properly express a function call ABI using a clobber list, even though we don't support passing actual values into/out of these registers.
This commit is contained in:
Amanieu d'Antras
parent
1e13a9bb33
commit
e1c3f5e017
@ -199,6 +199,22 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
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}
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);
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// Some register classes can only be used as clobbers. This
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// means that we disallow passing a value in/out of the asm and
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// require that the operand name an explicit register, not a
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// register class.
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if reg_class.is_clobber_only(asm_arch.unwrap())
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&& !(is_clobber && matches!(reg, asm::InlineAsmRegOrRegClass::Reg(_)))
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{
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let msg = format!(
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"register class `{}` can only be used as a clobber, \
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not as an input or output",
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reg_class.name()
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);
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sess.struct_span_err(op_sp, &msg).emit();
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continue;
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}
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if !is_clobber {
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// Validate register classes against currently enabled target
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// features. We check that at least one type is available for
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@ -128,6 +128,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
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let mut clobbers = vec![];
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let mut output_types = vec![];
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let mut op_idx = FxHashMap::default();
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let mut clobbered_x87 = false;
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for (idx, op) in operands.iter().enumerate() {
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match *op {
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InlineAsmOperandRef::Out { reg, late, place } => {
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@ -150,7 +151,27 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
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let ty = if let Some(ref place) = place {
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layout = Some(&place.layout);
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llvm_fixup_output_type(self.cx, reg.reg_class(), &place.layout)
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} else if !is_target_supported(reg.reg_class()) {
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} else if matches!(
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reg.reg_class(),
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::mmx_reg | X86InlineAsmRegClass::x87_reg
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)
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) {
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// Special handling for x87/mmx registers: we always
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// clobber the whole set if one register is marked as
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// clobbered. This is due to the way LLVM handles the
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// FP stack in inline assembly.
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if !clobbered_x87 {
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clobbered_x87 = true;
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clobbers.push("~{st}".to_string());
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for i in 1..=7 {
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clobbers.push(format!("~{{st({})}}", i));
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}
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}
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continue;
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} else if !is_target_supported(reg.reg_class())
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|| reg.reg_class().is_clobber_only(asm_arch)
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{
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// We turn discarded outputs into clobber constraints
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// if the target feature needed by the register class is
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// disabled. This is necessary otherwise LLVM will try
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@ -564,6 +585,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg) => "w",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => "x",
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg_thumb) => "l",
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
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@ -585,6 +609,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => "f",
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => "Q",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => "q",
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@ -592,6 +619,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg) => "x",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => "v",
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InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => "^Yk",
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg,
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) => unreachable!("clobber-only"),
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
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@ -614,6 +644,9 @@ fn modifier_to_llvm(
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| InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
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if modifier == Some('v') { None } else { modifier }
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}
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg_thumb) => None,
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
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@ -636,6 +669,9 @@ fn modifier_to_llvm(
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InlineAsmRegClass::PowerPC(_) => None,
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg)
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| InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => None,
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg)
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => match modifier {
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None if arch == InlineAsmArch::X86_64 => Some('q'),
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@ -660,6 +696,9 @@ fn modifier_to_llvm(
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_ => unreachable!(),
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},
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InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => None,
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InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => None,
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
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@ -677,6 +716,9 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
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| InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::vreg_low16) => {
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cx.type_vector(cx.type_i64(), 2)
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}
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InlineAsmRegClass::AArch64(AArch64InlineAsmRegClass::preg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg)
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| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::reg_thumb) => cx.type_i32(),
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InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg)
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@ -700,6 +742,9 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
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InlineAsmRegClass::PowerPC(PowerPCInlineAsmRegClass::freg) => cx.type_f64(),
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg) => cx.type_i32(),
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => cx.type_f32(),
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InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg)
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_abcd) => cx.type_i32(),
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InlineAsmRegClass::X86(X86InlineAsmRegClass::reg_byte) => cx.type_i8(),
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@ -707,6 +752,9 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::ymm_reg)
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| InlineAsmRegClass::X86(X86InlineAsmRegClass::zmm_reg) => cx.type_f32(),
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InlineAsmRegClass::X86(X86InlineAsmRegClass::kreg) => cx.type_i16(),
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InlineAsmRegClass::X86(X86InlineAsmRegClass::x87_reg | X86InlineAsmRegClass::mmx_reg) => {
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unreachable!("clobber-only")
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}
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
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@ -752,6 +752,7 @@ symbols! {
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minnumf64,
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mips_target_feature,
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misc,
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mmx_reg,
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modifiers,
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module,
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module_path,
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@ -894,6 +895,7 @@ symbols! {
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prefetch_read_instruction,
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prefetch_write_data,
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prefetch_write_instruction,
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preg,
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prelude,
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prelude_import,
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preserves_flags,
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@ -1333,6 +1335,7 @@ symbols! {
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wrapping_mul,
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wrapping_sub,
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write_bytes,
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x87_reg,
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xmm_reg,
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ymm_reg,
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zmm_reg,
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@ -7,6 +7,7 @@ def_reg_class! {
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reg,
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vreg,
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vreg_low16,
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preg,
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}
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}
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@ -15,6 +16,7 @@ impl AArch64InlineAsmRegClass {
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match self {
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Self::reg => &['w', 'x'],
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Self::vreg | Self::vreg_low16 => &['b', 'h', 's', 'd', 'q', 'v'],
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Self::preg => &[],
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}
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}
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@ -40,6 +42,7 @@ impl AArch64InlineAsmRegClass {
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128 => Some(('q', "q0")),
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_ => None,
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},
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Self::preg => None,
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}
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}
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@ -47,6 +50,7 @@ impl AArch64InlineAsmRegClass {
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match self {
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Self::reg => Some(('x', "x0")),
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Self::vreg | Self::vreg_low16 => Some(('v', "v0")),
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Self::preg => None,
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}
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}
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@ -61,6 +65,7 @@ impl AArch64InlineAsmRegClass {
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VecI8(8), VecI16(4), VecI32(2), VecI64(1), VecF32(2), VecF64(1),
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VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF32(4), VecF64(2);
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},
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Self::preg => &[],
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}
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}
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}
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@ -127,6 +132,23 @@ def_regs! {
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v29: vreg = ["v29", "b29", "h29", "s29", "d29", "q29"],
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v30: vreg = ["v30", "b30", "h30", "s30", "d30", "q30"],
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v31: vreg = ["v31", "b31", "h31", "s31", "d31", "q31"],
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p0: preg = ["p0"],
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p1: preg = ["p1"],
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p2: preg = ["p2"],
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p3: preg = ["p3"],
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p4: preg = ["p4"],
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p5: preg = ["p5"],
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p6: preg = ["p6"],
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p7: preg = ["p7"],
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p8: preg = ["p8"],
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p9: preg = ["p9"],
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p10: preg = ["p10"],
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p11: preg = ["p11"],
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p12: preg = ["p12"],
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p13: preg = ["p13"],
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p14: preg = ["p14"],
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p15: preg = ["p15"],
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ffr: preg = ["ffr"],
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#error = ["x18", "w18"] =>
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"x18 is used as a reserved register on some targets and cannot be used as an operand for inline asm",
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#error = ["x19", "w19"] =>
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@ -513,6 +513,12 @@ impl InlineAsmRegClass {
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Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
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}
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}
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/// Returns whether registers in this class can only be used as clobbers
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/// and not as inputs/outputs.
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pub fn is_clobber_only(self, arch: InlineAsmArch) -> bool {
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self.supported_types(arch).is_empty()
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}
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}
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#[derive(
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@ -7,6 +7,7 @@ def_reg_class! {
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RiscV RiscVInlineAsmRegClass {
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reg,
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freg,
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vreg,
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}
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}
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@ -44,6 +45,7 @@ impl RiscVInlineAsmRegClass {
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}
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}
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Self::freg => types! { "f": F32; "d": F64; },
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Self::vreg => &[],
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}
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}
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}
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@ -120,6 +122,38 @@ def_regs! {
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f29: freg = ["f29", "ft9"],
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f30: freg = ["f30", "ft10"],
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f31: freg = ["f31", "ft11"],
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v0: vreg = ["v0"],
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v1: vreg = ["v1"],
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v2: vreg = ["v2"],
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v3: vreg = ["v3"],
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v4: vreg = ["v4"],
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v5: vreg = ["v5"],
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v6: vreg = ["v6"],
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v7: vreg = ["v7"],
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v8: vreg = ["v8"],
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v9: vreg = ["v9"],
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v10: vreg = ["v10"],
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v11: vreg = ["v11"],
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v12: vreg = ["v12"],
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v13: vreg = ["v13"],
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v14: vreg = ["v14"],
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v15: vreg = ["v15"],
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v16: vreg = ["v16"],
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v17: vreg = ["v17"],
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v18: vreg = ["v18"],
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v19: vreg = ["v19"],
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v20: vreg = ["v20"],
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v21: vreg = ["v21"],
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v22: vreg = ["v22"],
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v23: vreg = ["v23"],
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v24: vreg = ["v24"],
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v25: vreg = ["v25"],
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v26: vreg = ["v26"],
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v27: vreg = ["v27"],
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v28: vreg = ["v28"],
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v29: vreg = ["v29"],
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v30: vreg = ["v30"],
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v31: vreg = ["v31"],
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#error = ["x9", "s1"] =>
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"s1 is used internally by LLVM and cannot be used as an operand for inline asm",
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#error = ["x8", "s0", "fp"] =>
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@ -12,6 +12,8 @@ def_reg_class! {
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ymm_reg,
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zmm_reg,
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kreg,
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mmx_reg,
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x87_reg,
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}
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}
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@ -35,6 +37,7 @@ impl X86InlineAsmRegClass {
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Self::reg_byte => &[],
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Self::xmm_reg | Self::ymm_reg | Self::zmm_reg => &['x', 'y', 'z'],
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Self::kreg => &[],
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Self::mmx_reg | Self::x87_reg => &[],
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}
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}
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@ -73,6 +76,7 @@ impl X86InlineAsmRegClass {
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_ => Some(('x', "xmm0")),
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},
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Self::kreg => None,
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Self::mmx_reg | Self::x87_reg => None,
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}
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}
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@ -90,6 +94,7 @@ impl X86InlineAsmRegClass {
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Self::ymm_reg => Some(('y', "ymm0")),
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Self::zmm_reg => Some(('z', "zmm0")),
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Self::kreg => None,
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Self::mmx_reg | Self::x87_reg => None,
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}
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}
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@ -125,6 +130,7 @@ impl X86InlineAsmRegClass {
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"avx512f": I8, I16;
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"avx512bw": I32, I64;
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},
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Self::mmx_reg | Self::x87_reg => &[],
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}
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}
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}
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@ -285,16 +291,28 @@ def_regs! {
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k5: kreg = ["k5"],
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k6: kreg = ["k6"],
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k7: kreg = ["k7"],
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mm0: mmx_reg = ["mm0"],
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mm1: mmx_reg = ["mm1"],
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mm2: mmx_reg = ["mm2"],
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mm3: mmx_reg = ["mm3"],
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mm4: mmx_reg = ["mm4"],
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mm5: mmx_reg = ["mm5"],
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mm6: mmx_reg = ["mm6"],
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mm7: mmx_reg = ["mm7"],
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st0: x87_reg = ["st(0)", "st"],
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st1: x87_reg = ["st(1)"],
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st2: x87_reg = ["st(2)"],
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st3: x87_reg = ["st(3)"],
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st4: x87_reg = ["st(4)"],
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st5: x87_reg = ["st(5)"],
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st6: x87_reg = ["st(6)"],
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st7: x87_reg = ["st(7)"],
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#error = ["bp", "bpl", "ebp", "rbp"] =>
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"the frame pointer cannot be used as an operand for inline asm",
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#error = ["sp", "spl", "esp", "rsp"] =>
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"the stack pointer cannot be used as an operand for inline asm",
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#error = ["ip", "eip", "rip"] =>
|
||||
"the instruction pointer cannot be used as an operand for inline asm",
|
||||
#error = ["st", "st(0)", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)"] =>
|
||||
"x87 registers are not currently supported as operands for inline asm",
|
||||
#error = ["mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7"] =>
|
||||
"MMX registers are not currently supported as operands for inline asm",
|
||||
#error = ["k0"] =>
|
||||
"the k0 AVX mask register cannot be used as an operand for inline asm",
|
||||
}
|
||||
|
||||
@ -544,9 +544,12 @@ Here is the list of currently supported register classes:
|
||||
| x86 | `ymm_reg` | `ymm[0-7]` (x86) `ymm[0-15]` (x86-64) | `x` |
|
||||
| x86 | `zmm_reg` | `zmm[0-7]` (x86) `zmm[0-31]` (x86-64) | `v` |
|
||||
| x86 | `kreg` | `k[1-7]` | `Yk` |
|
||||
| x86 | `x87_reg` | `st([0-7])` | Only clobbers |
|
||||
| x86 | `mmx_reg` | `mm[0-7]` | Only clobbers |
|
||||
| AArch64 | `reg` | `x[0-30]` | `r` |
|
||||
| AArch64 | `vreg` | `v[0-31]` | `w` |
|
||||
| AArch64 | `vreg_low16` | `v[0-15]` | `x` |
|
||||
| AArch64 | `preg` | `p[0-15]`, `ffr` | Only clobbers |
|
||||
| ARM | `reg` | `r[0-12]`, `r14` | `r` |
|
||||
| ARM (Thumb) | `reg_thumb` | `r[0-r7]` | `l` |
|
||||
| ARM (ARM) | `reg_thumb` | `r[0-r12]`, `r14` | `l` |
|
||||
@ -565,6 +568,7 @@ Here is the list of currently supported register classes:
|
||||
| NVPTX | `reg64` | None\* | `l` |
|
||||
| RISC-V | `reg` | `x1`, `x[5-7]`, `x[9-15]`, `x[16-31]` (non-RV32E) | `r` |
|
||||
| RISC-V | `freg` | `f[0-31]` | `f` |
|
||||
| RISC-V | `vreg` | `v[0-31]` | Only clobbers |
|
||||
| Hexagon | `reg` | `r[0-28]` | `r` |
|
||||
| PowerPC | `reg` | `r[0-31]` | `r` |
|
||||
| PowerPC | `reg_nonzero` | | `r[1-31]` | `b` |
|
||||
@ -578,6 +582,8 @@ Here is the list of currently supported register classes:
|
||||
> Note #3: NVPTX doesn't have a fixed register set, so named registers are not supported.
|
||||
>
|
||||
> Note #4: WebAssembly doesn't have registers, so named registers are not supported.
|
||||
>
|
||||
> Note #5: Some register classes are marked as "Only clobbers" which means that they cannot be used for inputs or outputs, only clobbers of the form `out("reg") _` or `lateout("reg") _`.
|
||||
|
||||
Additional register classes may be added in the future based on demand (e.g. MMX, x87, etc).
|
||||
|
||||
@ -593,8 +599,11 @@ Each register class has constraints on which value types they can be used with.
|
||||
| x86 | `zmm_reg` | `avx512f` | `i32`, `f32`, `i64`, `f64`, <br> `i8x16`, `i16x8`, `i32x4`, `i64x2`, `f32x4`, `f64x2` <br> `i8x32`, `i16x16`, `i32x8`, `i64x4`, `f32x8`, `f64x4` <br> `i8x64`, `i16x32`, `i32x16`, `i64x8`, `f32x16`, `f64x8` |
|
||||
| x86 | `kreg` | `axv512f` | `i8`, `i16` |
|
||||
| x86 | `kreg` | `axv512bw` | `i32`, `i64` |
|
||||
| x86 | `mmx_reg` | N/A | Only clobbers |
|
||||
| x86 | `x87_reg` | N/A | Only clobbers |
|
||||
| AArch64 | `reg` | None | `i8`, `i16`, `i32`, `f32`, `i64`, `f64` |
|
||||
| AArch64 | `vreg` | `fp` | `i8`, `i16`, `i32`, `f32`, `i64`, `f64`, <br> `i8x8`, `i16x4`, `i32x2`, `i64x1`, `f32x2`, `f64x1`, <br> `i8x16`, `i16x8`, `i32x4`, `i64x2`, `f32x4`, `f64x2` |
|
||||
| AArch64 | `preg` | N/A | Only clobbers |
|
||||
| ARM | `reg` | None | `i8`, `i16`, `i32`, `f32` |
|
||||
| ARM | `sreg` | `vfp2` | `i32`, `f32` |
|
||||
| ARM | `dreg` | `vfp2` | `i64`, `f64`, `i8x8`, `i16x4`, `i32x2`, `i64x1`, `f32x2` |
|
||||
@ -610,6 +619,7 @@ Each register class has constraints on which value types they can be used with.
|
||||
| RISC-V64 | `reg` | None | `i8`, `i16`, `i32`, `f32`, `i64`, `f64` |
|
||||
| RISC-V | `freg` | `f` | `f32` |
|
||||
| RISC-V | `freg` | `d` | `f64` |
|
||||
| RISC-V | `vreg` | N/A | Only clobbers |
|
||||
| Hexagon | `reg` | None | `i8`, `i16`, `i32`, `f32` |
|
||||
| PowerPC | `reg` | None | `i8`, `i16`, `i32` |
|
||||
| PowerPC | `reg_nonzero` | None | `i8`, `i16`, `i32` |
|
||||
|
||||
19
src/test/codegen/asm-clobbers.rs
Normal file
19
src/test/codegen/asm-clobbers.rs
Normal file
@ -0,0 +1,19 @@
|
||||
// compile-flags: -O
|
||||
// only-x86_64
|
||||
|
||||
#![crate_type = "rlib"]
|
||||
#![feature(asm)]
|
||||
|
||||
// CHECK-LABEL: @x87_clobber
|
||||
// CHECK: ~{st},~{st(1)},~{st(2)},~{st(3)},~{st(4)},~{st(5)},~{st(6)},~{st(7)}
|
||||
#[no_mangle]
|
||||
pub unsafe fn x87_clobber() {
|
||||
asm!("foo", out("st") _);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @mmx_clobber
|
||||
// CHECK: ~{st},~{st(1)},~{st(2)},~{st(3)},~{st(4)},~{st(5)},~{st(6)},~{st(7)}
|
||||
#[no_mangle]
|
||||
pub unsafe fn mmx_clobber() {
|
||||
asm!("bar", out("mm0") _, out("mm1") _);
|
||||
}
|
||||
@ -31,15 +31,26 @@ fn main() {
|
||||
//~^ ERROR invalid register `rsp`: the stack pointer cannot be used as an operand
|
||||
asm!("", in("ip") foo);
|
||||
//~^ ERROR invalid register `ip`: the instruction pointer cannot be used as an operand
|
||||
asm!("", in("st(2)") foo);
|
||||
//~^ ERROR invalid register `st(2)`: x87 registers are not currently supported as operands
|
||||
asm!("", in("mm0") foo);
|
||||
//~^ ERROR invalid register `mm0`: MMX registers are not currently supported as operands
|
||||
asm!("", in("k0") foo);
|
||||
//~^ ERROR invalid register `k0`: the k0 AVX mask register cannot be used as an operand
|
||||
asm!("", in("ah") foo);
|
||||
//~^ ERROR invalid register `ah`: high byte registers cannot be used as an operand
|
||||
|
||||
asm!("", in("st(2)") foo);
|
||||
//~^ ERROR register class `x87_reg` can only be used as a clobber, not as an input or output
|
||||
asm!("", in("mm0") foo);
|
||||
//~^ ERROR register class `mmx_reg` can only be used as a clobber, not as an input or output
|
||||
asm!("", out("st(2)") _);
|
||||
asm!("", out("mm0") _);
|
||||
asm!("{}", in(x87_reg) foo);
|
||||
//~^ ERROR register class `x87_reg` can only be used as a clobber, not as an input or output
|
||||
asm!("{}", in(mmx_reg) foo);
|
||||
//~^ ERROR register class `mmx_reg` can only be used as a clobber, not as an input or output
|
||||
asm!("{}", out(x87_reg) _);
|
||||
//~^ ERROR register class `x87_reg` can only be used as a clobber, not as an input or output
|
||||
asm!("{}", out(mmx_reg) _);
|
||||
//~^ ERROR register class `mmx_reg` can only be used as a clobber, not as an input or output
|
||||
|
||||
// Explicit register conflicts
|
||||
// (except in/lateout which don't conflict)
|
||||
|
||||
|
||||
@ -76,32 +76,56 @@ error: invalid register `ip`: the instruction pointer cannot be used as an opera
|
||||
LL | asm!("", in("ip") foo);
|
||||
| ^^^^^^^^^^^^
|
||||
|
||||
error: invalid register `st(2)`: x87 registers are not currently supported as operands for inline asm
|
||||
--> $DIR/bad-reg.rs:34:18
|
||||
|
|
||||
LL | asm!("", in("st(2)") foo);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
|
||||
error: invalid register `mm0`: MMX registers are not currently supported as operands for inline asm
|
||||
--> $DIR/bad-reg.rs:36:18
|
||||
|
|
||||
LL | asm!("", in("mm0") foo);
|
||||
| ^^^^^^^^^^^^^
|
||||
|
||||
error: invalid register `k0`: the k0 AVX mask register cannot be used as an operand for inline asm
|
||||
--> $DIR/bad-reg.rs:38:18
|
||||
--> $DIR/bad-reg.rs:34:18
|
||||
|
|
||||
LL | asm!("", in("k0") foo);
|
||||
| ^^^^^^^^^^^^
|
||||
|
||||
error: invalid register `ah`: high byte registers cannot be used as an operand on x86_64
|
||||
--> $DIR/bad-reg.rs:40:18
|
||||
--> $DIR/bad-reg.rs:36:18
|
||||
|
|
||||
LL | asm!("", in("ah") foo);
|
||||
| ^^^^^^^^^^^^
|
||||
|
||||
error: register class `x87_reg` can only be used as a clobber, not as an input or output
|
||||
--> $DIR/bad-reg.rs:39:18
|
||||
|
|
||||
LL | asm!("", in("st(2)") foo);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
|
||||
error: register class `mmx_reg` can only be used as a clobber, not as an input or output
|
||||
--> $DIR/bad-reg.rs:41:18
|
||||
|
|
||||
LL | asm!("", in("mm0") foo);
|
||||
| ^^^^^^^^^^^^^
|
||||
|
||||
error: register class `x87_reg` can only be used as a clobber, not as an input or output
|
||||
--> $DIR/bad-reg.rs:45:20
|
||||
|
|
||||
LL | asm!("{}", in(x87_reg) foo);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
|
||||
error: register class `mmx_reg` can only be used as a clobber, not as an input or output
|
||||
--> $DIR/bad-reg.rs:47:20
|
||||
|
|
||||
LL | asm!("{}", in(mmx_reg) foo);
|
||||
| ^^^^^^^^^^^^^^^
|
||||
|
||||
error: register class `x87_reg` can only be used as a clobber, not as an input or output
|
||||
--> $DIR/bad-reg.rs:49:20
|
||||
|
|
||||
LL | asm!("{}", out(x87_reg) _);
|
||||
| ^^^^^^^^^^^^^^
|
||||
|
||||
error: register class `mmx_reg` can only be used as a clobber, not as an input or output
|
||||
--> $DIR/bad-reg.rs:51:20
|
||||
|
|
||||
LL | asm!("{}", out(mmx_reg) _);
|
||||
| ^^^^^^^^^^^^^^
|
||||
|
||||
error: register `al` conflicts with register `ax`
|
||||
--> $DIR/bad-reg.rs:46:33
|
||||
--> $DIR/bad-reg.rs:57:33
|
||||
|
|
||||
LL | asm!("", in("eax") foo, in("al") bar);
|
||||
| ------------- ^^^^^^^^^^^^ register `al`
|
||||
@ -109,7 +133,7 @@ LL | asm!("", in("eax") foo, in("al") bar);
|
||||
| register `ax`
|
||||
|
||||
error: register `ax` conflicts with register `ax`
|
||||
--> $DIR/bad-reg.rs:48:33
|
||||
--> $DIR/bad-reg.rs:59:33
|
||||
|
|
||||
LL | asm!("", in("rax") foo, out("rax") bar);
|
||||
| ------------- ^^^^^^^^^^^^^^ register `ax`
|
||||
@ -117,13 +141,13 @@ LL | asm!("", in("rax") foo, out("rax") bar);
|
||||
| register `ax`
|
||||
|
|
||||
help: use `lateout` instead of `out` to avoid conflict
|
||||
--> $DIR/bad-reg.rs:48:18
|
||||
--> $DIR/bad-reg.rs:59:18
|
||||
|
|
||||
LL | asm!("", in("rax") foo, out("rax") bar);
|
||||
| ^^^^^^^^^^^^^
|
||||
|
||||
error: register `ymm0` conflicts with register `xmm0`
|
||||
--> $DIR/bad-reg.rs:51:34
|
||||
--> $DIR/bad-reg.rs:62:34
|
||||
|
|
||||
LL | asm!("", in("xmm0") foo, in("ymm0") bar);
|
||||
| -------------- ^^^^^^^^^^^^^^ register `ymm0`
|
||||
@ -131,7 +155,7 @@ LL | asm!("", in("xmm0") foo, in("ymm0") bar);
|
||||
| register `xmm0`
|
||||
|
||||
error: register `ymm0` conflicts with register `xmm0`
|
||||
--> $DIR/bad-reg.rs:53:34
|
||||
--> $DIR/bad-reg.rs:64:34
|
||||
|
|
||||
LL | asm!("", in("xmm0") foo, out("ymm0") bar);
|
||||
| -------------- ^^^^^^^^^^^^^^^ register `ymm0`
|
||||
@ -139,10 +163,10 @@ LL | asm!("", in("xmm0") foo, out("ymm0") bar);
|
||||
| register `xmm0`
|
||||
|
|
||||
help: use `lateout` instead of `out` to avoid conflict
|
||||
--> $DIR/bad-reg.rs:53:18
|
||||
--> $DIR/bad-reg.rs:64:18
|
||||
|
|
||||
LL | asm!("", in("xmm0") foo, out("ymm0") bar);
|
||||
| ^^^^^^^^^^^^^^
|
||||
|
||||
error: aborting due to 19 previous errors
|
||||
error: aborting due to 23 previous errors
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user