Dario Nieuwenhuis
d90abb8ac9
stm32/usb: assert usb clock is okay.
2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
daa64bd540
stm32/usb: extract common init code.
2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
530ff9d4d3
stm32/usb: merge usb and usb_otg into single module.
2024-03-19 22:07:16 +01:00
Adam Greig
5a879b3ed1
STM32: SAI: Fix MCKDIV for SAI v3/v4
2024-03-19 02:17:50 +00:00
Dario Nieuwenhuis
6d9f87356b
Merge pull request #2677 from ExplodingWaffle/peri-clock
...
stm32/rcc: wait for peripheral clock to be active. also, hold the peripheral reset while enabling the clock.
2024-03-18 16:23:28 +00:00
Harry Brooke
1f9ffbfb18
remove peripheral reads
2024-03-18 00:05:02 +00:00
Corey Schuhen
3f5c8784af
FDCAN: Fix offset issue preventing CAN2 and CAN3 from working.
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Fix for not H7
2024-03-16 19:32:38 +10:00
Dario Nieuwenhuis
c580d4c490
Merge pull request #2701 from timokroeger/stm32-ucpd
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STM32 UCPD CI Test
2024-03-15 18:51:09 +00:00
Timo Kröger
21e2499f35
[UCPD] Fix dead-battery disable for G0
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Inverted flag got missed in the original PR.
2024-03-15 17:44:27 +01:00
Dario Nieuwenhuis
963fda2404
Merge pull request #2652 from timokroeger/stm32-ucpd
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STM32 USB Type-C/USB Power Delivery Interface (UCPD)
2024-03-14 21:21:33 +00:00
Timo Kröger
57ca072dc3
[UCPD] Enable RX PHY only when receiving
2024-03-14 22:05:22 +01:00
Timo Kröger
62b0410e86
[UCPD] Set CC pins to analog mode
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Example: On STM32G431 CC2 has a pull-up (default JTAG signal) which needs to be disabled.
2024-03-14 21:55:05 +01:00
Timo Kröger
88d1d38be7
[UCPD] RXORDSETEN can only be modified when disabled
2024-03-14 21:55:05 +01:00
Timo Kröger
b634f8f511
[UCPD] Fix hard reset interrupt disable flags
2024-03-14 21:55:05 +01:00
Timo Kröger
6e5bb8003a
[UCPD] Adjust TX clock divider
2024-03-14 21:55:05 +01:00
Timo Kröger
e95e95ac7a
[UCPD] Take interrupt in constructor and enable it
2024-03-14 21:55:05 +01:00
Corey Schuhen
535e4c20e8
Remove unused methods including incorrect #[must_use...
2024-03-14 08:21:45 +10:00
Corey Schuhen
242759a600
Use Result instead of Option for Frame creation.
2024-03-13 17:46:50 +10:00
Corey Schuhen
12a3af5043
Shared frame types.
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Remove BXCAN speciffic id and frame modules
Remove SizedClassicData
2024-03-13 17:46:50 +10:00
Dario Nieuwenhuis
35f284ec22
Merge pull request #2691 from caleb-garrett/cryp-dma
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STM32 CRYP DMA
2024-03-12 19:30:20 +00:00
Dario Nieuwenhuis
9101b9eb01
Merge pull request #2650 from cschuhen/feature/bxcan_pac
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Use stm32-metapac for BXCAN.
2024-03-12 19:05:22 +00:00
Caleb Garrett
2634a57098
Correct cryp CI build issues.
2024-03-12 15:05:22 -04:00
Caleb Garrett
1ec9fc58f4
Add async CRYP to test.
2024-03-12 14:52:34 -04:00
Caleb Garrett
61050a16d5
Add CRYP DMA support. Updated example.
2024-03-12 12:01:14 -04:00
Timo Kröger
30cdc6c9c5
[UCPD] Disable dead-battery resistor for all families
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Using the code from PR #2683 , thank you @ExplodingWaffle
Removes the dead-battery as selectable option because its unclear if
it can be re-enabled. Also there is no use case for it because the same
resistor can be configured with the sink option.
2024-03-12 08:49:27 +01:00
Timo Kröger
eeb033caf0
[UCPD] Disable RCC clock on drop
2024-03-12 08:14:42 +01:00
Timo Kröger
89504f5162
[UCPD] Split into CC and PD phy
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PD3.0 spec requires concurrent control of CC resistors for collision avoidance.
Needed to introduce some "ref counting" (its just a bool) for drop code.
2024-03-12 08:14:42 +01:00
Timo Kröger
99854ff840
[UCPD] Fix build for devices with GPDMA
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Do not use a flag that is DMA/BDMA only, not required anyway
the transfer should run in the background nevertheless
2024-03-12 08:14:42 +01:00
Timo Kröger
ff8129a6a6
[UCPD] Implement hard reset transmission
2024-03-12 08:14:42 +01:00
Timo Kröger
c1efcbba2d
[UCPD] Receive hard resets
2024-03-12 08:14:42 +01:00
Timo Kröger
b7972048a1
[UCPD] Improve example and defmt Format for enums
2024-03-12 08:14:42 +01:00
Timo Kröger
5e271ff31b
[UCPD] Combine RX and TX
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`select(rx.receive(), tx.transmit()` had subtle interrupt enable race conditions.
Combine receiver and transmitter into one new `PdPhy` struct to disallow the
problematic pattern.
Scanning through the USB PD 2.0 specification there is no need to have RX and TX
running concurrently (after all the USB PD communication is half-duplex).
2024-03-12 08:14:42 +01:00
Timo Kröger
36a9918921
[UCPD] Implement PD transmitter
2024-03-12 08:14:42 +01:00
Timo Kröger
984d5bbc72
[UCPD] Implement PD receiver
2024-03-12 08:14:42 +01:00
Timo Kröger
4d0e383816
[UCPD] Prepare for PD communication implementation
2024-03-12 08:14:42 +01:00
Timo Kröger
a3b1222617
[UCPD] Improve Type-C CC handling
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* Improved interrupt handling: Clear flags in ISR, check state change in future
* Disable pull-up/pull-down resistors and voltage monitor on drop
* nightly rustfmt
2024-03-12 08:14:42 +01:00
Timo Kröger
d99fcfd0c2
[UCPD] Configuration Channel (CC) handling
2024-03-12 08:14:42 +01:00
Timo Kröger
aa1411e2c7
[UCPD] Prepare interrupt handle
2024-03-12 08:14:41 +01:00
Timo Kröger
8a255b375b
[UCPD] Instance and Pin Traits
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Skip FRSTX pin for now. Its available twice in the device JSON as
FRSTX1 and FRSTX2 both with the same pins as targets.
I don’t know enough about the FRS (fast role switch) feature to
understand if that is correct and how to handle the pins.
2024-03-12 08:14:41 +01:00
Dario Nieuwenhuis
1ef02e5384
Merge pull request #2683 from ExplodingWaffle/ucpd-dbdis
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stm32: add disable_ucpdx_dead_battery
2024-03-11 23:36:15 +00:00
Harry Brooke
d4869b83fc
disable -> enable. also extracted to function for easy refactoring later
2024-03-11 23:03:09 +00:00
Dominic
b6a383811a
Improve panic message when requesting frequency higher than clock
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Previously it would panic with message "unreachable", which isn't
particularly clear about what the problem is and how to fix it.
2024-03-11 17:52:18 +01:00
Caleb Garrett
6e9e8eeb5f
Refactored cryp din/dout into functions.
2024-03-11 11:08:02 -04:00
Harry Brooke
096d147dce
stm32: add disable_ucpdx_dead_battery
2024-03-11 11:42:04 +00:00
Harry Brooke
f761f721bc
fix ci
2024-03-10 22:51:42 +00:00
Caleb Garrett
4a5b6e05fb
Correct more CI build issues.
2024-03-10 17:33:40 -04:00
Caleb Garrett
50a7ada0bb
Fixed DMA CI build issues.
2024-03-10 17:28:53 -04:00
Caleb Garrett
e92094986d
Add DMA request priority as transfer option.
2024-03-10 16:53:37 -04:00
Adam Greig
b456addb2b
stm32: bump metapac version
2024-03-09 20:13:20 +00:00
Harry Brooke
2d7ec281e8
stm32/rcc: wait for peripheral clock to be active. also, hold the peripheral reset while enabling the clock.
2024-03-09 18:24:31 +00:00
Dominic
71179fa818
Check for CPU_FREQ_BOOST
2024-03-09 11:55:09 +01:00
Dominic
fadffc5061
Fix incorrect D1CPRE max for STM32H7 RM0468
2024-03-09 11:55:09 +01:00
Ralf
b7bb4b23f8
STM32 SimplePwm: Fix regression and re-enable output pin
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PR #2499 implemented timer hierarchy, but removed enable_outputs()
from trait CaptureCompare16bitInstance and from SimplePwm.
This functions is required for advanced timers to set bit BDTR.MOE
and to enable the output signal.
2024-03-08 11:18:45 +01:00
Karun
fda6e3fb8c
Resolve rustfmt issue and unused import errors
2024-03-07 15:23:45 -05:00
Karun Koppula
54751b7a50
Merge branch 'main' into karun/main_octospi_implementation
2024-03-07 15:20:29 -05:00
Karun
3b1d87050e
Update trait definitions
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Make operations generic against valid data widths
2024-03-07 14:41:27 -05:00
Karun
e163572bec
Add get and set config trait implementations
2024-03-07 14:41:26 -05:00
Karun
b86a1f0700
Add constructors
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Add transfer configuration
Update command configuration
Add peripheral width consideration
Add drop impl
2024-03-07 14:41:04 -05:00
Karun
a0b7067205
Add user enums for transaction configuration
2024-03-07 14:30:53 -05:00
Karun
9ed8d01b11
Add transfer config, trait, functional initial configuration and read from memory
2024-03-07 14:30:53 -05:00
Karun
f3609f2842
Add initial octopsi module
2024-03-07 14:30:53 -05:00
Karun
9905bbe9f7
Update peripheral crate to updated octospi pac
2024-03-07 14:30:53 -05:00
Karun
2ab1b2ac9a
Update stm-32 build script to include ospi traits
2024-03-07 14:29:37 -05:00
Dario Nieuwenhuis
b2d236ee39
Merge pull request #2667 from timokroeger/stm32-anychannel-fix
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stm32: Implement `Channel` trait for `AnyChannel`
2024-03-07 15:18:32 +00:00
Tomas Barton
bb3711bbf9
update stm32c0 HSI frequency
2024-03-07 06:51:32 -08:00
Timo Kröger
bbc06458a3
stm32: Implement Channel trait for AnyChannel
2024-03-07 15:05:28 +01:00
Corey Schuhen
84d21e959d
Dummy
2024-03-07 17:45:01 +10:00
Corey Schuhen
98e7a0a423
Remove old PAC from bscan crate.
2024-03-07 17:45:01 +10:00
Corey Schuhen
9ba379fb9e
Remove usage of old PAC
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Formatting
2024-03-07 17:45:01 +10:00
Corey Schuhen
65b38cf755
Fix examples and improve imports required.
2024-03-07 17:45:01 +10:00
Corey Schuhen
a9ff38003b
Documentation.
...
.
2024-03-07 17:45:01 +10:00
Corey Schuhen
455cc40261
Port registers access to using Embassy PAC
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Use stm32-metapac for filters module.
2024-03-07 17:45:01 +10:00
Corey Schuhen
b0f05e7682
Remove unused.
2024-03-07 17:45:01 +10:00
Corey Schuhen
34687a0956
Apply cargo fmt
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Formatting.
2024-03-07 17:45:01 +10:00
Corey Schuhen
fecb65b988
Make use of internal BXCAN crate work. Tested on stm32f103 with real bus and HIL tests.
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Fix
2024-03-07 17:45:01 +10:00
Corey Schuhen
f736f1b27f
RAW copy of files from BXCAN crate. No changes whatsoever.
2024-03-07 17:45:01 +10:00
Torin Cooper-Bennun
e0018c6f4f
stm32: can:fd: merge read impls; buffered RX returns Result<_, BusError>
2024-03-04 12:38:46 +00:00
Torin Cooper-Bennun
72c6cdc5d5
stm32: can: fd: rename TxBufferMode::Queue -> ::Priority for clarity
2024-03-04 12:22:18 +00:00
Dario Nieuwenhuis
ae266f3bf5
stm32/rcc: port c0 to new api. Add c0 HSIKER/HSISYS support.
2024-03-04 00:08:14 +01:00
Dario Nieuwenhuis
c8c4b0b701
stm32/rcc: port g0 to new api.
2024-03-04 00:04:06 +01:00
Dario Nieuwenhuis
b4567bb8c5
stm32/rcc: g4: consistent PllSource, add pll pqr limits, simplify a bit.
2024-03-04 00:04:06 +01:00
Corey Schuhen
b693ab9b34
Restore init order to restore H7.
...
Previous commit broke H7 support in HIL farm. Restore previous order by moving a bunch of config from new and into_config_mode to apply_config.
This is a cleanup that I had considered to move more register access into peripheral.rs.
2024-03-02 14:18:12 +10:00
Corey Schuhen
bf06d10534
Delay setting TX buffer mode until user had a chance to configure it.
2024-03-02 14:00:56 +10:00
Torin Cooper-Bennun
9e403fa89a
stm32: can: fd: rename abort_pending_mailbox, rm pub qualifier
2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
befbb2845a
stm32: can: fd: write: if in TX FIFO mode & bufs full, then abort
2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
30606f9782
stm32: can: fd: allow TX buffers in FIFO mode
2024-03-02 10:08:20 +10:00
Dario Nieuwenhuis
3fe907b54d
Merge pull request #2646 from cschuhen/feature/wake_tx_on_buffered_push
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Give CAN a kick when writing into TX buffer via sender.
2024-03-01 23:15:42 +00:00
Corey Schuhen
df8f508ffa
Writing to TX buffer also needs to fire an interrupt to kick off transmission if it is idle.
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Formatting
2024-03-02 09:09:27 +10:00
Dario Nieuwenhuis
95234cddba
stm32: autogenerate mux config for all chips.
2024-03-01 23:54:37 +01:00
Dario Nieuwenhuis
d5c9c611fa
Merge pull request #2619 from caleb-garrett/cryp
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STM32 Crypto Accelerator
2024-03-01 19:35:57 +00:00
Siebe Claes
96af20cf5b
stm32: can: fd: Fix Frame is_extended() function
2024-03-01 19:21:01 +01:00
Caleb Garrett
c9cca3c007
Fix H7 CRYP operation.
2024-02-29 19:09:44 -05:00
Caleb Garrett
998532c33e
Merge branch 'embassy-rs:main' into cryp
2024-02-29 15:21:06 -05:00
Dario Nieuwenhuis
263d1b024c
Merge pull request #2637 from cschuhen/feature/fix_buf_size
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Buffer is not big enough for FD frames.
2024-02-28 17:33:58 +00:00
eZio Pan
47c579eba2
update metapac
2024-02-29 00:11:40 +08:00
Corey Schuhen
1353a343b8
Buffer is not big enough for FD frames.
2024-02-28 18:03:53 +10:00
Dario Nieuwenhuis
5ced938184
Merge pull request #2634 from maiaherringfish/stm32h7-fdcansel-fix
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adding FDCANSEL logic for STM32H7x
2024-02-28 00:54:43 +00:00
Torin Cooper-Bennun
a8da42943f
stm32: can: fd: rm some irrelevant commented code and dead code
2024-02-27 23:47:41 +00:00
Torin Cooper-Bennun
0ed402fd79
stm32: can: fd: refactor out some duplicate code
2024-02-27 23:47:25 +00:00
Maia
b7e0964a07
added FDCANSEL logic for H7
2024-02-27 11:07:05 -08:00
Dario Nieuwenhuis
62c5df7e5b
Merge pull request #2631 from MaxiluxSystems/small-fdcan-fixes
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stm32: can: fd: fix SID read/write and BRS setting for TX
2024-02-27 12:19:03 +00:00
Torin Cooper-Bennun
9a4f58fe15
stm32: can: fd: only TX with BRS if also TXing with FDF
2024-02-27 10:38:40 +00:00
Torin Cooper-Bennun
e63b0d7a2f
stm32: can: fd: fix SID read/write from buf elems
2024-02-27 10:38:07 +00:00
eZio Pan
bf44adc4bc
allow higher psc value for iwdg_v3
2024-02-27 14:20:58 +08:00
Dario Nieuwenhuis
d5a2b3be58
Merge pull request #2614 from MaxiluxSystems/time_driver_tim1
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stm32: time_driver: allow use of TIM1 for driver
2024-02-26 12:08:32 +00:00
Torin Cooper-Bennun
5c45723777
stm32: timers: use TIMx_CC interrupt source for advanced timers
...
fixes (hopefully) time driver when using TIM1/8/20
2024-02-26 10:03:51 +00:00
Caleb Garrett
29d0d80808
Merge branch 'main' into cryp
2024-02-25 21:21:21 -05:00
Dario Nieuwenhuis
c83ab20526
stm32: update metapac.
2024-02-26 03:02:58 +01:00
Dario Nieuwenhuis
72c6f9a101
stm32/adc: reexport enums from PAC to avoid boilerplate hell.
2024-02-26 03:02:58 +01:00
Caleb Garrett
d9c0da8102
Update metapac to address CI build issue.
2024-02-25 20:59:07 -05:00
Caleb Garrett
236fc6f650
Add CRYP test.
2024-02-25 20:59:07 -05:00
Caleb Garrett
f352b6d68b
Address CI build issues.
2024-02-25 20:59:07 -05:00
Caleb Garrett
25ec838af5
Correct AAD ingest.
2024-02-25 20:59:07 -05:00
Caleb Garrett
967b4927b0
Correct tag generation.
2024-02-25 20:59:07 -05:00
Caleb Garrett
cbca3a5c9f
Support v1 and v2 cryp variants.
2024-02-25 20:59:07 -05:00
Caleb Garrett
29d8b45956
Add DES and TDES support. Support variable tag sizes.
2024-02-25 20:59:07 -05:00
Caleb Garrett
14c2c28e06
Corrected additional associated data operation.
2024-02-25 20:59:07 -05:00
Caleb Garrett
f64a62149e
Corrected CCM partial block ops.
2024-02-25 20:59:07 -05:00
Caleb Garrett
1e21b758f7
Corrected GCM tag generation.
2024-02-25 20:59:07 -05:00
Caleb Garrett
690b2118c6
CCM mode functional.
2024-02-25 20:59:07 -05:00
Caleb Garrett
fec26e8960
Refactored ciphers into traits.
2024-02-25 20:59:07 -05:00
Caleb Garrett
c2b03eff62
GCM mode functional.
2024-02-25 20:59:07 -05:00
Caleb Garrett
565acdf243
CTR mode functional.
2024-02-25 20:59:07 -05:00
Caleb Garrett
72e4cacd91
CBC and ECB AES modes functional.
2024-02-25 20:59:07 -05:00
Caleb Garrett
a0a8a4ec86
Support CBC, ECB, CTR modes.
2024-02-25 20:59:07 -05:00
Caleb Garrett
79e5e8b052
Add cryp configuration.
2024-02-25 20:59:07 -05:00
Dario Nieuwenhuis
a308b9ac2f
Merge branch 'adc_h5' into add-pll1_p_mul_2-clock
2024-02-26 02:14:38 +01:00
Eli Orona
abde7891e3
Update metapac version
2024-02-25 16:44:46 -08:00
Eli Orona
2dfd66b7c4
🤦
2024-02-25 16:25:42 -08:00
Eli Orona
7dbae799dc
Rust FMT
2024-02-25 16:24:52 -08:00
Eli Orona
c23b59bdc8
Add pll1_p_mul_2 clock.
2024-02-25 16:12:32 -08:00
Dario Nieuwenhuis
489d0be2a2
stm32/rcc: unify naming sysclk field to sys, enum to Sysclk.
2024-02-26 00:00:17 +01:00
Dario Nieuwenhuis
497515ed57
Merge pull request #2583 from OroArmor/tim_pll_clk
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Enable PLL Clocks for TIMx peripherals on STM32F3xx Chips
2024-02-25 22:45:48 +00:00
Corey Schuhen
a737a7350e
FDCAN: Remove history from comments.
2024-02-25 10:14:12 +10:00
Corey Schuhen
1327a644b6
FDCAN: Don't require internal module for public API.
2024-02-25 10:14:12 +10:00
Corey Schuhen
0565098b06
FDCAN: Fix some indenting in macros
2024-02-25 10:14:12 +10:00
Corey Schuhen
a061cf3133
FDCAN: Allow access to buffered senders and receivers.
2024-02-25 10:14:12 +10:00
Corey Schuhen
779898c0e7
FDCAN: Expose some pub types in API
2024-02-25 10:14:12 +10:00
Corey Schuhen
2d634d07e0
FDCAN: Remove extra traits from.
...
Comments
Fix.
2024-02-25 10:13:58 +10:00
Eli Orona
394abda092
Fix report with the same name
2024-02-24 12:58:38 -08:00
Eli Orona
e79d2dd756
Move to internal mod and re-export the enums
2024-02-24 12:54:58 -08:00
Dario Nieuwenhuis
e67dfcb04f
stm32/dma: add AnyChannel, add support for BDMA on H7.
2024-02-24 02:41:41 +01:00
Torin Cooper-Bennun
86ccf0bc3e
stm32: remove TIM11 as time driver candidate (only 1 CC channel)
2024-02-23 14:35:12 +00:00
Torin Cooper-Bennun
44534abf32
stm32: sync available TIMs in Cargo.toml, build.rs
2024-02-23 14:35:12 +00:00
Torin Cooper-Bennun
a11e3146f8
stm32: time_driver: allow use of TIM1 for driver
2024-02-23 14:35:12 +00:00
Dario Nieuwenhuis
f77d59500e
Merge pull request #2618 from barnabywalters/g4rcc
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[embassy-stm32] G4 RCC refactor amendments and additions
2024-02-23 13:05:01 +00:00
Barnaby Walters
b091ffcb55
[embassy-stm32] G4 RCC refactor amendments and additions
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* Added assertions for a variety of clock frequencies, based on the reference manual and
stm32g474 datasheet. The family and numbers are consistent enough that I’m assuming
these numbers will work for the other chips.
* Corrected value of pll1_q in set_clocks call, added pll1_r value
2024-02-23 01:59:24 +01:00
Dario Nieuwenhuis
a6a5d9913c
Merge branch 'main' into stm32l0-reset-rtc
2024-02-23 01:45:10 +01:00
Dario Nieuwenhuis
0665e0d452
stm32/rcc: port U5 to new API, add all PLLs, all HSE modes.
2024-02-23 01:24:05 +01:00
Dario Nieuwenhuis
4481c5f3cc
Merge pull request #2616 from embassy-rs/h5-stupid-errata
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stm32/rcc: workaround nonsense RAM suicide errata on backup domain reset.
2024-02-23 00:25:30 +01:00
