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https://github.com/embassy-rs/embassy.git
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stm32/adc: reexport enums from PAC to avoid boilerplate hell.
This commit is contained in:
parent
a308b9ac2f
commit
72c6f9a101
@ -70,7 +70,7 @@ rand_core = "0.6.3"
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sdio-host = "0.5.0"
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critical-section = "1.1"
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#stm32-metapac = { version = "15" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-88f71cbcd2f048c40bad162c7e7864cc3897eba4" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7c8b53413499acc3273b706318777a60f932d77a" }
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vcell = "0.1.3"
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bxcan = "0.7.0"
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nb = "1.0.0"
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@ -94,7 +94,7 @@ critical-section = { version = "1.1", features = ["std"] }
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proc-macro2 = "1.0.36"
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quote = "1.0.15"
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#stm32-metapac = { version = "15", default-features = false, features = ["metadata"]}
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-88f71cbcd2f048c40bad162c7e7864cc3897eba4", default-features = false, features = ["metadata"]}
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7c8b53413499acc3273b706318777a60f932d77a", default-features = false, features = ["metadata"]}
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[features]
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@ -74,7 +74,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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Self {
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adc,
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sample_time: Default::default(),
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sample_time: SampleTime::from_bits(0),
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}
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}
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@ -84,14 +84,14 @@ impl<'d, T: Instance> Adc<'d, T> {
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pub fn sample_time_for_us(&self, us: u32) -> SampleTime {
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match us * Self::freq().0 / 1_000_000 {
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0..=1 => SampleTime::Cycles1_5,
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2..=7 => SampleTime::Cycles7_5,
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8..=13 => SampleTime::Cycles13_5,
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14..=28 => SampleTime::Cycles28_5,
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29..=41 => SampleTime::Cycles41_5,
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42..=55 => SampleTime::Cycles55_5,
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56..=71 => SampleTime::Cycles71_5,
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_ => SampleTime::Cycles239_5,
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0..=1 => SampleTime::CYCLES1_5,
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2..=7 => SampleTime::CYCLES7_5,
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8..=13 => SampleTime::CYCLES13_5,
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14..=28 => SampleTime::CYCLES28_5,
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29..=41 => SampleTime::CYCLES41_5,
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42..=55 => SampleTime::CYCLES55_5,
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56..=71 => SampleTime::CYCLES71_5,
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_ => SampleTime::CYCLES239_5,
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}
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}
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@ -97,7 +97,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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Self {
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adc,
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sample_time: Default::default(),
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sample_time: SampleTime::from_bits(0),
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}
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}
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@ -107,13 +107,13 @@ impl<'d, T: Instance> Adc<'d, T> {
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pub fn sample_time_for_us(&self, us: u32) -> SampleTime {
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match us * Self::freq().0 / 1_000_000 {
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0..=1 => SampleTime::Cycles1_5,
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2..=4 => SampleTime::Cycles4_5,
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5..=7 => SampleTime::Cycles7_5,
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8..=19 => SampleTime::Cycles19_5,
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20..=61 => SampleTime::Cycles61_5,
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62..=181 => SampleTime::Cycles181_5,
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_ => SampleTime::Cycles601_5,
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0..=1 => SampleTime::CYCLES1_5,
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2..=4 => SampleTime::CYCLES4_5,
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5..=7 => SampleTime::CYCLES7_5,
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8..=19 => SampleTime::CYCLES19_5,
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20..=61 => SampleTime::CYCLES61_5,
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62..=181 => SampleTime::CYCLES181_5,
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_ => SampleTime::CYCLES601_5,
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}
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}
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@ -107,12 +107,12 @@ impl Calibration {
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/// Returns a calibrated voltage value as in microvolts (uV)
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pub fn cal_uv(&self, raw: u16, resolution: super::Resolution) -> u32 {
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(self.vdda_uv() / resolution.to_max_count()) * raw as u32
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(self.vdda_uv() / super::resolution_to_max_count(resolution)) * raw as u32
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}
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/// Returns a calibrated voltage value as an f32
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pub fn cal_f32(&self, raw: u16, resolution: super::Resolution) -> f32 {
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raw as f32 * self.vdda_f32() / resolution.to_max_count() as f32
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raw as f32 * self.vdda_f32() / super::resolution_to_max_count(resolution) as f32
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}
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}
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@ -175,12 +175,7 @@ impl<'d, T: Instance> Adc<'d, T> {
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}
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pub fn resolution(&self) -> Resolution {
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match T::regs().cr1().read().res() {
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crate::pac::adc::vals::Res::TWELVEBIT => Resolution::TwelveBit,
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crate::pac::adc::vals::Res::TENBIT => Resolution::TenBit,
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crate::pac::adc::vals::Res::EIGHTBIT => Resolution::EightBit,
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crate::pac::adc::vals::Res::SIXBIT => Resolution::SixBit,
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}
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T::regs().cr1().read().res()
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}
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pub fn enable_vref(&self) -> Vref<T> {
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@ -359,23 +354,23 @@ impl<'d, T: Instance> Adc<'d, T> {
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fn get_res_clks(res: Resolution) -> u32 {
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match res {
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Resolution::TwelveBit => 12,
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Resolution::TenBit => 11,
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Resolution::EightBit => 9,
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Resolution::SixBit => 7,
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Resolution::BITS12 => 12,
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Resolution::BITS10 => 11,
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Resolution::BITS8 => 9,
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Resolution::BITS6 => 7,
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}
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}
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fn get_sample_time_clks(sample_time: SampleTime) -> u32 {
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match sample_time {
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SampleTime::Cycles4 => 4,
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SampleTime::Cycles9 => 9,
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SampleTime::Cycles16 => 16,
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SampleTime::Cycles24 => 24,
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SampleTime::Cycles48 => 48,
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SampleTime::Cycles96 => 96,
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SampleTime::Cycles192 => 192,
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SampleTime::Cycles384 => 384,
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SampleTime::CYCLES4 => 4,
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SampleTime::CYCLES9 => 9,
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SampleTime::CYCLES16 => 16,
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SampleTime::CYCLES24 => 24,
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SampleTime::CYCLES48 => 48,
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SampleTime::CYCLES96 => 96,
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SampleTime::CYCLES192 => 192,
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SampleTime::CYCLES384 => 384,
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}
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}
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@ -384,14 +379,14 @@ impl<'d, T: Instance> Adc<'d, T> {
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let us_clks = us * Self::freq().0 / 1_000_000;
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let clks = us_clks.saturating_sub(res_clks);
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match clks {
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0..=4 => SampleTime::Cycles4,
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5..=9 => SampleTime::Cycles9,
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10..=16 => SampleTime::Cycles16,
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17..=24 => SampleTime::Cycles24,
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25..=48 => SampleTime::Cycles48,
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49..=96 => SampleTime::Cycles96,
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97..=192 => SampleTime::Cycles192,
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193.. => SampleTime::Cycles384,
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0..=4 => SampleTime::CYCLES4,
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5..=9 => SampleTime::CYCLES9,
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10..=16 => SampleTime::CYCLES16,
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17..=24 => SampleTime::CYCLES24,
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25..=48 => SampleTime::CYCLES48,
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49..=96 => SampleTime::CYCLES96,
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97..=192 => SampleTime::CYCLES192,
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193.. => SampleTime::CYCLES384,
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}
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}
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@ -14,18 +14,13 @@
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#[cfg_attr(adc_v4, path = "v4.rs")]
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mod _version;
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#[cfg(not(any(adc_f1, adc_f3_v2)))]
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mod resolution;
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mod sample_time;
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#[allow(unused)]
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#[cfg(not(adc_f3_v2))]
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pub use _version::*;
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#[cfg(not(any(adc_f1, adc_f3, adc_f3_v2)))]
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pub use resolution::Resolution;
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#[cfg(not(adc_f3_v2))]
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pub use sample_time::SampleTime;
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#[cfg(not(any(adc_f1, adc_f3_v2)))]
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pub use crate::pac::adc::vals::Res as Resolution;
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pub use crate::pac::adc::vals::SampleTime;
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use crate::peripherals;
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/// Analog to Digital driver.
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@ -137,3 +132,27 @@ macro_rules! impl_adc_pin {
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}
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};
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}
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/// Get the maximum reading value for this resolution.
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///
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/// This is `2**n - 1`.
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#[cfg(not(any(adc_f1, adc_f3_v2)))]
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pub const fn resolution_to_max_count(res: Resolution) -> u32 {
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match res {
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#[cfg(adc_v4)]
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Resolution::BITS16 => (1 << 16) - 1,
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#[cfg(adc_v4)]
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Resolution::BITS14 => (1 << 14) - 1,
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#[cfg(adc_v4)]
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Resolution::BITS14V => (1 << 14) - 1,
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#[cfg(adc_v4)]
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Resolution::BITS12V => (1 << 12) - 1,
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Resolution::BITS12 => (1 << 12) - 1,
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Resolution::BITS10 => (1 << 10) - 1,
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Resolution::BITS8 => (1 << 8) - 1,
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#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
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Resolution::BITS6 => (1 << 6) - 1,
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#[allow(unreachable_patterns)]
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_ => core::unreachable!(),
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}
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}
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@ -1,72 +0,0 @@
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/// ADC resolution
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#[allow(missing_docs)]
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#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Resolution {
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TwelveBit,
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TenBit,
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EightBit,
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SixBit,
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}
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/// ADC resolution
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#[allow(missing_docs)]
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#[cfg(adc_v4)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Resolution {
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SixteenBit,
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FourteenBit,
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TwelveBit,
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TenBit,
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EightBit,
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}
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impl Default for Resolution {
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fn default() -> Self {
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#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
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{
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Self::TwelveBit
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}
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#[cfg(adc_v4)]
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{
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Self::SixteenBit
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}
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}
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}
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impl From<Resolution> for crate::pac::adc::vals::Res {
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fn from(res: Resolution) -> crate::pac::adc::vals::Res {
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match res {
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#[cfg(adc_v4)]
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Resolution::SixteenBit => crate::pac::adc::vals::Res::SIXTEENBIT,
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#[cfg(adc_v4)]
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Resolution::FourteenBit => crate::pac::adc::vals::Res::FOURTEENBITV,
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Resolution::TwelveBit => crate::pac::adc::vals::Res::TWELVEBIT,
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Resolution::TenBit => crate::pac::adc::vals::Res::TENBIT,
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Resolution::EightBit => crate::pac::adc::vals::Res::EIGHTBIT,
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#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
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Resolution::SixBit => crate::pac::adc::vals::Res::SIXBIT,
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}
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}
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}
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impl Resolution {
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/// Get the maximum reading value for this resolution.
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///
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/// This is `2**n - 1`.
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pub const fn to_max_count(&self) -> u32 {
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match self {
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#[cfg(adc_v4)]
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Resolution::SixteenBit => (1 << 16) - 1,
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#[cfg(adc_v4)]
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Resolution::FourteenBit => (1 << 14) - 1,
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Resolution::TwelveBit => (1 << 12) - 1,
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Resolution::TenBit => (1 << 10) - 1,
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Resolution::EightBit => (1 << 8) - 1,
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#[cfg(any(adc_v1, adc_v2, adc_v3, adc_l0, adc_g0, adc_f3, adc_f3_v1_1, adc_h5))]
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Resolution::SixBit => (1 << 6) - 1,
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}
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}
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}
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@ -1,148 +0,0 @@
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#[cfg(not(adc_f3_v2))]
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macro_rules! impl_sample_time {
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($default_doc:expr, $default:ident, ($(($doc:expr, $variant:ident, $pac_variant:ident)),*)) => {
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#[doc = concat!("ADC sample time\n\nThe default setting is ", $default_doc, " ADC clock cycles.")]
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#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum SampleTime {
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$(
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#[doc = concat!($doc, " ADC clock cycles.")]
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$variant,
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)*
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}
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impl From<SampleTime> for crate::pac::adc::vals::SampleTime {
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fn from(sample_time: SampleTime) -> crate::pac::adc::vals::SampleTime {
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match sample_time {
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$(SampleTime::$variant => crate::pac::adc::vals::SampleTime::$pac_variant),*
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}
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}
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}
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impl From<crate::pac::adc::vals::SampleTime> for SampleTime {
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fn from(sample_time: crate::pac::adc::vals::SampleTime) -> SampleTime {
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match sample_time {
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$(crate::pac::adc::vals::SampleTime::$pac_variant => SampleTime::$variant),*
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}
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}
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}
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impl Default for SampleTime {
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fn default() -> Self {
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Self::$default
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}
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}
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};
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}
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#[cfg(any(adc_f1, adc_v1))]
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impl_sample_time!(
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"1.5",
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Cycles1_5,
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(
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("1.5", Cycles1_5, CYCLES1_5),
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("7.5", Cycles7_5, CYCLES7_5),
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("13.5", Cycles13_5, CYCLES13_5),
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("28.5", Cycles28_5, CYCLES28_5),
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("41.5", Cycles41_5, CYCLES41_5),
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("55.5", Cycles55_5, CYCLES55_5),
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("71.5", Cycles71_5, CYCLES71_5),
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("239.5", Cycles239_5, CYCLES239_5)
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)
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);
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#[cfg(adc_v2)]
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impl_sample_time!(
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"3",
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Cycles3,
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(
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("3", Cycles3, CYCLES3),
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("15", Cycles15, CYCLES15),
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("28", Cycles28, CYCLES28),
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("56", Cycles56, CYCLES56),
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("84", Cycles84, CYCLES84),
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("112", Cycles112, CYCLES112),
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("144", Cycles144, CYCLES144),
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("480", Cycles480, CYCLES480)
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)
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);
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#[cfg(any(adc_v3, adc_h5))]
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impl_sample_time!(
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"2.5",
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Cycles2_5,
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(
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("2.5", Cycles2_5, CYCLES2_5),
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("6.5", Cycles6_5, CYCLES6_5),
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("12.5", Cycles12_5, CYCLES12_5),
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("24.5", Cycles24_5, CYCLES24_5),
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("47.5", Cycles47_5, CYCLES47_5),
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("92.5", Cycles92_5, CYCLES92_5),
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("247.5", Cycles247_5, CYCLES247_5),
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("640.5", Cycles640_5, CYCLES640_5)
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)
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);
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#[cfg(any(adc_l0, adc_g0))]
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impl_sample_time!(
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"1.5",
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Cycles1_5,
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(
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("1.5", Cycles1_5, CYCLES1_5),
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("3.5", Cycles3_5, CYCLES3_5),
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("7.5", Cycles7_5, CYCLES7_5),
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("12.5", Cycles12_5, CYCLES12_5),
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("19.5", Cycles19_5, CYCLES19_5),
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("39.5", Cycles39_5, CYCLES39_5),
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("79.5", Cycles79_5, CYCLES79_5),
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("160.5", Cycles160_5, CYCLES160_5)
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)
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);
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#[cfg(adc_v4)]
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impl_sample_time!(
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"1.5",
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Cycles1_5,
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(
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("1.5", Cycles1_5, CYCLES1_5),
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("2.5", Cycles2_5, CYCLES2_5),
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("8.5", Cycles8_5, CYCLES8_5),
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("16.5", Cycles16_5, CYCLES16_5),
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("32.5", Cycles32_5, CYCLES32_5),
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("64.5", Cycles64_5, CYCLES64_5),
|
||||
("387.5", Cycles387_5, CYCLES387_5),
|
||||
("810.5", Cycles810_5, CYCLES810_5)
|
||||
)
|
||||
);
|
||||
|
||||
#[cfg(adc_f3)]
|
||||
impl_sample_time!(
|
||||
"1.5",
|
||||
Cycles1_5,
|
||||
(
|
||||
("1.5", Cycles1_5, CYCLES1_5),
|
||||
("2.5", Cycles2_5, CYCLES2_5),
|
||||
("4.5", Cycles4_5, CYCLES4_5),
|
||||
("7.5", Cycles7_5, CYCLES7_5),
|
||||
("19.5", Cycles19_5, CYCLES19_5),
|
||||
("61.5", Cycles61_5, CYCLES61_5),
|
||||
("181.5", Cycles181_5, CYCLES181_5),
|
||||
("601.5", Cycles601_5, CYCLES601_5)
|
||||
)
|
||||
);
|
||||
|
||||
#[cfg(any(adc_f3_v1_1))]
|
||||
impl_sample_time!(
|
||||
"4",
|
||||
Cycles4,
|
||||
(
|
||||
("4", Cycles4, CYCLES4),
|
||||
("9", Cycles9, CYCLES9),
|
||||
("16", Cycles16, CYCLES16),
|
||||
("24", Cycles24, CYCLES24),
|
||||
("48", Cycles48, CYCLES48),
|
||||
("96", Cycles96, CYCLES96),
|
||||
("192", Cycles192, CYCLES192),
|
||||
("384", Cycles384, CYCLES384)
|
||||
)
|
||||
);
|
@ -109,7 +109,7 @@ impl<'d, T: Instance> Adc<'d, T> {
|
||||
|
||||
Self {
|
||||
adc,
|
||||
sample_time: Default::default(),
|
||||
sample_time: SampleTime::from_bits(0),
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -111,7 +111,7 @@ where
|
||||
|
||||
Self {
|
||||
adc,
|
||||
sample_time: Default::default(),
|
||||
sample_time: SampleTime::from_bits(0),
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -102,7 +102,7 @@ impl<'d, T: Instance> Adc<'d, T> {
|
||||
|
||||
Self {
|
||||
adc,
|
||||
sample_time: Default::default(),
|
||||
sample_time: SampleTime::from_bits(0),
|
||||
}
|
||||
}
|
||||
|
||||
@ -259,8 +259,8 @@ impl<'d, T: Instance> Adc<'d, T> {
|
||||
} else {
|
||||
let sample_time = sample_time.into();
|
||||
T::regs()
|
||||
.smpr(ch as usize / 10)
|
||||
.modify(|reg| reg.set_smp(ch as usize % 10, sample_time));
|
||||
.smpr(_ch as usize / 10)
|
||||
.modify(|reg| reg.set_smp(_ch as usize % 10, sample_time));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -159,7 +159,7 @@ impl<'d, T: Instance> Adc<'d, T> {
|
||||
}
|
||||
let mut s = Self {
|
||||
adc,
|
||||
sample_time: Default::default(),
|
||||
sample_time: SampleTime::from_bits(0),
|
||||
};
|
||||
s.power_up(delay);
|
||||
s.configure_differential_inputs();
|
||||
|
@ -19,7 +19,7 @@ async fn main(_spawner: Spawner) {
|
||||
info!("Hello World!");
|
||||
|
||||
let mut adc = Adc::new(p.ADC, Irqs, &mut Delay);
|
||||
adc.set_sample_time(SampleTime::Cycles71_5);
|
||||
adc.set_sample_time(SampleTime::CYCLES71_5);
|
||||
let mut pin = p.PA1;
|
||||
|
||||
let mut vrefint = adc.enable_vref(&mut Delay);
|
||||
|
@ -40,7 +40,7 @@ async fn main(_spawner: Spawner) -> ! {
|
||||
|
||||
let mut adc = Adc::new(p.ADC1, Irqs, &mut Delay);
|
||||
|
||||
adc.set_sample_time(SampleTime::Cycles601_5);
|
||||
adc.set_sample_time(SampleTime::CYCLES601_5);
|
||||
|
||||
info!("enable vrefint...");
|
||||
|
||||
|
@ -42,7 +42,7 @@ async fn main(_spawner: Spawner) -> ! {
|
||||
let mut adc = Adc::new(p.ADC2, Irqs, &mut Delay);
|
||||
let mut opamp = OpAmp::new(p.OPAMP2);
|
||||
|
||||
adc.set_sample_time(SampleTime::Cycles601_5);
|
||||
adc.set_sample_time(SampleTime::CYCLES601_5);
|
||||
|
||||
info!("enable vrefint...");
|
||||
|
||||
|
@ -30,7 +30,7 @@ async fn main(_spawner: Spawner) {
|
||||
info!("Hello World!");
|
||||
|
||||
let mut adc = Adc::new(p.ADC2, &mut Delay);
|
||||
adc.set_sample_time(SampleTime::Cycles32_5);
|
||||
adc.set_sample_time(SampleTime::CYCLES32_5);
|
||||
|
||||
loop {
|
||||
let measured = adc.read(&mut p.PA7);
|
||||
|
@ -46,7 +46,7 @@ async fn main(_spawner: Spawner) {
|
||||
|
||||
let mut adc = Adc::new(p.ADC3, &mut Delay);
|
||||
|
||||
adc.set_sample_time(SampleTime::Cycles32_5);
|
||||
adc.set_sample_time(SampleTime::CYCLES32_5);
|
||||
|
||||
let mut vrefint_channel = adc.enable_vrefint();
|
||||
|
||||
|
@ -19,7 +19,7 @@ async fn main(_spawner: Spawner) {
|
||||
info!("Hello World!");
|
||||
|
||||
let mut adc = Adc::new(p.ADC, Irqs, &mut Delay);
|
||||
adc.set_sample_time(SampleTime::Cycles79_5);
|
||||
adc.set_sample_time(SampleTime::CYCLES79_5);
|
||||
let mut pin = p.PA1;
|
||||
|
||||
let mut vrefint = adc.enable_vref(&mut Delay);
|
||||
|
@ -20,7 +20,7 @@ fn main() -> ! {
|
||||
|
||||
let mut adc = Adc::new(p.ADC1, &mut Delay);
|
||||
//adc.enable_vref();
|
||||
adc.set_resolution(Resolution::EightBit);
|
||||
adc.set_resolution(Resolution::BITS8);
|
||||
let mut channel = p.PC0;
|
||||
|
||||
loop {
|
||||
|
Loading…
Reference in New Issue
Block a user