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Merge pull request #2691 from caleb-garrett/cryp-dma

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STM32 CRYP DMA
This commit is contained in:
Dario Nieuwenhuis 2024-03-12 19:30:20 +00:00 committed by GitHub
commit 35f284ec22
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GPG Key ID: B5690EEEBB952194
5 changed files with 762 additions and 182 deletions
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2
embassy-stm32/build.rs
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@ -1121,6 +1121,8 @@ fn main() {
(("dac", "CH2"), quote!(crate::dac::DacDma2)),
(("timer", "UP"), quote!(crate::timer::UpDma)),
(("hash", "IN"), quote!(crate::hash::Dma)),
(("cryp", "IN"), quote!(crate::cryp::DmaIn)),
(("cryp", "OUT"), quote!(crate::cryp::DmaOut)),
(("timer", "CH1"), quote!(crate::timer::Ch1Dma)),
(("timer", "CH2"), quote!(crate::timer::Ch2Dma)),
(("timer", "CH3"), quote!(crate::timer::Ch3Dma)),

883
embassy-stm32/src/cryp/mod.rs
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File diff suppressed because it is too large Load Diff

28
examples/stm32f7/src/bin/cryp.rs
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@ -6,11 +6,15 @@ use aes_gcm::aead::{AeadInPlace, KeyInit};
use aes_gcm::Aes128Gcm;
use defmt::info;
use embassy_executor::Spawner;
use embassy_stm32::cryp::*;
use embassy_stm32::Config;
use embassy_stm32::cryp::{self, *};
use embassy_stm32::{bind_interrupts, peripherals, Config};
use embassy_time::Instant;
use {defmt_rtt as _, panic_probe as _};
bind_interrupts!(struct Irqs {
CRYP => cryp::InterruptHandler<peripherals::CRYP>;
});
#[embassy_executor::main]
async fn main(_spawner: Spawner) -> ! {
let config = Config::default();
@ -19,7 +23,7 @@ async fn main(_spawner: Spawner) -> ! {
let payload: &[u8] = b"hello world";
let aad: &[u8] = b"additional data";
let hw_cryp = Cryp::new(p.CRYP);
let mut hw_cryp = Cryp::new(p.CRYP, p.DMA2_CH6, p.DMA2_CH5, Irqs);
let key: [u8; 16] = [0; 16];
let mut ciphertext: [u8; 11] = [0; 11];
let mut plaintext: [u8; 11] = [0; 11];
@ -29,16 +33,18 @@ async fn main(_spawner: Spawner) -> ! {
// Encrypt in hardware using AES-GCM 128-bit
let aes_gcm = AesGcm::new(&key, &iv);
let mut gcm_encrypt = hw_cryp.start(&aes_gcm, Direction::Encrypt);
hw_cryp.aad_blocking(&mut gcm_encrypt, aad, true);
hw_cryp.payload_blocking(&mut gcm_encrypt, payload, &mut ciphertext, true);
let encrypt_tag = hw_cryp.finish_blocking(gcm_encrypt);
let mut gcm_encrypt = hw_cryp.start(&aes_gcm, Direction::Encrypt).await;
hw_cryp.aad(&mut gcm_encrypt, aad, true).await;
hw_cryp.payload(&mut gcm_encrypt, payload, &mut ciphertext, true).await;
let encrypt_tag = hw_cryp.finish(gcm_encrypt).await;
// Decrypt in hardware using AES-GCM 128-bit
let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt);
hw_cryp.aad_blocking(&mut gcm_decrypt, aad, true);
hw_cryp.payload_blocking(&mut gcm_decrypt, &ciphertext, &mut plaintext, true);
let decrypt_tag = hw_cryp.finish_blocking(gcm_decrypt);
let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt).await;
hw_cryp.aad(&mut gcm_decrypt, aad, true).await;
hw_cryp
.payload(&mut gcm_decrypt, &ciphertext, &mut plaintext, true)
.await;
let decrypt_tag = hw_cryp.finish(gcm_decrypt).await;
let hw_end_time = Instant::now();
let hw_execution_time = hw_end_time - hw_start_time;

30
tests/stm32/src/bin/cryp.rs
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@ -10,9 +10,14 @@ use aes_gcm::aead::{AeadInPlace, KeyInit};
use aes_gcm::Aes128Gcm;
use common::*;
use embassy_executor::Spawner;
use embassy_stm32::cryp::*;
use embassy_stm32::cryp::{self, *};
use embassy_stm32::{bind_interrupts, peripherals};
use {defmt_rtt as _, panic_probe as _};
bind_interrupts!(struct Irqs {
CRYP => cryp::InterruptHandler<peripherals::CRYP>;
});
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
let p: embassy_stm32::Peripherals = embassy_stm32::init(config());
@ -22,27 +27,32 @@ async fn main(_spawner: Spawner) {
const AAD1: &[u8] = b"additional data 1 stdargadrhaethaethjatjatjaetjartjstrjsfkk;'jopofyuisrteytweTASTUIKFUKIXTRDTEREharhaeryhaterjartjarthaethjrtjarthaetrhartjatejatrjsrtjartjyt1";
const AAD2: &[u8] = b"additional data 2 stdhthsthsthsrthsrthsrtjdykjdukdyuldadfhsdghsdghsdghsadghjk'hioethjrtjarthaetrhartjatecfgjhzdfhgzdfhzdfghzdfhzdfhzfhjatrjsrtjartjytjfytjfyg";
let hw_cryp = Cryp::new(p.CRYP);
let in_dma = peri!(p, CRYP_IN_DMA);
let out_dma = peri!(p, CRYP_OUT_DMA);
let mut hw_cryp = Cryp::new(p.CRYP, in_dma, out_dma, Irqs);
let key: [u8; 16] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
let mut ciphertext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()];
let mut plaintext: [u8; PAYLOAD1.len() + PAYLOAD2.len()] = [0; PAYLOAD1.len() + PAYLOAD2.len()];
let iv: [u8; 12] = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12];
// Encrypt in hardware using AES-GCM 128-bit
// Encrypt in hardware using AES-GCM 128-bit in blocking mode.
let aes_gcm = AesGcm::new(&key, &iv);
let mut gcm_encrypt = hw_cryp.start(&aes_gcm, Direction::Encrypt);
let mut gcm_encrypt = hw_cryp.start_blocking(&aes_gcm, Direction::Encrypt);
hw_cryp.aad_blocking(&mut gcm_encrypt, AAD1, false);
hw_cryp.aad_blocking(&mut gcm_encrypt, AAD2, true);
hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD1, &mut ciphertext[..PAYLOAD1.len()], false);
hw_cryp.payload_blocking(&mut gcm_encrypt, PAYLOAD2, &mut ciphertext[PAYLOAD1.len()..], true);
let encrypt_tag = hw_cryp.finish_blocking(gcm_encrypt);
// Decrypt in hardware using AES-GCM 128-bit
let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt);
hw_cryp.aad_blocking(&mut gcm_decrypt, AAD1, false);
hw_cryp.aad_blocking(&mut gcm_decrypt, AAD2, true);
hw_cryp.payload_blocking(&mut gcm_decrypt, &ciphertext, &mut plaintext, true);
let decrypt_tag = hw_cryp.finish_blocking(gcm_decrypt);
// Decrypt in hardware using AES-GCM 128-bit in async (DMA) mode.
let mut gcm_decrypt = hw_cryp.start(&aes_gcm, Direction::Decrypt).await;
hw_cryp.aad(&mut gcm_decrypt, AAD1, false).await;
hw_cryp.aad(&mut gcm_decrypt, AAD2, true).await;
hw_cryp
.payload(&mut gcm_decrypt, &ciphertext, &mut plaintext, true)
.await;
let decrypt_tag = hw_cryp.finish(gcm_decrypt).await;
info!("AES-GCM Ciphertext: {:?}", ciphertext);
info!("AES-GCM Plaintext: {:?}", plaintext);

1
tests/stm32/src/common.rs
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@ -140,6 +140,7 @@ define_peris!(
);
#[cfg(any(feature = "stm32h755zi", feature = "stm32h753zi"))]
define_peris!(
CRYP_IN_DMA = DMA1_CH0, CRYP_OUT_DMA = DMA1_CH1,
UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1,
ADC = ADC1, DAC = DAC1, DAC_PIN = PA4,