Commit Graph

1961 Commits

Author SHA1 Message Date
bors
8672b2b763 Auto merge of #127001 - beetrees:f16-debuginfo, r=michaelwoerister
Add Natvis visualiser and debuginfo tests for `f16`

To render `f16`s in debuggers on MSVC targets, this PR changes the compiler to output `f16`s as `struct f16 { bits: u16 }`, and includes a Natvis visualiser that manually converts the `f16`'s bits to a `float` which is can then be displayed by debuggers. `gdb`, `lldb` and `cdb` tests are also included for `f16` .

`f16`/`f128` MSVC debug info issue: #121837
Tracking issue: #116909
2024-07-09 09:07:42 +00:00
beetrees
b058de90a3
Add Natvis visualiser and debuginfo tests for f16 2024-07-09 03:47:50 +01:00
bors
51917ba8f2 Auto merge of #126171 - RalfJung:simd_bitmask_multibyte, r=workingjubilee
simd_bitmask intrinsic: add a non-power-of-2 multi-byte example

r? `@calebzulawski` `@workingjubilee`
2024-07-05 01:58:22 +00:00
bors
489233170a Auto merge of #123781 - RalfJung:miri-fn-identity, r=oli-obk
Miri function identity hack: account for possible inlining

Having a non-lifetime generic is not the only reason a function can be duplicated. Another possibility is that the function may be eligible for cross-crate inlining. So also take into account the inlining attribute in this Miri hack for function pointer identity.

That said, `cross_crate_inlinable` will still sometimes return true even for `inline(never)` functions:
- when they are `DefKind::Ctor(..) | DefKind::Closure` -- I assume those cannot be `InlineAttr::Never` anyway?
- when `cross_crate_inline_threshold == InliningThreshold::Always`

so maybe this is still not quite the right criterion to use for function pointer identity.
2024-07-04 23:45:56 +00:00
Matthias Krüger
c74d620635
Rollup merge of #126803 - tgross35:verbose-asm, r=Amanieu
Change `asm-comments` to `verbose-asm`, always emit user comments

Implements what is described in https://github.com/rust-lang/compiler-team/issues/762

Tracking issue: https://github.com/rust-lang/rust/issues/126802
2024-07-03 17:26:53 +02:00
bors
c872a1418a Auto merge of #125507 - compiler-errors:type-length-limit, r=lcnr
Re-implement a type-size based limit

r? lcnr

This PR reintroduces the type length limit added in #37789, which was accidentally made practically useless by the caching changes to `Ty::walk` in #72412, which caused the `walk` function to no longer walk over identical elements.

Hitting this length limit is not fatal unless we are in codegen -- so it shouldn't affect passes like the mir inliner which creates potentially very large types (which we observed, for example, when the new trait solver compiles `itertools` in `--release` mode).

This also increases the type length limit from `1048576 == 2 ** 20` to `2 ** 24`, which covers all of the code that can be reached with craterbot-check. Individual crates can increase the length limit further if desired.

Perf regression is mild and I think we should accept it -- reinstating this limit is important for the new trait solver and to make sure we don't accidentally hit more type-size related regressions in the future.

Fixes #125460
2024-07-03 11:56:36 +00:00
Trevor Gross
c15a698f56 Rename the asm-comments compiler flag to verbose-asm
Since this codegen flag now only controls LLVM-generated comments rather than
all assembly comments, make the name more accurate (and also match Clang).
2024-07-02 21:42:01 -04:00
Michael Goulet
3273ccea4b Fix spans 2024-07-02 15:48:48 -04:00
Michael Goulet
9dc129ae82 Give Instance::expect_resolve a span 2024-07-02 15:48:48 -04:00
Ralf Jung
41b98da42d Miri function identity hack: account for possible inlining 2024-07-02 21:05:30 +02:00
Matthias Krüger
33b0238586
Rollup merge of #127168 - DianQK:cast-size, r=workingjubilee
Use the aligned size for alloca at args/ret when the pass mode is cast

Fixes #75839. Fixes #121028.

The `load` and `store` instructions in LLVM access the aligned size. For example, `load { i64, i32 }` accesses 16 bytes on x86_64: https://alive2.llvm.org/ce/z/n8CHAp.

BTW, this example is expected to be optimized to immediate UB by Alive2: https://rust.godbolt.org/z/b7xK7hv1c and https://alive2.llvm.org/ce/z/vZDtZH.

r? compiler
2024-07-02 17:47:48 +02:00
DianQK
c453dcd62a
Use the aligned size for alloca at args when the pass mode is cast.
The `load` and `store` instructions in LLVM access the aligned size.
2024-07-02 06:33:35 +08:00
Ralf Jung
e9dd39cda4 fix simd_bitmask return type for non-power-of-two inputs, and add tests 2024-07-01 17:25:14 +02:00
Matthias Krüger
5b90824433
Rollup merge of #123237 - bjorn3:debuginfo_refactor, r=compiler-errors
Various rustc_codegen_ssa cleanups
2024-06-29 22:10:55 +02:00
Matthew Maurer
9b0ae75ecc Support #[patchable_function_entries]
See [RFC](https://github.com/maurer/rust-rfcs/blob/patchable-function-entry/text/0000-patchable-function-entry.md) (yet to be numbered)

TODO before submission:
* Needs an RFC
* Improve error reporting for malformed attributes
2024-06-25 18:23:41 +02:00
Matthew Maurer
ac7595fdb1 Support for -Z patchable-function-entry
`-Z patchable-function-entry` works like `-fpatchable-function-entry`
on clang/gcc. The arguments are total nop count and function offset.

See MCP rust-lang/compiler-team#704
2024-06-25 18:21:42 +02:00
Michael Goulet
faa28be2f1
Rollup merge of #124712 - Enselic:deprecate-inline-threshold, r=pnkfelix
Deprecate no-op codegen option `-Cinline-threshold=...`

This deprecates `-Cinline-threshold` since using it has no effect. This has been the case since the new LLVM pass manager started being used, more than 2 years ago.

Recommend using `-Cllvm-args=--inline-threshold=...` instead.

Closes #89742 which is E-help-wanted.
2024-06-24 15:51:00 -04:00
Jubilee Young
b3a1975cdc compiler(nfc): -Cforce-frame-pointers is a FramePointer 2024-06-23 00:36:33 -07:00
Guillaume Gomez
07e8b3ac01
Rollup merge of #126555 - beetrees:f16-inline-asm-arm, r=Amanieu
Add `f16` inline ASM support for 32-bit ARM

Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).`

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-22 12:57:18 +02:00
Jubilee
e7956cd994
Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu
Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-21 21:02:26 -07:00
bjorn3
887f57ff0b Remove type_i1 and type_struct from cg_ssa
They are not representable by Cranelift
2024-06-21 19:30:26 +00:00
bjorn3
aacdce38f7 Remove check_overflow method from MiscMethods
It can be retrieved from the Session too.
2024-06-21 19:30:26 +00:00
bjorn3
98e8601ac3 Remove const_bitcast from ConstMethods 2024-06-21 19:26:07 +00:00
bjorn3
7f445329ec Remove PrintBackendInfo trait
It is only implemented for a single type. Directly passing this type is
simpler and avoids overhead from indirect calls.
2024-06-21 19:26:06 +00:00
bjorn3
e9ea578147 Move vcall_visibility_metadata optimization hint out of a debuginfo generation method 2024-06-21 19:26:06 +00:00
beetrees
771e44ebd3
Add f16 inline ASM support for RISC-V 2024-06-21 18:48:20 +01:00
beetrees
753fb070bb
Add f16 inline ASM support for 32-bit ARM 2024-06-21 18:26:42 +01:00
Oli Scherer
3f34196839 Remove redundant argument from subdiagnostic method 2024-06-18 15:42:11 +00:00
Oli Scherer
7ba82d61eb Use a dedicated type instead of a reference for the diagnostic context
This paves the way for tracking more state (e.g. error tainting) in the diagnostic context handle
2024-06-18 15:42:11 +00:00
许杰友 Jieyou Xu (Joe)
1af0e6e0c3
Rollup merge of #126365 - Dirbaio:collapse-debuginfo-statics, r=workingjubilee
Honor collapse_debuginfo for statics.

fixes #126363

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2024-06-16 21:14:41 +01:00
Matthias Krüger
21de99258f
Rollup merge of #126424 - Enselic:sort-target-features, r=lqd
Also sort `crt-static` in `--print target-features` output

I didn't find `crt-static` at first (for `x86_64-unknown-linux-gnu`), because it was put at the bottom of the large and otherwise sorted list.

Fully sort the list before we print it.

Note that `llvm_target_features` starts out and remains sorted and does not need to be sorted an extra time.

On my machine the diff is just:

```diff
$ diff -u /tmp/before2.txt /tmp/after2.txt
--- /tmp/before2.txt    2024-06-13 20:40:27.091636592 +0200
+++ /tmp/after2.txt     2024-06-13 20:39:54.584894891 +0200
``@@`` -20,6 +20,7 ``@@``
     bmi1                            - Support BMI instructions.
     bmi2                            - Support BMI2 instructions.
     cmpxchg16b                      - 64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips).
+    crt-static                      - Enables C Run-time Libraries to be statically linked.
     ermsb                           - REP MOVS/STOS are fast.
     f16c                            - Support 16-bit floating point conversion instructions.
     fma                             - Enable three-operand fused multiple-add.
``@@`` -49,7 +50,6 ``@@``
     xsavec                          - Support xsavec instructions.
     xsaveopt                        - Support xsaveopt instructions.
     xsaves                          - Support xsaves instructions.
-    crt-static                      - Enables C Run-time Libraries to be statically linked.

 Code-generation features supported by LLVM for this target:
     16bit-mode                      - 16-bit mode (i8086).
```

I couldn't find a ui test that tested this output. Let's see if CI finds a regression tests.
2024-06-15 14:40:49 +02:00
Martin Nordholts
f5f067bf9d Deprecate no-op codegen option -Cinline-threshold=...
This deprecates `-Cinline-threshold` since using it has no effect. This
has been the case since the new LLVM pass manager started being used,
more than 2 years ago.
2024-06-14 20:25:17 +02:00
Martin Nordholts
04af37170c Also sort crt-static in --print target-features output
I didn't find `crt-static` at first (for `x86_64-unknown-linux-gnu`),
because it was put at the bottom the large and otherwise sorted list.

Fully sort the list before we print it.

Note that `llvm_target_features` starts out sorted and does not need to
be sorted an extra time.
2024-06-14 19:29:23 +02:00
beetrees
dfc5514527
Add f16 and f128 inline ASM support for x86 and x86-64 2024-06-13 16:12:23 +01:00
Dario Nieuwenhuis
9c25d40784 Honor collapse_debuginfo for statics.
fixes #126363
2024-06-13 02:44:14 +02:00
Michael Goulet
754b26d882
Rollup merge of #126324 - zmodem:loongarch, r=nikic
Adjust LoongArch64 data layouts for LLVM update

The data layout was changed in LLVM 19: llvm/llvm-project#93814
2024-06-12 14:26:28 -04:00
Hans Wennborg
4a06a5bc7a Adjust LoongArch64 data layouts for LLVM update
The data layout was changed in LLVM 19: llvm/llvm-project#93814
2024-06-12 12:39:09 +02:00
Nicholas Nethercote
75b164d836 Use tidy to sort crate attributes for all compiler crates.
We already do this for a number of crates, e.g. `rustc_middle`,
`rustc_span`, `rustc_metadata`, `rustc_span`, `rustc_errors`.

For the ones we don't, in many cases the attributes are a mess.
- There is no consistency about order of attribute kinds (e.g.
  `allow`/`deny`/`feature`).
- Within attribute kind groups (e.g. the `feature` attributes),
  sometimes the order is alphabetical, and sometimes there is no
  particular order.
- Sometimes the attributes of a particular kind aren't even grouped
  all together, e.g. there might be a `feature`, then an `allow`, then
  another `feature`.

This commit extends the existing sorting to all compiler crates,
increasing consistency. If any new attribute line is added there is now
only one place it can go -- no need for arbitrary decisions.

Exceptions:
- `rustc_log`, `rustc_next_trait_solver` and `rustc_type_ir_macros`,
  because they have no crate attributes.
- `rustc_codegen_gcc`, because it's quasi-external to rustc (e.g. it's
  ignored in `rustfmt.toml`).
2024-06-12 15:49:10 +10:00
Matthias Krüger
2d7f7ffba5
Rollup merge of #126159 - RalfJung:scalarint-size-mismatch, r=oli-obk
ScalarInt: size mismatches are a bug, do not delay the panic

Cc [Zulip](https://rust-lang.zulipchat.com/#narrow/stream/146212-t-compiler.2Fconst-eval/topic/Why.20are.20ScalarInt.20to.20iN.2FuN.20methods.20fallible.3F)

r? ``@oli-obk``
2024-06-10 21:12:25 +02:00
Ralf Jung
3c57ea0df7 ScalarInt: size mismatches are a bug, do not delay the panic 2024-06-10 13:43:16 +02:00
Ralf Jung
2f2031d2b2 simd packed types: update outdated check, extend codegen test 2024-06-08 21:38:32 +02:00
bors
67caf52fbc Auto merge of #125406 - tbu-:pr_rm_path_with_extension, r=Nadrieril
Directly add extension instead of using `Path::with_extension`

`Path::with_extension` has a nice footgun when the original path doesn't contain an extension: Anything after the last dot gets removed.
2024-06-06 10:24:24 +00:00
Boxy
a9702a6668 Add Ty to ConstKind::Value 2024-06-05 22:25:41 +01:00
Tobias Bucher
f7c51a2d2f Directly add extension instead of using Path::with_extension
`Path::with_extension` has a nice footgun when the original path doesn't
contain an extension: Anything after the last dot gets removed.
2024-06-04 22:12:31 +02:00
Jubilee
ca9dd62c05
Rollup merge of #125311 - calebzulawski:repr-packed-simd-intrinsics, r=workingjubilee
Make repr(packed) vectors work with SIMD intrinsics

In #117116 I fixed `#[repr(packed, simd)]` by doing the expected thing and removing padding from the layout.  This should be the last step in providing a solution to rust-lang/portable-simd#319
2024-06-02 05:06:47 -07:00
Caleb Zulawski
9bdc5b2455 Improve documentation 2024-06-01 14:17:16 -04:00
Michael Goulet
333458c2cb Uplift TypeRelation and Relate 2024-06-01 12:50:58 -04:00
Zalathar
c671eaaaff coverage: Rename MC/DC conditions_num to num_conditions
This value represents a quantity of conditions, not an ID, so the new spelling
is more appropriate.
2024-05-30 13:16:07 +10:00
Matthias Krüger
d0311c1303
Rollup merge of #124655 - Darksonn:fixed-x18, r=lqd,estebank
Add `-Zfixed-x18`

This PR is a follow-up to #124323 that proposes a different implementation. Please read the description of that PR for motivation.

See the equivalent flag in [the clang docs](https://clang.llvm.org/docs/ClangCommandLineReference.html#cmdoption-clang-ffixed-x18).

MCP: https://github.com/rust-lang/compiler-team/issues/748
Fixes https://github.com/rust-lang/rust/issues/121970
r? rust-lang/compiler
2024-05-29 20:12:32 +02:00
bors
7601adcc76 Auto merge of #125463 - GuillaumeGomez:rollup-287wx4y, r=GuillaumeGomez
Rollup of 6 pull requests

Successful merges:

 - #125263 (rust-lld: fallback to rustc's sysroot if there's no path to the linker in the target sysroot)
 - #125345 (rustc_codegen_llvm: add support for writing summary bitcode)
 - #125362 (Actually use TAIT instead of emulating it)
 - #125412 (Don't suggest adding the unexpected cfgs to the build-script it-self)
 - #125445 (Migrate `run-make/rustdoc-with-short-out-dir-option` to `rmake.rs`)
 - #125452 (Cleanup check-cfg handling in core and std)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-05-24 03:04:06 +00:00