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rust/compiler/rustc_codegen_llvm
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Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu 
Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-21 21:02:26 -07:00
..
src Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu 2024-06-21 21:02:26 -07:00
Cargo.toml sanitizers: Create the rustc_sanitizers crate 2024-04-08 12:05:41 -07:00
messages.ftl Use an error struct instead of a panic 2024-05-15 11:14:45 +02:00
README.md mv compiler to compiler/ 2020-08-30 18:45:07 +03:00

README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.