Commit Graph

1999 Commits

Author SHA1 Message Date
Matthew Maurer
9b0ae75ecc Support #[patchable_function_entries]
See [RFC](https://github.com/maurer/rust-rfcs/blob/patchable-function-entry/text/0000-patchable-function-entry.md) (yet to be numbered)

TODO before submission:
* Needs an RFC
* Improve error reporting for malformed attributes
2024-06-25 18:23:41 +02:00
Matthew Maurer
ac7595fdb1 Support for -Z patchable-function-entry
`-Z patchable-function-entry` works like `-fpatchable-function-entry`
on clang/gcc. The arguments are total nop count and function offset.

See MCP rust-lang/compiler-team#704
2024-06-25 18:21:42 +02:00
Michael Goulet
faa28be2f1
Rollup merge of #124712 - Enselic:deprecate-inline-threshold, r=pnkfelix
Deprecate no-op codegen option `-Cinline-threshold=...`

This deprecates `-Cinline-threshold` since using it has no effect. This has been the case since the new LLVM pass manager started being used, more than 2 years ago.

Recommend using `-Cllvm-args=--inline-threshold=...` instead.

Closes #89742 which is E-help-wanted.
2024-06-24 15:51:00 -04:00
Jubilee Young
b3a1975cdc compiler(nfc): -Cforce-frame-pointers is a FramePointer 2024-06-23 00:36:33 -07:00
Guillaume Gomez
07e8b3ac01
Rollup merge of #126555 - beetrees:f16-inline-asm-arm, r=Amanieu
Add `f16` inline ASM support for 32-bit ARM

Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).`

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-22 12:57:18 +02:00
Jubilee
e7956cd994
Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu
Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-21 21:02:26 -07:00
bjorn3
887f57ff0b Remove type_i1 and type_struct from cg_ssa
They are not representable by Cranelift
2024-06-21 19:30:26 +00:00
bjorn3
aacdce38f7 Remove check_overflow method from MiscMethods
It can be retrieved from the Session too.
2024-06-21 19:30:26 +00:00
bjorn3
98e8601ac3 Remove const_bitcast from ConstMethods 2024-06-21 19:26:07 +00:00
bjorn3
7f445329ec Remove PrintBackendInfo trait
It is only implemented for a single type. Directly passing this type is
simpler and avoids overhead from indirect calls.
2024-06-21 19:26:06 +00:00
bjorn3
e9ea578147 Move vcall_visibility_metadata optimization hint out of a debuginfo generation method 2024-06-21 19:26:06 +00:00
beetrees
771e44ebd3
Add f16 inline ASM support for RISC-V 2024-06-21 18:48:20 +01:00
beetrees
753fb070bb
Add f16 inline ASM support for 32-bit ARM 2024-06-21 18:26:42 +01:00
Oli Scherer
3f34196839 Remove redundant argument from subdiagnostic method 2024-06-18 15:42:11 +00:00
Oli Scherer
7ba82d61eb Use a dedicated type instead of a reference for the diagnostic context
This paves the way for tracking more state (e.g. error tainting) in the diagnostic context handle
2024-06-18 15:42:11 +00:00
许杰友 Jieyou Xu (Joe)
1af0e6e0c3
Rollup merge of #126365 - Dirbaio:collapse-debuginfo-statics, r=workingjubilee
Honor collapse_debuginfo for statics.

fixes #126363

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2024-06-16 21:14:41 +01:00
Matthias Krüger
21de99258f
Rollup merge of #126424 - Enselic:sort-target-features, r=lqd
Also sort `crt-static` in `--print target-features` output

I didn't find `crt-static` at first (for `x86_64-unknown-linux-gnu`), because it was put at the bottom of the large and otherwise sorted list.

Fully sort the list before we print it.

Note that `llvm_target_features` starts out and remains sorted and does not need to be sorted an extra time.

On my machine the diff is just:

```diff
$ diff -u /tmp/before2.txt /tmp/after2.txt
--- /tmp/before2.txt    2024-06-13 20:40:27.091636592 +0200
+++ /tmp/after2.txt     2024-06-13 20:39:54.584894891 +0200
``@@`` -20,6 +20,7 ``@@``
     bmi1                            - Support BMI instructions.
     bmi2                            - Support BMI2 instructions.
     cmpxchg16b                      - 64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips).
+    crt-static                      - Enables C Run-time Libraries to be statically linked.
     ermsb                           - REP MOVS/STOS are fast.
     f16c                            - Support 16-bit floating point conversion instructions.
     fma                             - Enable three-operand fused multiple-add.
``@@`` -49,7 +50,6 ``@@``
     xsavec                          - Support xsavec instructions.
     xsaveopt                        - Support xsaveopt instructions.
     xsaves                          - Support xsaves instructions.
-    crt-static                      - Enables C Run-time Libraries to be statically linked.

 Code-generation features supported by LLVM for this target:
     16bit-mode                      - 16-bit mode (i8086).
```

I couldn't find a ui test that tested this output. Let's see if CI finds a regression tests.
2024-06-15 14:40:49 +02:00
Martin Nordholts
f5f067bf9d Deprecate no-op codegen option -Cinline-threshold=...
This deprecates `-Cinline-threshold` since using it has no effect. This
has been the case since the new LLVM pass manager started being used,
more than 2 years ago.
2024-06-14 20:25:17 +02:00
Martin Nordholts
04af37170c Also sort crt-static in --print target-features output
I didn't find `crt-static` at first (for `x86_64-unknown-linux-gnu`),
because it was put at the bottom the large and otherwise sorted list.

Fully sort the list before we print it.

Note that `llvm_target_features` starts out sorted and does not need to
be sorted an extra time.
2024-06-14 19:29:23 +02:00
beetrees
dfc5514527
Add f16 and f128 inline ASM support for x86 and x86-64 2024-06-13 16:12:23 +01:00
Dario Nieuwenhuis
9c25d40784 Honor collapse_debuginfo for statics.
fixes #126363
2024-06-13 02:44:14 +02:00
Michael Goulet
754b26d882
Rollup merge of #126324 - zmodem:loongarch, r=nikic
Adjust LoongArch64 data layouts for LLVM update

The data layout was changed in LLVM 19: llvm/llvm-project#93814
2024-06-12 14:26:28 -04:00
Hans Wennborg
4a06a5bc7a Adjust LoongArch64 data layouts for LLVM update
The data layout was changed in LLVM 19: llvm/llvm-project#93814
2024-06-12 12:39:09 +02:00
Nicholas Nethercote
75b164d836 Use tidy to sort crate attributes for all compiler crates.
We already do this for a number of crates, e.g. `rustc_middle`,
`rustc_span`, `rustc_metadata`, `rustc_span`, `rustc_errors`.

For the ones we don't, in many cases the attributes are a mess.
- There is no consistency about order of attribute kinds (e.g.
  `allow`/`deny`/`feature`).
- Within attribute kind groups (e.g. the `feature` attributes),
  sometimes the order is alphabetical, and sometimes there is no
  particular order.
- Sometimes the attributes of a particular kind aren't even grouped
  all together, e.g. there might be a `feature`, then an `allow`, then
  another `feature`.

This commit extends the existing sorting to all compiler crates,
increasing consistency. If any new attribute line is added there is now
only one place it can go -- no need for arbitrary decisions.

Exceptions:
- `rustc_log`, `rustc_next_trait_solver` and `rustc_type_ir_macros`,
  because they have no crate attributes.
- `rustc_codegen_gcc`, because it's quasi-external to rustc (e.g. it's
  ignored in `rustfmt.toml`).
2024-06-12 15:49:10 +10:00
Matthias Krüger
2d7f7ffba5
Rollup merge of #126159 - RalfJung:scalarint-size-mismatch, r=oli-obk
ScalarInt: size mismatches are a bug, do not delay the panic

Cc [Zulip](https://rust-lang.zulipchat.com/#narrow/stream/146212-t-compiler.2Fconst-eval/topic/Why.20are.20ScalarInt.20to.20iN.2FuN.20methods.20fallible.3F)

r? ``@oli-obk``
2024-06-10 21:12:25 +02:00
Ralf Jung
3c57ea0df7 ScalarInt: size mismatches are a bug, do not delay the panic 2024-06-10 13:43:16 +02:00
Ralf Jung
2f2031d2b2 simd packed types: update outdated check, extend codegen test 2024-06-08 21:38:32 +02:00
bors
67caf52fbc Auto merge of #125406 - tbu-:pr_rm_path_with_extension, r=Nadrieril
Directly add extension instead of using `Path::with_extension`

`Path::with_extension` has a nice footgun when the original path doesn't contain an extension: Anything after the last dot gets removed.
2024-06-06 10:24:24 +00:00
Boxy
a9702a6668 Add Ty to ConstKind::Value 2024-06-05 22:25:41 +01:00
Tobias Bucher
f7c51a2d2f Directly add extension instead of using Path::with_extension
`Path::with_extension` has a nice footgun when the original path doesn't
contain an extension: Anything after the last dot gets removed.
2024-06-04 22:12:31 +02:00
Jubilee
ca9dd62c05
Rollup merge of #125311 - calebzulawski:repr-packed-simd-intrinsics, r=workingjubilee
Make repr(packed) vectors work with SIMD intrinsics

In #117116 I fixed `#[repr(packed, simd)]` by doing the expected thing and removing padding from the layout.  This should be the last step in providing a solution to rust-lang/portable-simd#319
2024-06-02 05:06:47 -07:00
Caleb Zulawski
9bdc5b2455 Improve documentation 2024-06-01 14:17:16 -04:00
Michael Goulet
333458c2cb Uplift TypeRelation and Relate 2024-06-01 12:50:58 -04:00
Nicholas Bishop
99e6a28804 Add f16/f128 handling in a couple places 2024-05-30 18:33:50 -04:00
Zalathar
c671eaaaff coverage: Rename MC/DC conditions_num to num_conditions
This value represents a quantity of conditions, not an ID, so the new spelling
is more appropriate.
2024-05-30 13:16:07 +10:00
Matthias Krüger
d0311c1303
Rollup merge of #124655 - Darksonn:fixed-x18, r=lqd,estebank
Add `-Zfixed-x18`

This PR is a follow-up to #124323 that proposes a different implementation. Please read the description of that PR for motivation.

See the equivalent flag in [the clang docs](https://clang.llvm.org/docs/ClangCommandLineReference.html#cmdoption-clang-ffixed-x18).

MCP: https://github.com/rust-lang/compiler-team/issues/748
Fixes https://github.com/rust-lang/rust/issues/121970
r? rust-lang/compiler
2024-05-29 20:12:32 +02:00
bors
7601adcc76 Auto merge of #125463 - GuillaumeGomez:rollup-287wx4y, r=GuillaumeGomez
Rollup of 6 pull requests

Successful merges:

 - #125263 (rust-lld: fallback to rustc's sysroot if there's no path to the linker in the target sysroot)
 - #125345 (rustc_codegen_llvm: add support for writing summary bitcode)
 - #125362 (Actually use TAIT instead of emulating it)
 - #125412 (Don't suggest adding the unexpected cfgs to the build-script it-self)
 - #125445 (Migrate `run-make/rustdoc-with-short-out-dir-option` to `rmake.rs`)
 - #125452 (Cleanup check-cfg handling in core and std)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-05-24 03:04:06 +00:00
Guillaume Gomez
4ee97fc3db
Rollup merge of #125345 - durin42:thin-link-bitcode, r=bjorn3
rustc_codegen_llvm: add support for writing summary bitcode

Typical uses of ThinLTO don't have any use for this as a standalone file, but distributed ThinLTO uses this to make the linker phase more efficient. With clang you'd do something like `clang -flto=thin -fthin-link-bitcode=foo.indexing.o -c foo.c` and then get both foo.o (full of bitcode) and foo.indexing.o (just the summary or index part of the bitcode). That's then usable by a two-stage linking process that's more friendly to distributed build systems like bazel, which is why I'm working on this area.

I talked some to `@teresajohnson` about naming in this area, as things seem to be a little confused between various blog posts and build systems. "bitcode index" and "bitcode summary" tend to be a little too ambiguous, and she tends to use "thin link bitcode" and "minimized bitcode" (which matches the descriptions in LLVM). Since the clang option is thin-link-bitcode, I went with that to try and not add a new spelling in the world.

Per `@dtolnay,` you can work around the lack of this by using `lld --thinlto-index-only` to do the indexing on regular .o files of bitcode, but that is a bit wasteful on actions when we already have all the information in rustc and could just write out the matching minimized bitcode. I didn't test that at all in our infrastructure, because by the time I learned that I already had this patch largely written.
2024-05-23 23:39:26 +02:00
Augie Fackler
a0581b5b7f cleanup: run rustfmt 2024-05-23 15:10:04 -04:00
Augie Fackler
3ea494190f cleanup: standardize on summary over index in names
I did this in the user-facing logic, but I noticed while fixing a minor
defect that I had missed it in a few places in the internal details.
2024-05-23 15:07:43 -04:00
Augie Fackler
de8200c5a4 thinlto: only build summary file if needed
If we don't do this, some versions of LLVM (at least 17, experimentally)
will double-emit some error messages, which is how I noticed this. Given
that it seems to be costing some extra work, let's only request the
summary bitcode production if we'll actually bother writing it down,
otherwise skip it.
2024-05-23 14:58:30 -04:00
Nicholas Nethercote
8e94226e61 Remove #[macro_use] extern crate tracing from rustc_codegen_llvm. 2024-05-23 18:02:40 +10:00
Augie Fackler
03d5556ced cleanup: remove leftover extra block
This was needed in an older version of this patch, but never got edited
out when it became obsolete.
2024-05-22 14:04:22 -04:00
Augie Fackler
aa91871539 rustc_codegen_llvm: add support for writing summary bitcode
Typical uses of ThinLTO don't have any use for this as a standalone
file, but distributed ThinLTO uses this to make the linker phase more
efficient. With clang you'd do something like `clang -flto=thin
-fthin-link-bitcode=foo.indexing.o -c foo.c` and then get both foo.o
(full of bitcode) and foo.indexing.o (just the summary or index part of
the bitcode). That's then usable by a two-stage linking process that's
more friendly to distributed build systems like bazel, which is why I'm
working on this area.

I talked some to @teresajohnson about naming in this area, as things
seem to be a little confused between various blog posts and build
systems. "bitcode index" and "bitcode summary" tend to be a little too
ambiguous, and she tends to use "thin link bitcode" and "minimized
bitcode" (which matches the descriptions in LLVM). Since the clang
option is thin-link-bitcode, I went with that to try and not add a new
spelling in the world.

Per @dtolnay, you can work around the lack of this by using `lld
--thinlto-index-only` to do the indexing on regular .o files of
bitcode, but that is a bit wasteful on actions when we already have all
the information in rustc and could just write out the matching minimized
bitcode. I didn't test that at all in our infrastructure, because by the
time I learned that I already had this patch largely written.
2024-05-22 14:04:22 -04:00
Scott McMurray
8ee3d29cd9 Stop using to_hir_binop in codegen 2024-05-22 01:34:26 -07:00
Matthias Krüger
fd975f75fa
Rollup merge of #125266 - workingjubilee:stream-plastic-love, r=RalfJung,nikic
compiler: add simd_ctpop intrinsic

Fairly straightforward addition.

cc `@rust-lang/opsem` new (extremely boring) intrinsic
2024-05-21 12:47:06 +02:00
Tobias Bucher
fa1b7f2d78 Remove some Path::to_str from rustc_codegen_llvm
Unnecessary panic paths when there's a better option.
2024-05-20 23:17:11 +02:00
Caleb Zulawski
86158f581d Make repr(packed) vectors work with SIMD intrinsics 2024-05-20 01:09:29 -04:00
Jubilee Young
213351ae9e clarify the second arg to llvm.ctlz and cttz 2024-05-19 19:12:38 -07:00
Jubilee Young
1914c722b5 compiler: add simd_ctpop intrinsic 2024-05-18 18:11:20 -07:00
Santiago Pastorino
6b46a919e1
Rename Unsafe to Safety 2024-05-17 18:33:37 -03:00
Alice Ryhl
b780fa9219 Use an error struct instead of a panic 2024-05-15 11:14:45 +02:00
Alice Ryhl
518becf5ea Fail on non-aarch64 targets 2024-05-14 21:09:42 +02:00
Zalathar
bfadc3a9b9 coverage: CoverageIdsInfo::mcdc_bitmap_bytes is never needed
This code for recalculating `mcdc_bitmap_bytes` doesn't provide any benefit,
because its result won't have changed from the value in `FunctionCoverageInfo`
that was computed during the MIR instrumentation pass.
2024-05-14 16:41:04 +10:00
bors
6a19a87097 Auto merge of #124972 - matthiaskrgr:rollup-3fablim, r=matthiaskrgr
Rollup of 5 pull requests

Successful merges:

 - #124615 (coverage: Further simplify extraction of mapping info from MIR)
 - #124778 (Fix parse error message for meta items)
 - #124797 (Refactor float `Primitive`s to a separate `Float` type)
 - #124888 (Migrate `run-make/rustdoc-output-path` to rmake)
 - #124957 (Make `Ty::builtin_deref` just return a `Ty`)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-05-10 16:04:26 +00:00
Matthias Krüger
9a9ec90567
Rollup merge of #124957 - compiler-errors:builtin-deref, r=michaelwoerister
Make `Ty::builtin_deref` just return a `Ty`

Nowhere in the compiler are we using the mutability part of the `TyAndMut` that we used to return.
2024-05-10 16:10:47 +02:00
Matthias Krüger
1ae0d90b72
Rollup merge of #124797 - beetrees:primitive-float, r=davidtwco
Refactor float `Primitive`s to a separate `Float` type

Now there are 4 of them, it makes sense to refactor `F16`, `F32`, `F64` and `F128` out of `Primitive` and into a separate `Float` type (like integers already are). This allows patterns like `F16 | F32 | F64 | F128` to be simplified into `Float(_)`, and is consistent with `ty::FloatTy`.

As a side effect, this PR also makes the `Ty::primitive_size` method work with `f16` and `f128`.

Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-05-10 16:10:46 +02:00
bors
66f877007d Auto merge of #124932 - RalfJung:temporal, r=compiler-errors
codegen: memmove/memset cannot be non-temporal

non-temporal memset is not a thing.
And for memmove, since the LLVM backend doesn't support this, surely we don't need it in the GCC backend.
2024-05-10 13:55:59 +00:00
Michael Goulet
d50c2b0a52 Make builtin_deref just return a Ty 2024-05-09 22:55:00 -04:00
Michael Goulet
1c19b6ad60 Rename Generics::params to Generics::own_params 2024-05-09 20:58:46 -04:00
Ralf Jung
95582e6fcb codegen: memmove/memset cannot be non-temporal 2024-05-09 18:59:00 +02:00
Matthew Maurer
4d397d33da Adjust 64-bit ARM data layouts for LLVM update
LLVM has updated data layouts to specify `Fn32` on 64-bit ARM to avoid
C++ accidentally underaligning functions when trying to comply with
member function ABIs.

This should only affect Rust in cases where we had a similar bug (I
don't believe we have one), but our data layout must match to generate
code.

As a compatibility adaptatation, if LLVM is not version 19 yet, `Fn32`
gets voided from the data layout.

See llvm/llvm-project#90415
2024-05-06 16:53:17 +00:00
beetrees
3769fddba2
Refactor float Primitives to a separate Float type 2024-05-06 14:56:10 +01:00
bors
befabbc9e5 Auto merge of #124675 - matthiaskrgr:rollup-x6n79ua, r=matthiaskrgr
Rollup of 7 pull requests

Successful merges:

 - #122492 (Implement ptr_as_ref_unchecked)
 - #123815 (Fix cannot usage in time.rs)
 - #124059 (default_alloc_error_hook: explain difference to default __rdl_oom in alloc)
 - #124510 (Add raw identifier in a typo suggestion)
 - #124555 (coverage: Clean up creation of MC/DC condition bitmaps)
 - #124593 (Describe and use CStr literals in CStr and CString docs)
 - #124630 (CI: remove `env-x86_64-apple-tests` YAML anchor)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-05-03 19:46:04 +00:00
Matthias Krüger
613bccc4ca
Rollup merge of #124555 - Zalathar:init-coverage, r=nnethercote
coverage: Clean up creation of MC/DC condition bitmaps

This PR improves the code for creating and initializing [MC/DC](https://en.wikipedia.org/wiki/Modified_condition/decision_coverage) condition bitmap variables, as introduced by #123409 and modified by #124255.

- The condition bitmap variables are now created eagerly at the start of per-function codegen, via a new `init_coverage` method in `CoverageInfoBuilderMethods`. This avoids having to retroactively create the bitmaps while doing codegen for an individual coverage statement.
- As a result, we can now create and initialize those bitmaps using existing safe APIs, instead of having to perform our own unsafe call to `llvm::LLVMBuildAlloca`.
- This PR also tweaks the way we count the number of condition bitmaps needed, by tracking the total number of bitmaps needed (max depth + 1), instead of only tracking the maximum depth. This reduces the potential for subtle off-by-one confusion.
2024-05-03 20:33:46 +02:00
bors
0d7b2fb797 Auto merge of #123441 - saethlin:fixed-len-file-names, r=oli-obk
Stabilize the size of incr comp object file names

The current implementation does not produce stable-length paths, and we create the paths in a way that makes our allocation behavior is nondeterministic. I think `@eddyb` fixed a number of other cases like this in the past, and this PR fixes another one. Whether that actually matters I have no idea, but we still have bimodal behavior in rustc-perf and the non-uniformity in `find` and `ls` was bothering me.

I've also removed the truncation of the mangled CGU names. Before this PR incr comp paths look like this:
```
target/debug/incremental/scratch-38izrrq90cex7/s-gux6gz0ow8-1ph76gg-ewe1xj434l26w9up5bedsojpd/261xgo1oqnd90ry5.o
```
And after, they look like this:
```
target/debug/incremental/scratch-035omutqbfkbw/s-gux6borni0-16r3v1j-6n64tmwqzchtgqzwwim5amuga/55v2re42sztc8je9bva6g8ft3.o
```

On the one hand, I'm sure this will break some people's builds because they're on Windows and only a few bytes from the path length limit. But if we're that seriously worried about the length of our file names, I have some other ideas on how to make them smaller. And last time I deleted some hash truncations from the compiler, there was a huge drop in the number if incremental compilation ICEs that were reported: https://github.com/rust-lang/rust/pull/110367https://github.com/rust-lang/rust/pull/110367

---

Upon further reading, this PR actually fixes a bug. This comment says the CGU names are supposed to be a fixed-length hash, and before this PR they aren't: ca7d34efa9/compiler/rustc_monomorphize/src/partitioning.rs (L445-L448)
2024-05-03 17:41:48 +00:00
Alice Ryhl
40f0172c6a Add -Zfixed-x18
Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2024-05-03 14:32:08 +02:00
Waffle Lapkin
698d7a031e Inline & delete Ty::new_unit, since it's just a field access 2024-05-02 17:49:23 +02:00
Zalathar
de972b7321 coverage: Replace max_decision_depth with num_condition_bitmaps
This clearly distinguishes individual decision-depth indices from the total
number of condition bitmaps to allocate.
2024-05-01 09:55:22 +10:00
Zalathar
0b3a47900e coverage: Set up MC/DC bitmaps without additional unsafe code
Because this now always takes place at the start of the function, we can just
use the normal `alloca` method and then initialize each bitmap immediately.

This patch also moves bitmap setup out of the `mcdc_parameters` method, because
there is no longer any particular reason for it to be there.
2024-05-01 09:55:22 +10:00
Zalathar
52d608b560 coverage: Eagerly do start-of-function codegen for coverage 2024-05-01 09:06:53 +10:00
Matthias Krüger
784316eadc
Rollup merge of #124511 - nnethercote:rm-extern-crates, r=fee1-dead
Remove many `#[macro_use] extern crate foo` items

This requires the addition of more `use` items, which often make the code more verbose. But they also make the code easier to read, because `#[macro_use]` obscures where macros are defined.

r? `@fee1-dead`
2024-04-30 15:04:08 +02:00
bors
7a58674259 Auto merge of #124255 - RenjiSann:renji/mcdc-nested-expressions, r=Zalathar
MCDC coverage: support nested decision coverage

#123409 provided the initial MCDC coverage implementation.

As referenced in #124144, it does not currently support "nested" decisions, like the following example :

```rust
fn nested_if_in_condition(a: bool, b: bool, c: bool) {
    if a && if b || c { true } else { false } {
        say("yes");
    } else {
        say("no");
    }
}
```

Note that there is an if-expression (`if b || c ...`) embedded inside a boolean expression in the decision of an outer if-expression.

This PR proposes a workaround for this cases, by introducing a Decision context stack, and by handing several `temporary condition bitmaps` instead of just one.
When instrumenting boolean expressions, if the current node is a leaf condition (i.e. not a `||`/`&&` logical operator nor a `!` not operator), we insert a new decision context, such that if there are more boolean expressions inside the condition, they are handled as separate expressions.

On the codegen LLVM side, we allocate as many `temp_cond_bitmap`s as necessary to handle the maximum encountered decision depth.
2024-04-29 11:54:49 +00:00
Dorian Péron
60ca9b6e29 mcdc-coverage: Get decision_depth from THIR lowering
Use decision context stack to handle nested decisions:
- Introduce MCDCDecisionCtx
- Use a stack of MCDCDecisionCtx to handle nested decisions
2024-04-29 09:13:40 +00:00
Dorian Péron
ae8c023983 mcdc-coverage: Add decision_depth field in structs
Add decision_depth field to TVBitmapUpdate/CondBitmapUpdate statements
Add decision_depth field to BcbMappingKinds MCDCBranch and MCDCDecision
Add decision_depth field to MCDCBranchSpan and MCDCDecisionSpan
2024-04-29 09:13:40 +00:00
Dorian Péron
3c2f48ede9 mcdc-coverage: Add possibility for codegen llvm to handle several condition bitmaps 2024-04-29 08:41:15 +00:00
Nicholas Nethercote
4814fd0a4b Remove extern crate rustc_macros from numerous crates. 2024-04-29 10:21:54 +10:00
bors
284f94f9c0 Auto merge of #121298 - nikic:writable, r=cuviper
Set writable and dead_on_unwind attributes for sret arguments

Set the `writable` and `dead_on_unwind` attributes for `sret` arguments. This allows call slot optimization to remove more memcpy's.

See https://llvm.org/docs/LangRef.html#parameter-attributes for the specification of these attributes. In short, the statement we're making here is that:

 * The return slot is writable.
 * The return slot will not be read if the function unwinds.

Fixes https://github.com/rust-lang/rust/issues/90595.
2024-04-25 04:31:56 +00:00
Nikita Popov
3695af697e Set writable and dead_on_unwind attributes for sret arguments 2024-04-25 11:43:47 +09:00
bors
29a56a3b1c Auto merge of #122053 - erikdesjardins:alloca, r=nikic
Stop using LLVM struct types for alloca

The alloca type has no semantic meaning, only the size (and alignment, but we specify it explicitly) matter. Using `[N x i8]` is a more direct way to specify that we want `N` bytes, and avoids relying on LLVM's struct layout. It is likely that a future LLVM version will change to an untyped alloca representation.

Split out from #121577.

r? `@ghost`
2024-04-24 03:00:44 +00:00
Matthias Krüger
918304b190
Rollup merge of #124003 - WaffleLapkin:dellvmization, r=scottmcm,RalfJung,antoyo
Dellvmize some intrinsics (use `u32` instead of `Self` in some integer intrinsics)

This implements https://github.com/rust-lang/compiler-team/issues/693 minus what was implemented in #123226.

Note: I decided to _not_ change `shl`/... builder methods, as it just doesn't seem worth it.

r? ``@scottmcm``
2024-04-23 20:17:51 +02:00
Guillaume Gomez
1a12ec41e9
Rollup merge of #124178 - GuillaumeGomez:llvm-backend, r=oli-obk
[cleanup] [llvm backend] Prevent creating the same `Instance::mono` multiple times

Just a little thing I came across while going through the code.

r? ```@oli-obk```
2024-04-22 20:25:58 +02:00
Ben Kimock
6ee3713b08 Stabilize the size of incr comp object file names 2024-04-22 10:50:07 -04:00
Guillaume Gomez
d34be935ec Prevent creating the same Instance::mono multiple times 2024-04-19 23:13:58 +02:00
zhuyunxing
439dbfa1ec coverage. Lowering MC/DC statements to llvm-ir 2024-04-20 00:34:40 +08:00
zhuyunxing
cf6b6cb2b4 coverage. Generate Mappings of decisions and conditions for MC/DC 2024-04-19 17:09:26 +08:00
bors
c5de414865 Auto merge of #123144 - dpaoliello:arm64eclib, r=GuillaumeGomez,ChrisDenton,wesleywiser
Add support for Arm64EC to the Standard Library

Adds the final pieces so that the standard library can be built for arm64ec-pc-windows-msvc (initially added in #119199)

* Bumps `windows-sys` to 0.56.0, which adds support for Arm64EC.
* Correctly set the `isEC` parameter for LLVM's `writeArchive` function.
* Add `#![feature(asm_experimental_arch)]` to library crates where Arm64EC inline assembly is used, as it is currently unstable.
2024-04-18 12:22:52 +00:00
Matthias Krüger
90013ff5ad
Rollup merge of #124090 - durin42:llvm-19-riscv-feature, r=cuviper
llvm: update riscv target feature to match LLVM 19

In llvm/llvm-project@9067070d91 they ended up largely reverting
llvm/llvm-project@e817966718. This means the change we did in
rust-lang/rust@b378059e6b is now only corrct for LLVM 18...so we have to adjust again.

``@rustbot`` label: +llvm-main
2024-04-18 08:37:49 +02:00
Augie Fackler
22b704bac4 llvm: update riscv target feature to match LLVM 19
In llvm/llvm-project@9067070d91 they ended
up largely reverting
llvm/llvm-project@e817966718. This means
the change we did in
rust-lang/rust@b378059e6b is now only
corrct for LLVM 18...so we have to adjust again.

@rustbot label: +llvm-main
2024-04-17 16:15:24 -04:00
Mark Rousskov
649e80184b Codegen ZSTs without an allocation
This makes sure that &[] is just as efficient as indirecting through
unsafe code (from_raw_parts). No new stable guarantee is intended about
whether or not we do this, this is just an optimization.

Co-authored-by: Ralf Jung <post@ralfj.de>
2024-04-16 21:13:21 -04:00
Maybe Waffle
ceead1bda6 Change intrinsic types to use u32 instead of T to match stable reexports 2024-04-16 11:53:04 +00:00
Daniel Paoliello
32f5ca4be7 Add support for Arm64EC to the Standard Library 2024-04-15 16:05:16 -07:00
bors
5dcb678ad8 Auto merge of #122917 - saethlin:atomicptr-to-int, r=nikic
Add the missing inttoptr when we ptrtoint in ptr atomics

Ralf noticed this here: https://github.com/rust-lang/rust/pull/122220#discussion_r1535172094

Our previous codegen forgot to add the cast back to integer type. The code compiles anyway, because of course all locals are in-memory to start with, so previous codegen would do the integer atomic, store the integer to a local, then load a pointer from that local. Which is definitely _not_ what we wanted: That's an integer-to-pointer transmute, so all pointers returned by these `AtomicPtr` methods didn't have provenance. Yikes.

Here's the IR for `AtomicPtr::fetch_byte_add` on 1.76: https://godbolt.org/z/8qTEjeraY
```llvm
define noundef ptr `@atomicptr_fetch_byte_add(ptr` noundef nonnull align 8 %a, i64 noundef %v) unnamed_addr #0 !dbg !7 {
start:
  %0 = alloca ptr, align 8, !dbg !12
  %val = inttoptr i64 %v to ptr, !dbg !12
  call void `@llvm.lifetime.start.p0(i64` 8, ptr %0), !dbg !28
  %1 = ptrtoint ptr %val to i64, !dbg !28
  %2 = atomicrmw add ptr %a, i64 %1 monotonic, align 8, !dbg !28
  store i64 %2, ptr %0, align 8, !dbg !28
  %self = load ptr, ptr %0, align 8, !dbg !28
  call void `@llvm.lifetime.end.p0(i64` 8, ptr %0), !dbg !28
  ret ptr %self, !dbg !33
}
```

r? `@RalfJung`
cc `@nikic`
2024-04-15 08:07:47 +00:00
Matthias Krüger
f4f644182b
Rollup merge of #123775 - scottmcm:place-val, r=cjgillot
Make `PlaceRef` and `OperandValue::Ref` share a common `PlaceValue` type

Both `PlaceRef` and `OperandValue::Ref` need the triple of the backend pointer immediate, the optional backend metadata for DSTs, and the actual alignment of the place (since it can differ from the ABI alignment).

This PR introduces a new `PlaceValue` type for those three values, leaving [`PlaceRef`](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_codegen_ssa/mir/place/struct.PlaceRef.html) with the `TyAndLayout` and a `PlaceValue`, just like how [`OperandRef`](https://doc.rust-lang.org/nightly/nightly-rustc/rustc_codegen_ssa/mir/operand/struct.OperandRef.html) is a `TyAndLayout` and an `OperandValue`.

This means that various places that use `Ref`s as places can just pass the `PlaceValue` along, like in the below excerpt from the diff:
```diff
        match operand.val {
-            OperandValue::Ref(ptr, meta, align) => {
-                debug_assert_eq!(meta, None);
+            OperandValue::Ref(source_place_val) => {
+                debug_assert_eq!(source_place_val.llextra, None);
                debug_assert!(matches!(operand_kind, OperandValueKind::Ref));
-                let fake_place = PlaceRef::new_sized_aligned(ptr, cast, align);
+                let fake_place = PlaceRef { val: source_place_val, layout: cast };
                Some(bx.load_operand(fake_place).val)
            }
```

There's more refactoring that I'd like to do after this, but I wanted to stop the PR here where it's hopefully easy (albeit probably not quick) to review since I tried to keep every change line-by-line clear.  (Most are just adding `.val` to get to a field.)

You can also go commit-at-a-time if you'd like.  Each passed tidy and the codegen tests on my machine (though I didn't run the cg_gcc ones).
2024-04-12 04:38:21 +02:00
Erik Desjardins
f4426c189f use [N x i8] for alloca types 2024-04-11 21:42:35 -04:00
bors
05ccc49a44 Auto merge of #123507 - dpaoliello:arm64ecasm, r=Amanieu
Add support for Arm64EC inline assembly (as unstable)

Compiler support for Arm64EC assembly mostly reuses the existing AArch64 support, except that it needs to block registers that are not permitted: <https://learn.microsoft.com/en-us/windows/arm/arm64ec-abi#register-mapping-and-blocked-registers>

For assembly authors there are several caveats and differences that need to be considered, I've provided documentation for this as part of the "Standard Library Support" PR: <https://github.com/rust-lang/rust/pull/123144/files#diff-6b08532480943c8b82f5dbda7ee1521afa74c9f626466aeb308dfa6956397edd>

r? rust-lang/compiler
2024-04-11 07:15:04 +00:00
Scott McMurray
d0ae76848a Add load/store helpers that take PlaceValue 2024-04-11 00:10:10 -07:00
Scott McMurray
3596098823 Put PlaceValue into OperandValue::Ref, rather than 3 tuple fields 2024-04-11 00:10:10 -07:00
Scott McMurray
89502e584b Make PlaceRef hold a PlaceValue for the non-layout fields (like OperandRef does) 2024-04-11 00:10:10 -07:00
Daniel Paoliello
2e44d29460 Add support for Arm64EC inline assembly 2024-04-10 10:06:44 -07:00