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Fix to pass CI

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This commit is contained in:
ferris 2024-10-07 10:55:12 +02:00
parent c12710c7e2
commit a75f7a266c
2 changed files with 6 additions and 3 deletions
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4
embassy-usb-synopsys-otg/src/lib.rs
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@ -1104,7 +1104,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> {
if frame_is_odd { if frame_is_odd {
r.set_sd0pid_sevnfrm(true); r.set_sd0pid_sevnfrm(true);
} else { } else {
r.set_sd1pid_soddfrm(true); r.set_soddfrm(true);
} }
}); });
} }
@ -1206,7 +1206,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> {
if frame_is_odd { if frame_is_odd {
r.set_sd0pid_sevnfrm(true); r.set_sd0pid_sevnfrm(true);
} else { } else {
r.set_sd1pid_soddfrm(true); r.set_soddfrm_sd1pid(true);
} }
}); });
} }

5
embassy-usb-synopsys-otg/src/otg_v1.rs
View File

@ -1,5 +1,8 @@
#![no_std]
#![doc = "Peripheral access API (generated using chiptool v0.1.0 (6362222 2024-09-23))"] #![doc = "Peripheral access API (generated using chiptool v0.1.0 (6362222 2024-09-23))"]
#![allow(missing_docs)]
#![allow(non_camel_case_types)]
#[doc = "USB OTG core by Synopsys (more docs at https://www.intel.com/content/www/us/en/programmable/hps/agilex5/index_frames.html)"] #[doc = "USB OTG core by Synopsys (more docs at https://www.intel.com/content/www/us/en/programmable/hps/agilex5/index_frames.html)"]
#[derive(Copy, Clone, Eq, PartialEq)] #[derive(Copy, Clone, Eq, PartialEq)]
pub struct Otg { pub struct Otg {