mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-21 22:32:29 +00:00
Manual adjustments to fix CI
This commit is contained in:
ferris
parent
0b319ff8c6
commit
c12710c7e2
@ -20,7 +20,7 @@ use embassy_usb_driver::{
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pub mod otg_v1;
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use otg_v1::{regs, vals, Otg};
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use otg_v1::Otg;
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/// Handle interrupts.
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pub unsafe fn on_interrupt<const MAX_EP_COUNT: usize>(
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@ -46,7 +46,7 @@ pub unsafe fn on_interrupt<const MAX_EP_COUNT: usize>(
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assert!(ep_num < ep_count);
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match status.pktstsd() {
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vals::Pktstsd::SETUP_DATA_RX => {
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otg_v1::Pktstsd::SETUP_DATA_RX => {
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trace!("SETUP_DATA_RX");
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assert!(len == 8, "invalid SETUP packet length={}", len);
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assert!(ep_num == 0, "invalid SETUP packet endpoint={}", ep_num);
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@ -74,7 +74,7 @@ pub unsafe fn on_interrupt<const MAX_EP_COUNT: usize>(
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r.fifo(0).read();
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}
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}
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vals::Pktstsd::OUT_DATA_RX => {
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otg_v1::Pktstsd::OUT_DATA_RX => {
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trace!("OUT_DATA_RX ep={} len={}", ep_num, len);
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if state.ep_states[ep_num].out_size.load(Ordering::Acquire) == EP_OUT_BUFFER_EMPTY {
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@ -101,10 +101,10 @@ pub unsafe fn on_interrupt<const MAX_EP_COUNT: usize>(
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}
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}
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}
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vals::Pktstsd::OUT_DATA_DONE => {
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otg_v1::Pktstsd::OUT_DATA_DONE => {
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trace!("OUT_DATA_DONE ep={}", ep_num);
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}
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vals::Pktstsd::SETUP_DATA_DONE => {
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otg_v1::Pktstsd::SETUP_DATA_DONE => {
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trace!("SETUP_DATA_DONE ep={}", ep_num);
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if quirk_setup_late_cnak {
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@ -202,12 +202,12 @@ impl PhyType {
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}
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}
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fn to_dspd(&self) -> vals::Dspd {
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fn to_dspd(&self) -> otg_v1::Dspd {
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match self {
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PhyType::InternalFullSpeed => vals::Dspd::FULL_SPEED_INTERNAL,
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PhyType::InternalHighSpeed => vals::Dspd::HIGH_SPEED,
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PhyType::ExternalFullSpeed => vals::Dspd::FULL_SPEED_EXTERNAL,
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PhyType::ExternalHighSpeed => vals::Dspd::HIGH_SPEED,
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PhyType::InternalFullSpeed => otg_v1::Dspd::FULL_SPEED_INTERNAL,
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PhyType::InternalHighSpeed => otg_v1::Dspd::HIGH_SPEED,
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PhyType::ExternalFullSpeed => otg_v1::Dspd::FULL_SPEED_EXTERNAL,
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PhyType::ExternalHighSpeed => otg_v1::Dspd::HIGH_SPEED,
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}
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}
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}
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@ -616,7 +616,7 @@ impl<'d, const MAX_EP_COUNT: usize> Bus<'d, MAX_EP_COUNT> {
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// Set speed.
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r.dcfg().write(|w| {
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w.set_pfivl(vals::Pfivl::FRAME_INTERVAL_80);
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w.set_pfivl(otg_v1::Pfivl::FRAME_INTERVAL_80);
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w.set_dspd(phy_type.to_dspd());
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if self.config.xcvrdly {
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w.set_xcvrdly(true);
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@ -630,7 +630,7 @@ impl<'d, const MAX_EP_COUNT: usize> Bus<'d, MAX_EP_COUNT> {
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// Unmask and clear core interrupts
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self.restore_irqs();
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r.gintsts().write_value(regs::Gintsts(0xFFFF_FFFF));
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r.gintsts().write_value(otg_v1::Gintsts(0xFFFF_FFFF));
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// Unmask global interrupt
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r.gahbcfg().write(|w| {
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@ -1221,7 +1221,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> {
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for chunk in buf.chunks(4) {
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let mut tmp = [0u8; 4];
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tmp[0..chunk.len()].copy_from_slice(chunk);
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self.regs.fifo(index).write_value(regs::Fifo(u32::from_ne_bytes(tmp)));
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self.regs.fifo(index).write_value(otg_v1::Fifo(u32::from_ne_bytes(tmp)));
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}
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});
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@ -1331,13 +1331,13 @@ impl<'d> embassy_usb_driver::ControlPipe for ControlPipe<'d> {
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}
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}
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/// Translates HAL [EndpointType] into PAC [vals::Eptyp]
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fn to_eptyp(ep_type: EndpointType) -> vals::Eptyp {
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/// Translates HAL [EndpointType] into PAC [otg_v1::Eptyp]
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fn to_eptyp(ep_type: EndpointType) -> otg_v1::Eptyp {
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match ep_type {
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EndpointType::Control => vals::Eptyp::CONTROL,
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EndpointType::Isochronous => vals::Eptyp::ISOCHRONOUS,
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EndpointType::Bulk => vals::Eptyp::BULK,
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EndpointType::Interrupt => vals::Eptyp::INTERRUPT,
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EndpointType::Control => otg_v1::Eptyp::CONTROL,
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EndpointType::Isochronous => otg_v1::Eptyp::ISOCHRONOUS,
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EndpointType::Bulk => otg_v1::Eptyp::BULK,
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EndpointType::Interrupt => otg_v1::Eptyp::INTERRUPT,
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}
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}
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@ -1388,5 +1388,5 @@ pub struct OtgInstance<'d, const MAX_EP_COUNT: usize> {
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/// Whether to set up late cnak
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pub quirk_setup_late_cnak: bool,
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/// Function to calculate TRDT value based on some internal clock speed.
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pub calculate_trdt_fn: fn(speed: vals::Dspd) -> u8,
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pub calculate_trdt_fn: fn(speed: otg_v1::Dspd) -> u8,
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}
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@ -18,340 +18,340 @@ impl Otg {
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}
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#[doc = "Control and status register"]
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#[inline(always)]
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pub const fn gotgctl(self) -> crate::common::Reg<Gotgctl, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
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pub const fn gotgctl(self) -> common::Reg<Gotgctl, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
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}
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#[doc = "Interrupt register"]
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#[inline(always)]
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pub const fn gotgint(self) -> crate::common::Reg<Gotgint, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
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pub const fn gotgint(self) -> common::Reg<Gotgint, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
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}
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#[doc = "AHB configuration register"]
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#[inline(always)]
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pub const fn gahbcfg(self) -> crate::common::Reg<Gahbcfg, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
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pub const fn gahbcfg(self) -> common::Reg<Gahbcfg, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
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}
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#[doc = "USB configuration register"]
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#[inline(always)]
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pub const fn gusbcfg(self) -> crate::common::Reg<Gusbcfg, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
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pub const fn gusbcfg(self) -> common::Reg<Gusbcfg, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
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}
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#[doc = "Reset register"]
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#[inline(always)]
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pub const fn grstctl(self) -> crate::common::Reg<Grstctl, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
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pub const fn grstctl(self) -> common::Reg<Grstctl, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
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}
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#[doc = "Core interrupt register"]
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#[inline(always)]
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pub const fn gintsts(self) -> crate::common::Reg<Gintsts, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
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pub const fn gintsts(self) -> common::Reg<Gintsts, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
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}
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#[doc = "Interrupt mask register"]
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#[inline(always)]
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pub const fn gintmsk(self) -> crate::common::Reg<Gintmsk, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
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pub const fn gintmsk(self) -> common::Reg<Gintmsk, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
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}
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#[doc = "Receive status debug read register"]
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#[inline(always)]
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pub const fn grxstsr(self) -> crate::common::Reg<Grxsts, crate::common::R> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
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pub const fn grxstsr(self) -> common::Reg<Grxsts, common::R> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
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}
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#[doc = "Status read and pop register"]
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#[inline(always)]
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pub const fn grxstsp(self) -> crate::common::Reg<Grxsts, crate::common::R> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
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pub const fn grxstsp(self) -> common::Reg<Grxsts, common::R> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
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}
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#[doc = "Receive FIFO size register"]
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#[inline(always)]
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pub const fn grxfsiz(self) -> crate::common::Reg<Grxfsiz, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x24usize) as _) }
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pub const fn grxfsiz(self) -> common::Reg<Grxfsiz, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x24usize) as _) }
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}
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#[doc = "Endpoint 0 transmit FIFO size register (device mode)"]
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#[inline(always)]
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pub const fn dieptxf0(self) -> crate::common::Reg<Fsiz, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
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pub const fn dieptxf0(self) -> common::Reg<Fsiz, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
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}
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#[doc = "Non-periodic transmit FIFO size register (host mode)"]
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#[inline(always)]
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pub const fn hnptxfsiz(self) -> crate::common::Reg<Fsiz, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
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pub const fn hnptxfsiz(self) -> common::Reg<Fsiz, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
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}
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#[doc = "Non-periodic transmit FIFO/queue status register (host mode)"]
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#[inline(always)]
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pub const fn hnptxsts(self) -> crate::common::Reg<Hnptxsts, crate::common::R> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
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pub const fn hnptxsts(self) -> common::Reg<Hnptxsts, common::R> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
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}
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#[doc = "OTG I2C access register"]
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#[inline(always)]
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pub const fn gi2cctl(self) -> crate::common::Reg<Gi2cctl, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x30usize) as _) }
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pub const fn gi2cctl(self) -> common::Reg<Gi2cctl, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x30usize) as _) }
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}
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#[doc = "General core configuration register, for core_id 0x0000_1xxx"]
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#[inline(always)]
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pub const fn gccfg_v1(self) -> crate::common::Reg<GccfgV1, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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pub const fn gccfg_v1(self) -> common::Reg<GccfgV1, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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}
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#[doc = "General core configuration register, for core_id 0x0000_\\[23\\]xxx"]
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#[inline(always)]
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pub const fn gccfg_v2(self) -> crate::common::Reg<GccfgV2, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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pub const fn gccfg_v2(self) -> common::Reg<GccfgV2, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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}
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#[doc = "General core configuration register, for core_id 0x0000_5xxx"]
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#[inline(always)]
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pub const fn gccfg_v3(self) -> crate::common::Reg<GccfgV3, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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pub const fn gccfg_v3(self) -> common::Reg<GccfgV3, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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}
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#[doc = "Core ID register"]
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#[inline(always)]
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pub const fn cid(self) -> crate::common::Reg<Cid, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x3cusize) as _) }
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pub const fn cid(self) -> common::Reg<Cid, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x3cusize) as _) }
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}
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#[doc = "Synopsis ID Register"]
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#[inline(always)]
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pub const fn snpsid(self) -> crate::common::Reg<u32, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x40usize) as _) }
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pub const fn snpsid(self) -> common::Reg<u32, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x40usize) as _) }
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}
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#[doc = "User HW Config 1 Register"]
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#[inline(always)]
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pub const fn hwcfg1(self) -> crate::common::Reg<u32, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x44usize) as _) }
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pub const fn hwcfg1(self) -> common::Reg<u32, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x44usize) as _) }
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}
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#[doc = "User HW Config 2 Register"]
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#[inline(always)]
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pub const fn hwcfg2(self) -> crate::common::Reg<u32, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x48usize) as _) }
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pub const fn hwcfg2(self) -> common::Reg<u32, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x48usize) as _) }
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}
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#[doc = "User HW Config 3 Register"]
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#[inline(always)]
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pub const fn hwcfg3(self) -> crate::common::Reg<u32, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x4cusize) as _) }
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pub const fn hwcfg3(self) -> common::Reg<u32, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x4cusize) as _) }
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}
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#[doc = "User HW Config 4 Register"]
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#[inline(always)]
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pub const fn hwcfg4(self) -> crate::common::Reg<u32, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x50usize) as _) }
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pub const fn hwcfg4(self) -> common::Reg<u32, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x50usize) as _) }
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}
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#[doc = "OTG core LPM configuration register"]
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#[inline(always)]
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pub const fn glpmcfg(self) -> crate::common::Reg<Glpmcfg, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x54usize) as _) }
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pub const fn glpmcfg(self) -> common::Reg<Glpmcfg, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x54usize) as _) }
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}
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#[doc = "Global PowerDn Register"]
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#[inline(always)]
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pub const fn gpwrdn(self) -> crate::common::Reg<u32, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x58usize) as _) }
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pub const fn gpwrdn(self) -> common::Reg<u32, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x58usize) as _) }
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}
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#[doc = "Global DFIFO SW Config Register"]
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#[inline(always)]
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pub const fn gdfifocfg(self) -> crate::common::Reg<u32, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x5cusize) as _) }
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pub const fn gdfifocfg(self) -> common::Reg<u32, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x5cusize) as _) }
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}
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#[doc = "ADP (Attach Detection Protocol) Control Register"]
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#[inline(always)]
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pub const fn adpctl(self) -> crate::common::Reg<Adpctl, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x60usize) as _) }
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pub const fn adpctl(self) -> common::Reg<Adpctl, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x60usize) as _) }
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}
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#[doc = "Host periodic transmit FIFO size register"]
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#[inline(always)]
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pub const fn hptxfsiz(self) -> crate::common::Reg<Fsiz, crate::common::RW> {
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0100usize) as _) }
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pub const fn hptxfsiz(self) -> common::Reg<Fsiz, common::RW> {
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unsafe { common::Reg::from_ptr(self.ptr.add(0x0100usize) as _) }
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}
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#[doc = "Device IN endpoint transmit FIFO size register"]
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#[inline(always)]
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pub const fn dieptxf(self, n: usize) -> crate::common::Reg<Fsiz, crate::common::RW> {
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pub const fn dieptxf(self, n: usize) -> common::Reg<Fsiz, common::RW> {
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assert!(n < 7usize);
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unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0104usize + n * 4usize) as _) }
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unsafe { common::Reg::from_ptr(self.ptr.add(0x0104usize + n * 4usize) as _) }
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}
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#[doc = "Host configuration register"]
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#[inline(always)]
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pub const fn hcfg(self) -> crate::common::Reg<Hcfg, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0400usize) as _) }
|
||||
pub const fn hcfg(self) -> common::Reg<Hcfg, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0400usize) as _) }
|
||||
}
|
||||
#[doc = "Host frame interval register"]
|
||||
#[inline(always)]
|
||||
pub const fn hfir(self) -> crate::common::Reg<Hfir, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0404usize) as _) }
|
||||
pub const fn hfir(self) -> common::Reg<Hfir, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0404usize) as _) }
|
||||
}
|
||||
#[doc = "Host frame number/frame time remaining register"]
|
||||
#[inline(always)]
|
||||
pub const fn hfnum(self) -> crate::common::Reg<Hfnum, crate::common::R> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0408usize) as _) }
|
||||
pub const fn hfnum(self) -> common::Reg<Hfnum, common::R> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0408usize) as _) }
|
||||
}
|
||||
#[doc = "Periodic transmit FIFO/queue status register"]
|
||||
#[inline(always)]
|
||||
pub const fn hptxsts(self) -> crate::common::Reg<Hptxsts, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0410usize) as _) }
|
||||
pub const fn hptxsts(self) -> common::Reg<Hptxsts, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0410usize) as _) }
|
||||
}
|
||||
#[doc = "Host all channels interrupt register"]
|
||||
#[inline(always)]
|
||||
pub const fn haint(self) -> crate::common::Reg<Haint, crate::common::R> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0414usize) as _) }
|
||||
pub const fn haint(self) -> common::Reg<Haint, common::R> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0414usize) as _) }
|
||||
}
|
||||
#[doc = "Host all channels interrupt mask register"]
|
||||
#[inline(always)]
|
||||
pub const fn haintmsk(self) -> crate::common::Reg<Haintmsk, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0418usize) as _) }
|
||||
pub const fn haintmsk(self) -> common::Reg<Haintmsk, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0418usize) as _) }
|
||||
}
|
||||
#[doc = "Host Frame Scheduling List Register"]
|
||||
#[inline(always)]
|
||||
pub const fn hflbaddr(self) -> crate::common::Reg<u32, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x041cusize) as _) }
|
||||
pub const fn hflbaddr(self) -> common::Reg<u32, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x041cusize) as _) }
|
||||
}
|
||||
#[doc = "Host port control and status register"]
|
||||
#[inline(always)]
|
||||
pub const fn hprt(self) -> crate::common::Reg<Hprt, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0440usize) as _) }
|
||||
pub const fn hprt(self) -> common::Reg<Hprt, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0440usize) as _) }
|
||||
}
|
||||
#[doc = "Host channel characteristics register"]
|
||||
#[inline(always)]
|
||||
pub const fn hcchar(self, n: usize) -> crate::common::Reg<Hcchar, crate::common::RW> {
|
||||
pub const fn hcchar(self, n: usize) -> common::Reg<Hcchar, common::RW> {
|
||||
assert!(n < 12usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0500usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0500usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Host channel split control register"]
|
||||
#[inline(always)]
|
||||
pub const fn hcsplt(self, n: usize) -> crate::common::Reg<u32, crate::common::RW> {
|
||||
pub const fn hcsplt(self, n: usize) -> common::Reg<u32, common::RW> {
|
||||
assert!(n < 12usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0504usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0504usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Host channel interrupt register"]
|
||||
#[inline(always)]
|
||||
pub const fn hcint(self, n: usize) -> crate::common::Reg<Hcint, crate::common::RW> {
|
||||
pub const fn hcint(self, n: usize) -> common::Reg<Hcint, common::RW> {
|
||||
assert!(n < 12usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0508usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0508usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Host channel mask register"]
|
||||
#[inline(always)]
|
||||
pub const fn hcintmsk(self, n: usize) -> crate::common::Reg<Hcintmsk, crate::common::RW> {
|
||||
pub const fn hcintmsk(self, n: usize) -> common::Reg<Hcintmsk, common::RW> {
|
||||
assert!(n < 12usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x050cusize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x050cusize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Host channel transfer size register"]
|
||||
#[inline(always)]
|
||||
pub const fn hctsiz(self, n: usize) -> crate::common::Reg<Hctsiz, crate::common::RW> {
|
||||
pub const fn hctsiz(self, n: usize) -> common::Reg<Hctsiz, common::RW> {
|
||||
assert!(n < 12usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0510usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0510usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Host channel DMA address register (config for scatter/gather)"]
|
||||
#[inline(always)]
|
||||
pub const fn hcdma(self, n: usize) -> crate::common::Reg<Hcdma, crate::common::RW> {
|
||||
pub const fn hcdma(self, n: usize) -> common::Reg<Hcdma, common::RW> {
|
||||
assert!(n < 12usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0514usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0514usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Host channel DMA address register (address for current transfer; debug)"]
|
||||
#[inline(always)]
|
||||
pub const fn hcdmab(self, n: usize) -> crate::common::Reg<u32, crate::common::RW> {
|
||||
pub const fn hcdmab(self, n: usize) -> common::Reg<u32, common::RW> {
|
||||
assert!(n < 12usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x051cusize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x051cusize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device configuration register"]
|
||||
#[inline(always)]
|
||||
pub const fn dcfg(self) -> crate::common::Reg<Dcfg, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0800usize) as _) }
|
||||
pub const fn dcfg(self) -> common::Reg<Dcfg, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0800usize) as _) }
|
||||
}
|
||||
#[doc = "Device control register"]
|
||||
#[inline(always)]
|
||||
pub const fn dctl(self) -> crate::common::Reg<Dctl, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0804usize) as _) }
|
||||
pub const fn dctl(self) -> common::Reg<Dctl, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0804usize) as _) }
|
||||
}
|
||||
#[doc = "Device status register"]
|
||||
#[inline(always)]
|
||||
pub const fn dsts(self) -> crate::common::Reg<Dsts, crate::common::R> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0808usize) as _) }
|
||||
pub const fn dsts(self) -> common::Reg<Dsts, common::R> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0808usize) as _) }
|
||||
}
|
||||
#[doc = "Device IN endpoint common interrupt mask register"]
|
||||
#[inline(always)]
|
||||
pub const fn diepmsk(self) -> crate::common::Reg<Diepmsk, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0810usize) as _) }
|
||||
pub const fn diepmsk(self) -> common::Reg<Diepmsk, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0810usize) as _) }
|
||||
}
|
||||
#[doc = "Device OUT endpoint common interrupt mask register"]
|
||||
#[inline(always)]
|
||||
pub const fn doepmsk(self) -> crate::common::Reg<Doepmsk, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0814usize) as _) }
|
||||
pub const fn doepmsk(self) -> common::Reg<Doepmsk, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0814usize) as _) }
|
||||
}
|
||||
#[doc = "Device all endpoints interrupt register"]
|
||||
#[inline(always)]
|
||||
pub const fn daint(self) -> crate::common::Reg<Daint, crate::common::R> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0818usize) as _) }
|
||||
pub const fn daint(self) -> common::Reg<Daint, common::R> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0818usize) as _) }
|
||||
}
|
||||
#[doc = "All endpoints interrupt mask register"]
|
||||
#[inline(always)]
|
||||
pub const fn daintmsk(self) -> crate::common::Reg<Daintmsk, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x081cusize) as _) }
|
||||
pub const fn daintmsk(self) -> common::Reg<Daintmsk, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x081cusize) as _) }
|
||||
}
|
||||
#[doc = "Device VBUS discharge time register"]
|
||||
#[inline(always)]
|
||||
pub const fn dvbusdis(self) -> crate::common::Reg<Dvbusdis, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0828usize) as _) }
|
||||
pub const fn dvbusdis(self) -> common::Reg<Dvbusdis, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0828usize) as _) }
|
||||
}
|
||||
#[doc = "Device VBUS pulsing time register"]
|
||||
#[inline(always)]
|
||||
pub const fn dvbuspulse(self) -> crate::common::Reg<Dvbuspulse, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x082cusize) as _) }
|
||||
pub const fn dvbuspulse(self) -> common::Reg<Dvbuspulse, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x082cusize) as _) }
|
||||
}
|
||||
#[doc = "Device IN endpoint FIFO empty interrupt mask register"]
|
||||
#[inline(always)]
|
||||
pub const fn diepempmsk(self) -> crate::common::Reg<Diepempmsk, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0834usize) as _) }
|
||||
pub const fn diepempmsk(self) -> common::Reg<Diepempmsk, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0834usize) as _) }
|
||||
}
|
||||
#[doc = "Device IN endpoint control register"]
|
||||
#[inline(always)]
|
||||
pub const fn diepctl(self, n: usize) -> crate::common::Reg<Diepctl, crate::common::RW> {
|
||||
pub const fn diepctl(self, n: usize) -> common::Reg<Diepctl, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0900usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0900usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device IN endpoint interrupt register"]
|
||||
#[inline(always)]
|
||||
pub const fn diepint(self, n: usize) -> crate::common::Reg<Diepint, crate::common::RW> {
|
||||
pub const fn diepint(self, n: usize) -> common::Reg<Diepint, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0908usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0908usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device IN endpoint transfer size register"]
|
||||
#[inline(always)]
|
||||
pub const fn dieptsiz(self, n: usize) -> crate::common::Reg<Dieptsiz, crate::common::RW> {
|
||||
pub const fn dieptsiz(self, n: usize) -> common::Reg<Dieptsiz, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0910usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0910usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device IN endpoint transmit FIFO status register"]
|
||||
#[inline(always)]
|
||||
pub const fn dtxfsts(self, n: usize) -> crate::common::Reg<Dtxfsts, crate::common::R> {
|
||||
pub const fn dtxfsts(self, n: usize) -> common::Reg<Dtxfsts, common::R> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0918usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0918usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device OUT endpoint control register"]
|
||||
#[inline(always)]
|
||||
pub const fn doepctl(self, n: usize) -> crate::common::Reg<Doepctl, crate::common::RW> {
|
||||
pub const fn doepctl(self, n: usize) -> common::Reg<Doepctl, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0b00usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0b00usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device OUT endpoint interrupt register"]
|
||||
#[inline(always)]
|
||||
pub const fn doepint(self, n: usize) -> crate::common::Reg<Doepint, crate::common::RW> {
|
||||
pub const fn doepint(self, n: usize) -> common::Reg<Doepint, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0b08usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0b08usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device OUT endpoint transfer size register"]
|
||||
#[inline(always)]
|
||||
pub const fn doeptsiz(self, n: usize) -> crate::common::Reg<Doeptsiz, crate::common::RW> {
|
||||
pub const fn doeptsiz(self, n: usize) -> common::Reg<Doeptsiz, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0b10usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0b10usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device OUT/IN endpoint DMA address register"]
|
||||
#[inline(always)]
|
||||
pub const fn doepdma(self, n: usize) -> crate::common::Reg<u32, crate::common::RW> {
|
||||
pub const fn doepdma(self, n: usize) -> common::Reg<u32, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0b14usize + n * 32usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0b14usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Power and clock gating control register"]
|
||||
#[inline(always)]
|
||||
pub const fn pcgcctl(self) -> crate::common::Reg<Pcgcctl, crate::common::RW> {
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0e00usize) as _) }
|
||||
pub const fn pcgcctl(self) -> common::Reg<Pcgcctl, common::RW> {
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x0e00usize) as _) }
|
||||
}
|
||||
#[doc = "Device endpoint / host channel FIFO register"]
|
||||
#[inline(always)]
|
||||
pub const fn fifo(self, n: usize) -> crate::common::Reg<Fifo, crate::common::RW> {
|
||||
pub const fn fifo(self, n: usize) -> common::Reg<Fifo, common::RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1000usize + n * 4096usize) as _) }
|
||||
unsafe { common::Reg::from_ptr(self.ptr.add(0x1000usize + n * 4096usize) as _) }
|
||||
}
|
||||
}
|
||||
#[doc = "ADP (Attach Detection Protocol) Control Register"]
|
||||
|
||||
Loading…
Reference in New Issue
Block a user