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abi
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rename BackendRepr::Vector → SimdVector
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2025-02-28 17:17:45 +01:00 |
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debuginfo
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Merge commit '557ed8ebb7e981817d03c87352892c394183dd70' into sync_cg_clif-2025-02-15
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2025-02-15 14:13:01 +00:00 |
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driver
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Move some Map methods onto TyCtxt.
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2025-02-17 13:21:02 +11:00 |
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intrinsics
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rename BackendRepr::Vector → SimdVector
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2025-02-28 17:17:45 +01:00 |
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optimize
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Reformat use declarations.
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2024-07-29 08:26:52 +10:00 |
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allocator.rs
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Reformat using the new identifier sorting from rustfmt
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2024-09-22 19:11:29 -04:00 |
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analyze.rs
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rename AddressOf -> RawBorrow inside the compiler
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2024-08-18 19:46:53 +02:00 |
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base.rs
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Extend the renaming to coerce_unsafe_ptr
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2025-02-10 13:01:55 +00:00 |
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cast.rs
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Rustfmt
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2025-02-08 22:12:13 +00:00 |
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codegen_i128.rs
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Windows x86: Change i128 to return via the vector ABI
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2025-01-27 12:12:59 +00:00 |
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common.rs
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Merge commit '557ed8ebb7e981817d03c87352892c394183dd70' into sync_cg_clif-2025-02-15
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2025-02-15 14:13:01 +00:00 |
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compiler_builtins.rs
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Merge commit '8332329f83d4ef34479fec67cc21b21246dca6b5' into sync_cg_clif-2025-02-07
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2025-02-07 20:58:27 +00:00 |
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concurrency_limiter.rs
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Remove jobserver from Session
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2024-12-13 10:21:22 +00:00 |
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config.rs
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Merge commit '57845a397ec15e4e6a561ed2c4bfa3dcf49144fb' into sync_cg_clif-2024-12-06
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2024-12-06 12:10:30 +00:00 |
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constant.rs
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cg_clif: use exclusively ABI alignment
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2025-02-17 15:10:51 -08:00 |
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discriminant.rs
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make no-variant types a dedicated Variants variant
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2024-12-18 11:01:54 +01:00 |
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global_asm.rs
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Make a fake body to store typeck results for global_asm
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2025-02-22 00:12:07 +00:00 |
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inline_asm.rs
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Merge commit '557ed8ebb7e981817d03c87352892c394183dd70' into sync_cg_clif-2025-02-15
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2025-02-15 14:13:01 +00:00 |
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lib.rs
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Make -O mean -C opt-level=3
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2025-02-13 19:47:55 +00:00 |
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linkage.rs
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main_shim.rs
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Rustfmt
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2025-02-08 22:12:13 +00:00 |
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num.rs
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Merge commit 'e39eacd2d415803ef82de3b6a314e4f2d0fbc4dc' into sync_cg_clif-2025-01-10
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2025-01-10 09:02:07 +00:00 |
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pointer.rs
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Merge commit '1fa693ca4462fc1f790693464cf765ad693616af' into sync_cg_clif-2024-11-09
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2024-11-09 13:48:06 +00:00 |
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pretty_clif.rs
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Merge commit '1fa693ca4462fc1f790693464cf765ad693616af' into sync_cg_clif-2024-11-09
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2024-11-09 13:48:06 +00:00 |
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toolchain.rs
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trap.rs
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Rustfmt
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2025-02-08 22:12:13 +00:00 |
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unsize.rs
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Use ExistentialTraitRef throughout codegen
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2025-01-30 15:34:00 +00:00 |
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unwind_module.rs
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Merge commit '49cd5dd454d0115cfbe9e39102a8b3ba4616aa40' into sync_cg_clif-2024-06-30
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2024-06-30 11:28:14 +00:00 |
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value_and_place.rs
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rename BackendRepr::Vector → SimdVector
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2025-02-28 17:17:45 +01:00 |
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vtable.rs
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Extend the renaming to coerce_unsafe_ptr
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2025-02-10 13:01:55 +00:00 |
