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c570fcb0c4
Add RISC-V detection macro and more architecture instructions This pull request includes: - Update `stdarch` dependency to include ratified RISC-V supervisor and hypervisor instruction intrinsics which is useful in Rust kernel development - Add macro `is_riscv_feature_detected!` - Modify impl of `core::hint::spin_loop` to comply with latest version of `core::arch` After this update, users may now develop RISC-V kernels and user applications more freely. r? `@Amanieu` |
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alloc | ||
backtrace@b02ed04a7e | ||
core | ||
panic_abort | ||
panic_unwind | ||
portable-simd | ||
proc_macro | ||
profiler_builtins | ||
rtstartup | ||
rustc-std-workspace-alloc | ||
rustc-std-workspace-core | ||
rustc-std-workspace-std | ||
std | ||
stdarch@2adc17a544 | ||
test | ||
unwind |