Commit Graph

74 Commits

Author SHA1 Message Date
Dirreke
184a9afffb add details for csky-unknown-linux-gnuabiv2 and add docs 2023-08-14 23:02:37 +08:00
Dirreke
d16409fe22 add a csky-unknown-linux-gnuabiv2 target 2023-08-14 23:02:36 +08:00
chenx97
d3727148a0 support for mips32r6 as a target_arch value 2023-07-18 18:58:18 +08:00
chenx97
a132b3ec03 merge patterns 2023-07-18 18:58:18 +08:00
chenx97
c6e03cd951 support for mips64r6 as a target_arch value 2023-07-18 18:58:18 +08:00
WANG Rui
d58863fe43 asm: loongarch64: Drop efiapi 2023-05-12 17:22:47 +08:00
WANG Rui
c5382adc65 Simplify match statement since variable arch that is predictable 2023-05-08 11:08:09 +08:00
WANG Rui
08fc451771 asm: loongarch64: Implementation of clobber_abi 2023-05-05 14:21:13 +08:00
zhaixiaojuan
5f2fa4c11d Add loongarch64 asm! support 2023-04-25 14:15:31 +08:00
Ian Douglas Scott
2ac8dee44f Add inline assembly support for m68k 2023-04-12 17:58:15 -07:00
Michael Woerister
ee8bc5b0b2 Use FxIndexSet instead of FxHashSet for asm_target_features query. 2023-03-01 10:19:26 +01:00
André Vennberg
0e65003c9e Fix some missed double spaces. 2023-01-14 18:23:40 +01:00
nils
fd7a159710 Fix uninlined_format_args for some compiler crates
Convert all the crates that have had their diagnostic migration
completed (except save_analysis because that will be deleted soon and
apfloat because of the licensing problem).
2023-01-05 19:01:12 +01:00
Michael Woerister
88f6c6d8a0 Remove unused StableMap and StableSet types from rustc_data_structures 2022-07-20 13:11:39 +02:00
Michael Goulet
69ac8a68af Collapse some weirdly-wrapping derives 2022-07-08 04:36:30 +00:00
Vadim Petrochenkov
37fd2941a1 rustc_target: Remove some redundant target properties 2022-06-18 01:09:20 +03:00
Connor Horman
6354bfc152 Add ABI clobbers 2022-05-17 06:48:03 -04:00
Connor Horman
658be0d1cf Add tmm_reg clobbers 2022-05-16 20:15:06 -04:00
Eric Huss
159b95d5bb Remove references to git.io 2022-04-25 17:05:58 -07:00
Amanieu d'Antras
b2bc46938c asm: Add a kreg0 register class on x86 which includes k0
Previously we only exposed a kreg register class which excludes the k0
register since it can't be used in many instructions. However k0 is a
valid register and we need to have a way of marking it as clobbered for
clobber_abi.

Fixes #94977
2022-04-19 17:14:23 +02:00
Jubilee Young
b807d5970b Fold aarch64 feature +fp into +neon
Arm's FEAT_FP and Feat_AdvSIMD describe the same thing on AArch64:
The Neon unit, which handles both floating point and SIMD instructions.
Moreover, a configuration for AArch64 must include both or neither.
Arm says "entirely proprietary" toolchains may omit floating point:
https://developer.arm.com/documentation/102374/0101/Data-processing---floating-point
In the Programmer's Guide for Armv8-A, Arm says AArch64 can have
both FP and Neon or neither in custom implementations:
https://developer.arm.com/documentation/den0024/a/AArch64-Floating-point-and-NEON

In "Bare metal boot code for Armv8-A", enabling Neon and FP
is just disabling the same trap flag:
https://developer.arm.com/documentation/dai0527/a

In an unlikely future where "Neon and FP" become unrelated,
we can add "[+-]fp" as its own feature flag.
Until then, we can simplify programming with Rust on AArch64 by
folding both into "[+-]neon", which is valid as it supersets both.

"[+-]neon" is retained for niche uses such as firmware, kernels,
"I just hate floats", and so on.
2022-03-22 15:14:33 -07:00
Amanieu d'Antras
7cee1b4aeb ARM: Only allow using d16-d31 with asm! when supported by the target
Support can be determined by checking for the "d32" LLVM feature.
2022-02-24 22:37:53 +00:00
Amanieu d'Antras
fb5539b475 Add tests 2022-02-21 18:28:22 +00:00
Amanieu d'Antras
fc41d4bf35 Take CodegenFnAttrs into account when validating asm! register operands
Checking of asm! register operands now properly takes function
attributes such as #[target_feature] and #[instruction_set] into
account.
2022-02-21 18:28:22 +00:00
Amanieu d'Antras
1ceb104851 On ARM, use relocation_model to detect whether r9 should be reserved
The previous approach of checking for the reserve-r9 target feature
didn't actually work because LLVM only sets this feature very late when
initializing the per-function subtarget.
2022-02-21 18:28:22 +00:00
Amanieu d'Antras
2e8a7663b4 Simplify gating of BPF w registers behind the alu32 target feature
This is already handled by supported_types().
2022-02-21 18:28:22 +00:00
Amanieu d'Antras
11250b8661 asm: Allow the use of r8-r14 as clobbers on Thumb1
Previously these were entirely disallowed, except for r11 which was
allowed by accident.
2022-02-18 20:26:40 +00:00
Matthias Krüger
6749f32c33
Rollup merge of #90277 - pierwill:fix-70258-inference-terms, r=jackh726
Improve terminology around "after typeck"

Closes #70258.
2022-01-31 06:58:26 +01:00
William D. Jones
19809ed76d Add preliminary support for inline assembly for msp430. 2022-01-22 23:42:46 -05:00
bjorn3
042aa379a5 Pass target_features set instead of has_feature closure
This avoids unnecessary monomorphizations in codegen backends
2022-01-17 18:06:30 +01:00
bjorn3
991cbd1503 Use Symbol for target features in asm handling
This saves a couple of Symbol::intern calls
2022-01-17 18:06:27 +01:00
Nicholas Nethercote
056d48a2c9 Remove unnecessary sigils around Symbol::as_str() calls. 2021-12-15 17:32:14 +11:00
Amanieu d'Antras
8716f2780e asm: Allow using r9 (ARM) and x18 (AArch64) if they are not reserved by
the current target.
2021-12-10 00:51:39 +00:00
Amanieu d'Antras
908f300dd7 Remove the reg_thumb register class for asm! on ARM
Also restricts r8-r14 from being used on Thumb1 targets as per #90736.
2021-12-07 23:54:09 +00:00
Andrew Dona-Couch
c6e8ae1a6c Implement inline asm! for AVR platform 2021-12-06 01:02:49 -05:00
Alex Crichton
d2a3c24a95 Update more rustc/libtest things for wasm64
* Add wasm64 variants for inline assembly along the same lines as wasm32
* Update a few directives in libtest to check for `target_family`
  instead of `target_arch`
* Update some rustc codegen and typechecks specialized for wasm32 to
  also work for wasm64.
2021-11-10 08:35:42 -08:00
pierwill
521b1ee974 Improve terminology around "after typeck" 2021-11-06 20:59:38 -05:00
Mara Bos
494c563f3b
Rollup merge of #88350 - programmerjake:add-ppc-cr-xer-clobbers, r=Amanieu
add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC

Fixes #88315
2021-09-01 09:23:26 +02:00
bors
2031fd6e46 Auto merge of #88245 - Sl1mb0:s390-asm, r=Amanieu
S390x inline asm

This adds register definitions and constraint codes for the s390x general and floating point registers necessary for fixing #85931; as well as a few tests.

Further testing is needed, but I am a little unsure of what specific tests should be added to `src/test/assembly/asm/s390x.rs` to address this.
2021-08-28 08:04:41 +00:00
Jacob Lifshay
5802f60355 add support for clobbering xer, cr, and cr[0-7] for asm! on OpenPower/PowerPC
Fixes #88315
2021-08-25 22:08:27 -07:00
linux1
a9f623707b Fix: made suggested change 2021-08-23 17:56:04 -04:00
linux1
05cd587726 Refactor: disabled frame pointer; consolidated unsupported register errors; added register prefix 2021-08-23 17:32:27 -04:00
linux1
0c9e23c7ce Fix: appeased x.py test tidy --bless 2021-08-22 17:55:03 -04:00
linux1
eeb0b52bf8 Feat: further testing & support for i64 general register use 2021-08-22 17:55:03 -04:00
linux1
5f5afba5fb Feat: added s390x reg-definitions, constraint codes, and tests 2021-08-22 17:55:03 -04:00
linux1
f28793dd13 Feat: added inline asm support for s390x 2021-08-22 17:55:03 -04:00
Frank Steffahn
bf88b113ea Fix typos “a”→“an” 2021-08-22 15:35:11 +02:00
Amanieu d'Antras
3fd463a5ca Add support for clobber_abi to asm! 2021-08-12 12:43:11 +01:00
bors
99f8efec46 Auto merge of #86416 - Amanieu:asm_clobber_only, r=nagisa
Add clobber-only register classes for asm!

These are needed to properly express a function call ABI using a clobber
list, even though we don't support passing actual values into/out of
these registers.
2021-07-11 01:06:58 +00:00
Amanieu d'Antras
d2a1d048d9 Add AArch64 z* registers as aliases for v* registers 2021-07-10 17:29:07 +02:00