Commit Graph

2219 Commits

Author SHA1 Message Date
Zalathar
3310419d35 Make llvm::set_section take a &CStr 2024-10-20 17:08:05 +11:00
Zalathar
d1bf77eb34 Pass coverage mappings to LLVM as separate structs 2024-10-20 13:29:34 +11:00
Zalathar
98c4d96957 Reduce visibility of coverage FFI functions/types 2024-10-20 10:55:47 +11:00
Michael Goulet
e83e4e8112 Get rid of const eval_* and try_eval_* helpers 2024-10-19 18:07:35 +00:00
Jubilee Young
45d61b0d26 cg_llvm: Reuse LLVM-C Comdat support
Migrate `llvm::set_comdat` and `llvm::SetUniqueComdat` to LLVM-C FFI.

Note, now we can call `llvm::set_comdat` only when the target actually
supports adding comdat. As this has no convenient LLVM-C API, we
implement this as `TargetOptions::supports_comdat`.

Co-authored-by: Stuart Cook <Zalathar@users.noreply.github.com>
2024-10-19 10:46:10 -07:00
Jubilee Young
888efe74a3 cg_llvm: Switch llvm::add_global to &CStr 2024-10-18 17:46:33 -07:00
Kajetan Puchalski
f641c32aad rustc_target: Add pauth-lr aarch64 target feature
Add the pauth-lr target feature, corresponding to aarch64 FEAT_PAuth_LR.
This feature has been added in LLVM 19.
It is currently not supported by the Linux hwcap and so we cannot add
runtime feature detection for it at this time.
2024-10-16 18:00:51 +01:00
Matthew Maurer
e985396145 llvm: Match aarch64 data layout to new LLVM layout
LLVM has added 3 new address spaces to support special Windows use
cases. These shouldn't trouble us for now, but LLVM requires matching
data layouts.

See llvm/llvm-project#111879 for details
2024-10-16 01:16:44 +00:00
Taiki Endo
67ebb6c20b Fix AArch64InlineAsmReg::emit 2024-10-14 06:04:07 +09:00
Trevor Gross
39071fdc58
Rollup merge of #131626 - matthiaskrgr:dont_string, r=lqd
remove a couple of redundant String to String conversion
2024-10-12 21:38:38 -05:00
Matthias Krüger
4bc21e318c remove a couple of redundant String to String conversion 2024-10-12 22:07:46 +02:00
DianQK
1efffe720d
LLVMConstInt only allows integer types 2024-10-12 23:02:15 +08:00
Trevor Gross
3f9aa50b70
Rollup merge of #124874 - jedbrown:float-mul-add-fast, r=saethlin
intrinsics fmuladdf{32,64}: expose llvm.fmuladd.* semantics

Add intrinsics `fmuladd{f32,f64}`. This computes `(a * b) + c`, to be fused if the code generator determines that (i) the target instruction set has support for a fused operation, and (ii) that the fused operation is more efficient than the equivalent, separate pair of `mul` and `add` instructions.

https://llvm.org/docs/LangRef.html#llvm-fmuladd-intrinsic

The codegen_cranelift uses the `fma` function from libc, which is a correct implementation, but without the desired performance semantic. I think this requires an update to cranelift to expose a suitable instruction in its IR.

I have not tested with codegen_gcc, but it should behave the same way (using `fma` from libc).

---
This topic has been discussed a few times on Zulip and was suggested, for example, by `@workingjubilee` in [Effect of fma disabled](https://rust-lang.zulipchat.com/#narrow/stream/122651-general/topic/Effect.20of.20fma.20disabled/near/274179331).
2024-10-11 23:57:44 -04:00
Trevor Gross
2c385ba329
Rollup merge of #131543 - Zalathar:goodbye-llvm-17, r=petrochenkov
coverage: Remove code related to LLVM 17

In-tree LLVM is 19, and the minimum external LLVM was increased to 18 in #130487.
2024-10-11 16:53:49 -05:00
Jed Brown
0d8a978e8a intrinsics.fmuladdf{16,32,64,128}: expose llvm.fmuladd.* semantics
Add intrinsics `fmuladd{f16,f32,f64,f128}`. This computes `(a * b) +
c`, to be fused if the code generator determines that (i) the target
instruction set has support for a fused operation, and (ii) that the
fused operation is more efficient than the equivalent, separate pair
of `mul` and `add` instructions.

https://llvm.org/docs/LangRef.html#llvm-fmuladd-intrinsic

MIRI support is included for f32 and f64.

The codegen_cranelift uses the `fma` function from libc, which is a
correct implementation, but without the desired performance semantic. I
think this requires an update to cranelift to expose a suitable
instruction in its IR.

I have not tested with codegen_gcc, but it should behave the same
way (using `fma` from libc).
2024-10-11 15:32:56 -06:00
Matthias Krüger
33b1264540
Rollup merge of #131519 - davidlattimore:intrinsics-default-vis, r=Urgau
Use Default visibility for rustc-generated C symbol declarations

Non-default visibilities should only be used for definitions, not declarations, otherwise linking can fail.

This is based on https://github.com/rust-lang/rust/pull/123994.

Issue https://github.com/rust-lang/rust/issues/123427

When I changed `default-hidden-visibility` to `default-visibility` in https://github.com/rust-lang/rust/pull/130005, I updated all places in the code that used `default-hidden-visibility`, replicating the hidden-visibility bug to also happen for protected visibility.

Without this change, trying to build rustc with `-Z default-visibility=protected` fails with a link error.
2024-10-11 15:36:52 +02:00
Zalathar
9357277de7 coverage: Remove code related to LLVM 17 2024-10-11 21:44:36 +11:00
David Lattimore
42c0494499 Use Default visibility for rustc-generated C symbol declarations
Non-default visibilities should only be used for definitions, not
declarations, otherwise linking can fail.

Co-authored-by: Collin Baker <collinbaker@chromium.org>
2024-10-11 08:43:27 +11:00
Matthias Krüger
edb669350a
Rollup merge of #130741 - mrkajetanp:detect-b16b16, r=Amanieu
rustc_target: Add sme-b16b16 as an explicit aarch64 target feature

LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.

Resolves https://github.com/rust-lang/rust/pull/129894.
2024-10-10 22:00:48 +02:00
Matthias Krüger
13976f1f25
Rollup merge of #130308 - davidtwco:tied-target-consolidation, r=wesleywiser
codegen_ssa: consolidate tied target checks

Fixes #105110.
Fixes #105111.

`rustc_codegen_llvm` and `rustc_codegen_gcc` duplicated logic for checking if tied target features were partially enabled. This PR consolidates these checks into `rustc_codegen_ssa` in the `codegen_fn_attrs` query, which also is run pre-monomorphisation for each function, which ensures that this check is run for unused functions, as would be expected.

Also adds a test confirming that enabling one tied feature doesn't imply another - the appropriate error for this was already being emitted. I did a bisect and narrowed it down to two patches it was likely to be - something in #128796, probably #128221 or #128679.
2024-10-10 22:00:45 +02:00
Kajetan Puchalski
335f67b652 rustc_target: Add sme-b16b16 as an explicit aarch64 target feature
LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.
2024-10-10 10:24:57 +00:00
Matthias Krüger
e642442f12
Rollup merge of #131424 - workingjubilee:stem-the-tyde-of-glob-imports, r=jieyouxu
compiler: Stop reexporting enum-globs from `rustc_target::abi`

Three enums had **all** their variants glob-exported into a distressingly large amount of the tree. Cease to do that, and also cease to glob import the contents of the module that contained them. Redirect relevant imports to their actual source, the `rustc_abi` crate.

No functional changes.
2024-10-09 20:27:24 +02:00
Jubilee Young
1379ef592a compiler: Factor rustc_target::abi out of cg_llvm 2024-10-08 18:24:56 -07:00
Michael Goulet
17eca60c24 Dont ICE when encountering post-mono layout cycle error 2024-10-08 16:46:16 -04:00
bors
cf24c73141 Auto merge of #126733 - ZhuUx:llvm-19-adapt, r=Zalathar
[Coverage][MCDC] Adapt mcdc to llvm 19

Related issue: #126672

Also finish task 4 at #124144

[llvm #82448](https://github.com/llvm/llvm-project/pull/82448) has introduced some break changes into mcdc, causing incompatibility between llvm 18 and 19. This draft adapts to that change and gives up supporting for llvm-18.
2024-10-08 07:08:41 +00:00
zhuyunxing
6e3e19f714 coverage. Adapt to mcdc mapping formats introduced by llvm 19 2024-10-08 11:15:24 +08:00
zhuyunxing
99bd601df5 coverage. MCDC ConditionId start from 0 to keep with llvm 19 2024-10-08 10:50:18 +08:00
zhuyunxing
911ac56e95 coverage. Disable supporting mcdc on llvm-18 2024-10-08 10:50:18 +08:00
Stuart Cook
4d63896018
Rollup merge of #130824 - Darksonn:fix-function-return, r=wesleywiser
Add missing module flags for `-Zfunction-return=thunk-extern`

This fixes a bug in the `-Zfunction-return=thunk-extern` flag. The flag needs to be passed onto LLVM to ensure that functions such as `asan.module_ctor` and `asan.module_dtor` that are created internally in LLVM have the mitigation applied to them.

This was originally discovered [in the Linux kernel](https://lore.kernel.org/all/CANiq72myZL4_poCMuNFevtpYYc0V0embjSuKb7y=C+m3vVA_8g@mail.gmail.com/).

Original flag PR: #116892
PR for similar issue: #129373
Tracking issue: #116853

cc ``@ojeda``
r? ``@wesleywiser``
2024-10-08 13:19:43 +11:00
Urgau
018ba0528f Use wide pointers consistenly across the compiler 2024-10-04 14:06:48 +02:00
Jacob Kiesel
bb5a8276be add unstable support for outputting file checksums for use in cargo 2024-10-01 21:23:20 -06:00
bors
06bb8364aa Auto merge of #131111 - matthiaskrgr:rollup-n6do187, r=matthiaskrgr
Rollup of 4 pull requests

Successful merges:

 - #130005 (Replace -Z default-hidden-visibility with -Z default-visibility)
 - #130229 (ptr::add/sub: do not claim equivalence with `offset(c as isize)`)
 - #130773 (Update Unicode escapes in `/library/core/src/char/methods.rs`)
 - #130933 (rustdoc: lists items that contain multiple paragraphs are more clear)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-10-01 19:29:26 +00:00
Matthias Krüger
389a399a50
Rollup merge of #130005 - davidlattimore:protected-vis-flag, r=Urgau
Replace -Z default-hidden-visibility with -Z default-visibility

Issue #105518
2024-10-01 21:09:18 +02:00
Guillaume Gomez
344b6a1668
Rollup merge of #130630 - taiki-e:s390x-clobber-abi, r=Amanieu
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly

This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335.

This also supports vector registers (as `vreg`) and access registers (as `areg`) as clobber-only, which need to support clobbering of them to implement clobber_abi.

Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
  - Vector registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L249
  - Access registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L332

I have three questions:
- ~~ELF Application Binary Interface s390x Supplement says that `cc` (condition code, bits 18-19 of PSW) is "Volatile".
  However, we do not have a register class for `cc` and instead mark `cc` as clobbered unless `preserves_flags` is specified (https://github.com/rust-lang/rust/pull/111331).
  Therefore, in the current implementation, if both `preserves_flags` and `clobber_abi` are specified, `cc` is not marked as clobbered. Is this okay? Or even if `preserves_flags` is used, should `cc` be marked as clobbered if `clobber_abi` is used?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- ~~ELF Application Binary Interface s390x Supplement says that `pm` (program mask, bits 20-23 of PSW) is "Cleared".
  There does not appear to be any registers associated with this in either [LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td) or [GCC](33ccc1314d/gcc/config/s390/s390.h (L407-L431)), so at this point I don't see any way other than to just ignore it. Is this okay as-is?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and `reg_addr`, which uses the “a” constraint (https://github.com/rust-lang/rust/pull/119431)...

Note:

- GCC seems to [recognize only `a0` and `a1`](33ccc1314d/gcc/config/s390/s390.h (L428-L429)), and using `a[2-15]` [causes errors](https://godbolt.org/z/a46vx8jjn).
  Given that cg_gcc has a similar problem with other architecture (https://github.com/rust-lang/rustc_codegen_gcc/issues/485), I don't feel this is a blocker for this PR, but it is worth mentioning here.
- `vreg` should be able to accept `#[repr(simd)]` types as input if the `vector` target feature added in https://github.com/rust-lang/rust/pull/127506 is enabled, but core_arch has no s390x vector type and both `#[repr(simd)]` and `core::simd` are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... https://github.com/rust-lang/rust/pull/88245#issuecomment-905559591

cc `@uweigand`

r? `@Amanieu`

`@rustbot` label +O-SystemZ
2024-10-01 17:32:07 +02:00
David Lattimore
f48194ea55 Replace -Z default-hidden-visibility with -Z default-visibility
MCP: https://github.com/rust-lang/compiler-team/issues/782

Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
2024-10-01 22:32:13 +10:00
Trevor Gross
acaa6cee07
Rollup merge of #130877 - taiki-e:riscv-atomic, r=Amanieu
rustc_target: Add RISC-V atomic-related features

This adds the following three target features to unstable riscv_target_feature.

- `zaamo` (Zaamo Extension 1.0.0): Atomic Memory Operations (`amo*.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L229-L231), [available since LLVM 19](8be079cddd))
- `zabha` (Zabha Extension 1.0.0): Byte and Halfword Atomic Memory Operations (`amo*.{b,h}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L238-L240), [available since LLVM 19](6b7444964a))
- `zalrsc` (Zalrsc Extension 1.0.0): Load-Reserved/Store-Conditional Instructions (`lr.{w,d}{,.aq,.rl,.aqrl}` and `sc.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L261-L263), [available since LLVM 19](8be079cddd))

(Zacas Extension is not included here because it is still marked as experimental in LLVM 19 70e7d26e56 and will become non-experimental in LLVM 20 614aeda93b)

`a` implies `zaamo` and `zalrsc`, and `zabha` implies `zaamo`:

- After Zaamo and Zalrsc Extensions are frozen, riscv-isa-manual says "The A extension comprises instructions provided by the Zaamo and Zalrsc extensions" (e87412e621), and [`a` implies `zaamo` and `zalrsc` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L44)). However, in LLVM, [`a` does not define them as implying `zaamo` and `zalrsc`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L206).
- Zabha and Zaamo are in a similar situation, [riscv-isa-manual](https://github.com/riscv/riscv-isa-manual/blob/main/src/zabha.adoc) says "The Zabha extension depends upon the Zaamo standard extension", and [`zabha` implies `zaamo` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L45-L46)), but [does not in LLVM (but enabling `zabha` without `zaamo` or `a` is not allowed)](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/TargetParser/RISCVISAInfo.cpp#L776-L778).

r? `@Amanieu`

`@rustbot` label +O-riscv +A-target-feature
2024-09-30 19:18:49 -04:00
Ralf Jung
a78fd694d4 extend comment in global_llvm_features regarding target-cpu=native handling 2024-09-29 12:16:35 +02:00
Taiki Endo
62612af372 rustc_target: Add RISC-V atomic-related features 2024-09-28 11:26:09 +09:00
Josh Stone
4160a54dc5 Use &raw in the compiler
Like #130865 did for the standard library, we can use `&raw` in the
compiler now that stage0 supports it. Also like the other issue, I did
not make any doc or test changes at this time.
2024-09-26 20:33:26 -07:00
Alice Ryhl
540e41f8b3 Add missing module flags for function-return=thunk-extern 2024-09-25 15:53:53 +02:00
Josh Stone
0999b019f8 Dogfood feature(file_buffered) 2024-09-24 14:25:16 -07:00
David Wood
207bc77e15
codegen_ssa: consolidate tied feature checking
`rustc_codegen_llvm` and `rustc_codegen_gcc` duplicated logic for
checking if tied target features were partially enabled. This commit
consolidates these checks into `rustc_codegen_ssa` in the
`codegen_fn_attrs` query, which also is run pre-monomorphisation for
each function, which ensures that this check is run for unused functions,
as would be expected.
2024-09-24 15:48:49 +01:00
bors
4cbfcf1b7f Auto merge of #130389 - Luv-Ray:LLVMMDNodeInContext2, r=nikic
llvm: replace some deprecated functions

`LLVMMDStringInContext` and `LLVMMDNodeInContext` are deprecated, replace them with `LLVMMDStringInContext2` and `LLVMMDNodeInContext2`.
Also replace `Value` with `Metadata` in some function signatures for better consistency.
2024-09-24 12:07:48 +00:00
Michael Goulet
702a644b74 Check vtable projections for validity in miri 2024-09-23 19:38:26 -04:00
Luv-Ray
d7ebf9e541 format 2024-09-23 23:45:13 +08:00
bors
66b0b29e65 Auto merge of #130724 - compiler-errors:bump, r=Mark-Simulacrum
Bump stage0 to beta-2024-09-22 and rustfmt to nightly-2024-09-22

I'm doing this to apply the changes to version sorting (https://github.com/rust-lang/rustfmt/pull/6284) that have occurred since rustfmt last upgraded (and a few other miscellaneous changes, like changes to expression overflowing: https://github.com/rust-lang/rustfmt/pull/6260). Eagerly updating rustfmt and formatting-the-world will ideally move some of the pressure off of the beta bump which will happen at the beginning of the next release cycle.

You can verify this is correct by checking out the changes, reverting the last commit, reapplying them, and diffing the changes:

```
git fetch git@github.com:compiler-errors/rust.git bump
git checkout -b bump FETCH_HEAD
git reset --hard HEAD~5
./x.py fmt --all
git diff FETCH_HEAD
# ignore the changes to stage0, and rustfmt.toml,
# and test file changes in rustdoc-js-std, run-make.
```

Or just take my word for it? Up to the reviewer.

r? release
2024-09-23 02:02:22 +00:00
bors
d14c1c75ab Auto merge of #130680 - saethlin:module-name-to-str, r=jieyouxu
Call module_name_to_str instead of just unwrapping

This makes the ICE message in https://github.com/rust-lang/rust/issues/130678 more clear. It looks like not calling this function was just an oversight in https://github.com/rust-lang/rust/pull/76859, but clearly not a major one because it's taken us 4 years to notice.

try-job: i686-msvc
2024-09-22 23:14:12 +00:00
Michael Goulet
c682aa162b Reformat using the new identifier sorting from rustfmt 2024-09-22 19:11:29 -04:00
Ben Kimock
6419aeb1ec Call module_name_to_str instead of just unwrapping 2024-09-21 18:42:51 -04:00
Folkert
5722a80782 remove #[cmse_nonsecure_entry] 2024-09-21 13:05:21 +02:00
Folkert de Vries
1ddd67a79a add C-cmse-nonsecure-entry ABI 2024-09-21 13:04:14 +02:00
Michael Goulet
914193c8f4 Do not unnecessarily eval consts in codegen 2024-09-20 20:38:11 -04:00
Guillaume Gomez
bf6389f077
Rollup merge of #128209 - beetrees:no-macos-10.10, r=jieyouxu
Remove macOS 10.10 dynamic linker bug workaround

Rust's current minimum macOS version is 10.12, so the hack can be removed. This PR also updates the `remove_dir_all` docs to reflect that all supported macOS versions are protected against TOCTOU race conditions (the fallback implementation was already removed in #127683).

try-job: dist-x86_64-apple
try-job: dist-aarch64-apple
try-job: dist-apple-various
try-job: aarch64-apple
try-job: x86_64-apple-1
2024-09-20 19:46:37 +02:00
Taiki Endo
fa125e2be6 Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly 2024-09-21 01:51:26 +09:00
Luv-Ray
6da2d6e026 MetadataType type cast 2024-09-19 18:56:02 +08:00
Luv-Ray
e2ec83ced9 move place 2024-09-19 18:52:09 +08:00
Luv-Ray
632342a135 wrap LLVMSetMetadata 2024-09-19 18:45:23 +08:00
Nicholas Nethercote
1f359405cb Reformat some comments.
So they are less than 100 chars.
2024-09-19 20:11:28 +10:00
Nicholas Nethercote
5fd16dffdc Merge adjacent unsafe extern "C" blocks. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
c5af8b2722 Avoid heavy repetition in llvm/ffi.rs.
Through judicious use of `use` and `Self`.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
3b071692cb Remove a low-value local variable. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
ccd6c6102d Fix a comment.
I'm pretty sure `CodegenCx` applies to codegen units, rather than
compilation units.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
badd8cc8f4 Reduce visibility. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
bfef2611d9 Reorder ConstMethods.
It's crazy to have the integer methods in something close to random
order.

The reordering makes the gaps clear: `const_i64`, `const_i128`,
`const_isize`, and `const_u16`. I guess they just aren't needed.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
fda530d729 Streamline hidden visibility setting.
In `get_fn` there is a complicated set of if/elses to determine if
`hidden` visibility should be applied. There are five calls to
`LLVMRustSetVisibility` and some repetition in the comments.

This commit streamlines it a bit:
- Computes `hidden` and then uses it to determine if a single call to
  `LLVMRustSetVisibility` occurs.
- Converts some of the if/elses into boolean expressions.
- Removes the repetitive comments.

Overall this makes it quite a bit shorter, and I find it easier to read.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
eb575506f2 Remove a low-value comment.
We rarely use parameter comments, and these ones don't tell us anything
interesting.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
4ce010efcf Use a macro to factor out some repetitive code.
Similar to the existing macro just above.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
0d78f1e86b Reduce repetition in target_is_apple. 2024-09-19 20:10:41 +10:00
Nicholas Nethercote
9429e64c24 Streamline report_inline_asm.
By using `use`.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
63210bd68c Rename a parameter.
This seems to be a typo. `singletree` doesn't make sense, and everywhere
else it is `singlethread`.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
785a26af03 Streamline register methods.
These can be made more concise, mostly through appropriate use of `use`
declarations.
2024-09-19 20:10:41 +10:00
Luv-Ray
b7c5656713 replace some deprecated functions 2024-09-19 09:39:28 +08:00
Josh Stone
6fd8a50680 Update the minimum external LLVM to 18 2024-09-18 13:53:31 -07:00
Matthias Krüger
21313d7947
Rollup merge of #130457 - nnethercote:cleanup-codegen-traits, r=bjorn3
Cleanup codegen traits

The traits governing codegen are quite complicated and hard to follow. This PR cleans them up a bit.

r? `@bjorn3`
2024-09-18 17:49:43 +02:00
Nicholas Nethercote
acb832d640 Use associative type defaults in {Layout,FnAbi}OfHelpers.
This avoids some repetitive boilerplate code.
2024-09-17 10:25:06 +10:00
Nicholas Nethercote
a8d22eb39e Rename supertraits of CodegenMethods.
Supertraits of `BuilderMethods` are all called `XyzBuilderMethods`.
Supertraits of `CodegenMethods` are all called `XyzMethods`. This commit
changes the latter to `XyzCodegenMethods`, for consistency.
2024-09-17 10:24:43 +10:00
Nicholas Nethercote
410a2de0c0 Rename {ArgAbi,IntrinsicCall}Methods.
They both are part of `BuilderMethods`, and so should have `Builder` in
their name like all the other traits in `BuilderMethods`.
2024-09-17 10:24:43 +10:00
Nicholas Nethercote
5f98943b5a Merge HasCodegen into BuilderMethods.
It has `Backend` and `Deref` boudns, plus an associated type
`CodegenCx`, and it has a single use. This commit "inlines" it into
`BuilderMethods`, which makes the complicated backend trait situation a
little simpler.
2024-09-17 10:24:43 +10:00
Jubilee
68758c0560
Rollup merge of #130325 - workingjubilee:plus-minus-zero-redux, r=RalfJung,jieyouxu
Use -0.0 in `intrinsics::simd::reduce_add_unordered`

-0.0 is the actual neutral additive float, not +0.0, and this matters to codegen.

try-job: aarch64-gnu
2024-09-15 23:51:25 -07:00
Jubilee Young
ab8c202527 Use -0.0 in intrinsics::simd::reduce_add_unordered
-0.0 is the actual neutral additive float, not +0.0, and this matters to codegen.
2024-09-15 16:40:23 -07:00
Matthias Krüger
0daa636b93
Rollup merge of #129897 - RalfJung:soft-float-ignored, r=Urgau
deprecate -Csoft-float because it is unsound (and not fixable)

See  https://github.com/rust-lang/rust/issues/129893 for details. The general sentiment there seems to be that this flag has no use and sound alternatives exist, so let's add this warning and see if anyone out there disagrees.

Also show a different warning on targets where it does nothing (as documented since https://github.com/rust-lang/rust/pull/36261): it seems to correspond to `-mfloat-abi` in GCC/clang, which is an ARM-specific option. To be really sure it does nothing, only forward the flag to LLVM for eabihf targets. This should not change behavior but makes me sleep better ;)
2024-09-15 20:55:12 +02:00
Ralf Jung
60ee1b7ac6 simd_shuffle: require index argument to be a vector 2024-09-14 14:43:24 +02:00
bors
5e842953cc Auto merge of #130052 - khuey:clear-dilocation-after-const-emission, r=michaelwoerister
Don't leave debug locations for constants sitting on the builder indefinitely

Because constants are currently emitted *before* the prologue, leaving the debug location on the IRBuilder spills onto other instructions in the prologue and messes up both line numbers as well as the point LLVM chooses to be the prologue end.

Example LLVM IR (irrelevant IR elided):
Before:
```
define internal { i64, i64 } `@_ZN3tmp3Foo18var_return_opt_try17he02116165b0fc08cE(ptr` align 8 %self) !dbg !347 { start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8, !dbg !357
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)
```
After:
```
define internal { i64, i64 } `@_ZN3tmp3Foo18var_return_opt_try17h00b17d08874ddd90E(ptr` align 8 %self) !dbg !347 { start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)
```
Note in particular how !357 from %residual.dbg.spill's dbg_declare no longer falls through onto the store to %self.dbg.spill. This fixes argument values at entry when the constant is a ZST (e.g. `<Option as Try>::Residual`). This fixes #130003 (but note that it does *not* fix issues with argument values and non-ZST constants, which emit their own stores that have debug info on them, like #128945).

r? `@michaelwoerister`
2024-09-13 08:57:41 +00:00
Stuart Cook
3ba12756d3
Rollup merge of #130235 - compiler-errors:nested-if, r=michaelwoerister
Simplify some nested `if` statements

Applies some but not all instances of `clippy::collapsible_if`. Some ended up looking worse afterwards, though, so I left those out. Also applies instances of `clippy::collapsible_else_if`

Review with whitespace disabled please.
2024-09-12 20:37:16 +10:00
bors
1f51450c68 Auto merge of #117465 - paulmenage:small-data-limit, r=compiler-errors
Add -Z small-data-threshold

This flag allows specifying the threshold size above which LLVM should not consider placing small objects in a `.sdata` or `.sbss` section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-12 04:27:08 +00:00
Jubilee
a31a8fe0cf
Rollup merge of #130114 - eduardosm:needless-returns, r=compiler-errors
Remove needless returns detected by clippy in the compiler
2024-09-11 15:53:22 -07:00
Michael Goulet
954419aab0 Simplify some nested if statements 2024-09-11 13:45:23 -04:00
Paul Menage
3810386bbe Add -Z small-data-threshold
This flag allows specifying the threshold size above which LLVM should
not consider placing small objects in a .sdata or .sbss section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-10 12:19:16 -07:00
Jubilee
88a2c62652
Rollup merge of #129981 - nnethercote:rm-serialize_bitcode, r=antoyo,tmiasko
Remove `serialized_bitcode` from `LtoModuleCodegen`.

It's unused.

r? ``@bjorn3``
2024-09-09 19:20:36 -07:00
Eduardo Sánchez Muñoz
0b20ffcb63 Remove needless returns detected by clippy in the compiler 2024-09-09 13:32:22 +02:00
Nicholas Nethercote
bbe28cf1d9 Remove serialized_bitcode from LtoModuleCodegen.
It's unused.
2024-09-09 09:00:50 +10:00
bors
12b26c13fb Auto merge of #129941 - BoxyUwU:bump-boostrap, r=albertlarsan68
Bump boostrap compiler to new beta

Accidentally left some comments on the update cfgs commit directly xd
2024-09-07 20:37:30 +00:00
Michael Goulet
bc2244f027
Rollup merge of #129940 - liushuyu:s390x-target-features, r=RalfJung
s390x: Fix a regression related to backchain feature

In #127506, we introduced a new IBM Z-specific target feature, `backchain`.

This particular `target-feature` was available as a function-level attribute in LLVM 17 and below, so some hacks were used to avoid blowing up LLVM when querying the supported LLVM features.

This led to an unfortunate regression where `cfg!(target-feature = "backchain")` will always return true.

This pull request aims to fix this issue, and a test has been introduced to ensure it will never happen again.

Fixes #129927.

r? `@RalfJung`
2024-09-07 14:21:22 +03:00
Michael Goulet
6dd07e4e26
Rollup merge of #129891 - nikic:naked-no-san, r=jackh726
Do not request sanitizers for naked functions

Naked functions can only contain inline asm, so any instrumentation inserted by sanitizers is illegal. Don't request it.

Fixes https://github.com/rust-lang/rust/issues/129224.
2024-09-07 14:21:21 +03:00
Kyle Huey
7ed9f945a2 Don't leave debug locations for constants sitting on the builder indefinitely.
Because constants are currently emitted *before* the prologue, leaving the
debug location on the IRBuilder spills onto other instructions in the prologue
and messes up both line numbers as well as the point LLVM chooses to be the
prologue end.

Example LLVM IR (irrelevant IR elided):
Before:

define internal { i64, i64 } @_ZN3tmp3Foo18var_return_opt_try17he02116165b0fc08cE(ptr align 8 %self) !dbg !347 {
start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8, !dbg !357
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)

After:

define internal { i64, i64 } @_ZN3tmp3Foo18var_return_opt_try17h00b17d08874ddd90E(ptr align 8 %self) !dbg !347 {
start:
  %self.dbg.spill = alloca [8 x i8], align 8
  %_0 = alloca [16 x i8], align 8
  %residual.dbg.spill = alloca [0 x i8], align 1
    #dbg_declare(ptr %residual.dbg.spill, !353, !DIExpression(), !357)
  store ptr %self, ptr %self.dbg.spill, align 8
    #dbg_declare(ptr %self.dbg.spill, !350, !DIExpression(), !358)

Note in particular how !357 from %residual.dbg.spill's dbg_declare no longer
falls through onto the store to %self.dbg.spill. This fixes argument values
at entry when the constant is a ZST (e.g. <Option as Try>::Residual). This
fixes #130003 (but note that it does *not* fix issues with argument values and
non-ZST constants, which emit their own stores that have debug info on them,
like #128945).
2024-09-06 23:12:18 +00:00
Nikita Popov
54ebb9d489 Do not request sanitizers for naked functions
Naked functions can only contain inline asm, so any instrumentation
inserted by sanitizers is illegal. Don't request it.

Fixes https://github.com/rust-lang/rust/issues/129224.
2024-09-06 14:11:13 +02:00
Matthias Krüger
0180b8fff0
Rollup merge of #129969 - GrigorenkoPV:boxed-ty, r=compiler-errors
Make `Ty::boxed_ty` return an `Option`

Looks like a good place to use Rust's type system.

---

Most of 4ac7bcbaad/compiler/rustc_middle/src/ty/sty.rs (L971-L1963) looks like it could be moved to `TyKind` (then I guess  `Ty` should be made to deref to `TyKind`).
2024-09-06 07:33:58 +02:00
bors
54fdef7799 Auto merge of #121614 - clubby789:no-expect, r=saethlin
Don't emit `expect`/`assume` in opt-level=0

LLVM does not make use of expect/assume calls in `opt-level=0`, so we can simplify IR by not emitting them in this case.
2024-09-06 00:42:58 +00:00
Pavel Grigorenko
f6e8a84eea Make Ty::boxed_ty return an Option 2024-09-06 00:30:36 +03:00
Matthias Krüger
b89ee99d57
Rollup merge of #128820 - LYF1999:yf/dev, r=nikic
fix: get llvm type of global val

using `LLVMTypeOf` on a global var always return ptr. so create a new function to access the value type of a global
2024-09-05 18:58:53 +02:00