Commit Graph

1487 Commits

Author SHA1 Message Date
Jubilee
b88f56f862
Rollup merge of #130453 - randomPoison:trusty-x86, r=pnkfelix
Add x86_64-unknown-trusty as tier 3 target

This PR adds a third target for the Trusty platform, `x86_64-unknown-trusty`.

Please let me know if an MCP is required. https://github.com/rust-lang/compiler-team/issues/582 was made when adding the first two targets, I can make another one for the new target as well if needed.

# Target Tier Policy Acknowledgements

> A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.)

- Nicole LeGare (```@randomPoison)```
- Andrei Homescu (```@ahomescu)```
- Chris Wailes (chriswailes@google.com)
- As a fallback trusty-dev-team@google.com can be contacted

Note that this does not reflect the maintainers currently listed in [`trusty.md`](c52c23b6f4/src/doc/rustc/src/platform-support/trusty.md). #130452 is currently open to update the list of maintainers in the documentation.

> Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target.

The new target `x86_64-unknown-trusty` follows the existing naming convention for similar targets.

> Target names should not introduce undue confusion or ambiguity unless absolutely necessary to maintain ecosystem compatibility. For example, if the name of the target makes people extremely likely to form incorrect beliefs about what it targets, the name should be changed or augmented to disambiguate it.

👍

> Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users.

There are no known legal issues or license incompatibilities.

> Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions.

👍

> Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate (core for most targets, alloc for targets that can support dynamic memory allocation, std for targets with an operating system or equivalent layer of system-provided functionality), but may leave some code unimplemented (either unavailable or stubbed out as appropriate), whether because the target makes it impossible to implement or challenging to implement. The authors of pull requests are not obligated to avoid calling any portions of the standard library on the basis of a tier 3 target not implementing those portions.

This PR only adds the target. `std` support is being worked on and will be added in a future PR.

> The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible. If the target supports running binaries, or running tests (even if they do not pass), the documentation must explain how to run such binaries or tests for the target, using emulation if possible or dedicated hardware if necessary.

👍

> Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via ```@)``` to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages.

👍

> Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target.

👍

> Tier 3 targets must be able to produce assembly using at least one of rustc's supported backends from any host target. (Having support in a fork of the backend is not sufficient, it must be upstream.)

👍
2024-10-04 14:11:34 -07:00
Mads Marquart
f51d8e3276 Fix target_abi in sparc-unknown-none-elf
This was previously set to `target_abi = "elf"`, but `elf` is not used
elsewhere as a target ABI (even though there's many targets that have it
in their name).
2024-10-04 20:47:28 +02:00
Guillaume Gomez
ba94a2ada1
Rollup merge of #131202 - Urgau:wide-ptrs-compiler, r=jieyouxu
Use wide pointers consistenly across the compiler

This PR replace every use of "fat pointer" for the more recent "wide pointer" terminology.

Since some time T-lang as preferred the "wide pointer" terminology, as can be seen on [the last RFCs](https://github.com/search?q=repo%3Arust-lang%2Frfcs+%22wide+pointer%22&type=code), on some [lints](https://doc.rust-lang.org/rustc/lints/listing/warn-by-default.html#ambiguous-wide-pointer-comparisons), but also in [the reference](https://doc.rust-lang.org/stable/reference/expressions/operator-expr.html?highlight=wide%20pointer#pointer-to-pointer-cast).

Currently we have a [mix of both](https://github.com/search?q=repo%3Arust-lang%2Frust+%22wide+pointer%22&type=code) (including in error messages), which isn't great, but with this PR no more.

r? `@jieyouxu` (feel free to re-roll)
2024-10-04 15:42:54 +02:00
Urgau
018ba0528f Use wide pointers consistenly across the compiler 2024-10-04 14:06:48 +02:00
Henry Jiang
d09e27d54a update call 2024-10-03 12:36:36 -04:00
Henry Jiang
7d27ceb954 Add AIX Calling Convention 2024-10-03 11:37:41 -04:00
Mads Marquart
afe605957f Add comment noting the situation with target_os = "psx" 2024-10-03 14:13:11 +02:00
Matthias Krüger
35ff9e2bc6
Rollup merge of #131173 - madsmtm:target-info-solid_asp3-abi, r=lcnr
Fix `target_abi` in SOLID targets

The `armv7a-kmc-solid_asp3-eabi` and `armv7a-kmc-solid_asp3-eabihf` targets clearly have the ABI in their name, so it should also be exposed in Rust's `target_abi` cfg variable.

CC target maintainer `@kawadakk.`
2024-10-03 13:48:00 +02:00
Jubilee
cc61b81c6a
Rollup merge of #131166 - madsmtm:target-info-switch-vendor, r=jieyouxu
Fix `target_vendor` for `aarch64-nintendo-switch-freestanding`

Previously set to `target_vendor = "unknown"`, but Nintendo is clearly the vendor of the Switch, and is also reflected in the target name itself.

CC target maintainers `@leo60228` and `@jam1garner`
2024-10-02 21:26:59 -07:00
Mads Marquart
111f2e8a39 Fix target_os for mipsel-sony-psx
Previously set to `target_os = "none"` and `target_env = "psx"`, but
although the Playstation 1 is _close_ to a bare metal target in some
regards, it's still very much an operating system, so we should set
`target_os = "psx"`.

This also matches the `mipsel-sony-psp` target, which sets
`target_os = "psp"`.
2024-10-03 00:27:43 +02:00
Mads Marquart
0ae796440a Fix target_abi in SOLID targets
The `armv7a-kmc-solid_asp3-eabi` and `armv7a-kmc-solid_asp3-eabihf`
targets clearly have the ABI in their name, so it should also be exposed
in Rust's `target_abi` cfg variable.
2024-10-02 20:54:09 +02:00
Mads Marquart
033fdda46c Fix target_env in avr-unknown-gnu-atmega328
The target name itself contains GNU, we should set that in the
environment as well.
2024-10-02 20:30:51 +02:00
Mads Marquart
51537c686c Fix target_vendor in non-idf Xtensa ESP32 targets
The Xtensa ESP32 targets are the following:
- xtensa-esp32-none-elf
- xtensa-esp32-espidf
- xtensa-esp32s2-none-elf
- xtensa-esp32s2-espidf
- xtensa-esp32s3-none-elf
- xtensa-esp32s3-espidf

The ESP-IDF targets already set `target_vendor="espressif"`, however,
the ESP32 is produced by Espressif regardless of whether using the IDF
or not, so we should set the target vendor there as well.
2024-10-02 20:09:27 +02:00
Mads Marquart
7a3a98d894 Fix target_vendor in QNX Neutrino targets
The `x86_64-pc-nto-qnx710` and `i586-pc-nto-qnx700` targets have `pc` in
their target triple names, but the vendor was set to the default
`"unknown"`.
2024-10-02 19:57:59 +02:00
Mads Marquart
746c322592 Fix target_vendor for aarch64-nintendo-switch-freestanding
Previously set to `target_vendor = "unknown"`, but Nintendo is clearly
the vendor of the Switch, and is also reflected in the target name
itself.
2024-10-02 19:30:55 +02:00
Matthias Krüger
5fd6218d72
Rollup merge of #131016 - madsmtm:no-sdk-version-in-object, r=jieyouxu
Apple: Do not specify an SDK version in `rlib` object files

This was added in https://github.com/rust-lang/rust/pull/114114, but is unnecessary, since it ends up being overwritten when linking anyhow, and it feels wrong to embed some arbitrary SDK version in here. The object files produced by LLVM also do not set this, and the tooling shows `n/a` when it's `0`, so it seems to genuinely be optional in object files.

I've also added a test for the different places the SDK version shows up, and documented a bit more in the code how SDK versions work.

See https://github.com/rust-lang/rust/issues/129432 for the bigger picture.

Tested with (excludes the same few targets as in https://github.com/rust-lang/rust/pull/130435):
```console
./x test tests/run-make/apple-sdk-version --target aarch64-apple-darwin,aarch64-apple-ios,aarch64-apple-ios-macabi,aarch64-apple-ios-sim,aarch64-apple-tvos,aarch64-apple-tvos-sim,aarch64-apple-visionos,aarch64-apple-visionos-sim,aarch64-apple-watchos,aarch64-apple-watchos-sim,arm64_32-apple-watchos,armv7k-apple-watchos,armv7s-apple-ios,x86_64-apple-darwin,x86_64-apple-ios,x86_64-apple-ios-macabi,x86_64-apple-tvos,x86_64-apple-watchos-sim,x86_64h-apple-darwin
IPHONEOS_DEPLOYMENT_TARGET=10.0 ./x test tests/run-make/apple-sdk-version --target=i386-apple-ios
```

CC `@BlackHoleFox,` you [originally commented on these values](https://github.com/rust-lang/rust/pull/114114#discussion_r1300599445).

`@rustbot` label O-apple
2024-10-02 17:10:43 +02:00
bors
06bb8364aa Auto merge of #131111 - matthiaskrgr:rollup-n6do187, r=matthiaskrgr
Rollup of 4 pull requests

Successful merges:

 - #130005 (Replace -Z default-hidden-visibility with -Z default-visibility)
 - #130229 (ptr::add/sub: do not claim equivalence with `offset(c as isize)`)
 - #130773 (Update Unicode escapes in `/library/core/src/char/methods.rs`)
 - #130933 (rustdoc: lists items that contain multiple paragraphs are more clear)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-10-01 19:29:26 +00:00
Matthias Krüger
389a399a50
Rollup merge of #130005 - davidlattimore:protected-vis-flag, r=Urgau
Replace -Z default-hidden-visibility with -Z default-visibility

Issue #105518
2024-10-01 21:09:18 +02:00
Guillaume Gomez
344b6a1668
Rollup merge of #130630 - taiki-e:s390x-clobber-abi, r=Amanieu
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly

This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335.

This also supports vector registers (as `vreg`) and access registers (as `areg`) as clobber-only, which need to support clobbering of them to implement clobber_abi.

Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
  - Vector registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L249
  - Access registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L332

I have three questions:
- ~~ELF Application Binary Interface s390x Supplement says that `cc` (condition code, bits 18-19 of PSW) is "Volatile".
  However, we do not have a register class for `cc` and instead mark `cc` as clobbered unless `preserves_flags` is specified (https://github.com/rust-lang/rust/pull/111331).
  Therefore, in the current implementation, if both `preserves_flags` and `clobber_abi` are specified, `cc` is not marked as clobbered. Is this okay? Or even if `preserves_flags` is used, should `cc` be marked as clobbered if `clobber_abi` is used?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- ~~ELF Application Binary Interface s390x Supplement says that `pm` (program mask, bits 20-23 of PSW) is "Cleared".
  There does not appear to be any registers associated with this in either [LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td) or [GCC](33ccc1314d/gcc/config/s390/s390.h (L407-L431)), so at this point I don't see any way other than to just ignore it. Is this okay as-is?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and `reg_addr`, which uses the “a” constraint (https://github.com/rust-lang/rust/pull/119431)...

Note:

- GCC seems to [recognize only `a0` and `a1`](33ccc1314d/gcc/config/s390/s390.h (L428-L429)), and using `a[2-15]` [causes errors](https://godbolt.org/z/a46vx8jjn).
  Given that cg_gcc has a similar problem with other architecture (https://github.com/rust-lang/rustc_codegen_gcc/issues/485), I don't feel this is a blocker for this PR, but it is worth mentioning here.
- `vreg` should be able to accept `#[repr(simd)]` types as input if the `vector` target feature added in https://github.com/rust-lang/rust/pull/127506 is enabled, but core_arch has no s390x vector type and both `#[repr(simd)]` and `core::simd` are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... https://github.com/rust-lang/rust/pull/88245#issuecomment-905559591

cc `@uweigand`

r? `@Amanieu`

`@rustbot` label +O-SystemZ
2024-10-01 17:32:07 +02:00
David Lattimore
f48194ea55 Replace -Z default-hidden-visibility with -Z default-visibility
MCP: https://github.com/rust-lang/compiler-team/issues/782

Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
2024-10-01 22:32:13 +10:00
Mads Marquart
6b06ceb2fd Do not specify an SDK version in object files
This is unnecessary, since it ends up being overwritten when linking
anyhow, and it feels wrong to embed some arbitrary SDK version in here.
2024-09-29 14:45:09 +02:00
Taiki Endo
62612af372 rustc_target: Add RISC-V atomic-related features 2024-09-28 11:26:09 +09:00
Matthias Krüger
fd9d961ed8
Rollup merge of #130873 - taiki-e:ppc64-atomic, r=Amanieu
rustc_target: Add powerpc64 atomic-related features

This adds the following two target features to unstable powerpc_target_feature.

- `partword-atomics`: 8-bit and 16-bit atomic instructions (`l{b,h}arx` and `st{b,h}cx.`) ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPC.td#L170-L172))
- `quadword-atomics`: 128-bit atomic instructions (`lqarx` and `stqcx.`) ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPC.td#L173-L175))

Both features are [available on power8+](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPC.td#L408-L422), so enabled by default for `powerpc64le-*` targets.

r? `@Amanieu`

`@rustbot` label +O-PowerPC
2024-09-27 19:08:00 +02:00
Matthias Krüger
f9cd81f3d9
Rollup merge of #130435 - madsmtm:move-apple-link-args, r=petrochenkov
Move Apple linker args from `rustc_target` to `rustc_codegen_ssa`

They are dependent on the deployment target and SDK version, but having these in `rustc_target` makes it hard to introduce that dependency. Part of the work needed to do https://github.com/rust-lang/rust/issues/118204, see https://github.com/rust-lang/rust/pull/129342 for some discussion.

Tested using:
```console
./x test tests/run-make/apple-deployment-target --target="aarch64-apple-darwin,aarch64-apple-ios,aarch64-apple-ios-macabi,aarch64-apple-ios-sim,aarch64-apple-tvos,aarch64-apple-tvos-sim,aarch64-apple-visionos,aarch64-apple-visionos-sim,aarch64-apple-watchos,aarch64-apple-watchos-sim,arm64_32-apple-watchos,armv7k-apple-watchos,armv7s-apple-ios,x86_64-apple-darwin,x86_64-apple-ios,x86_64-apple-ios-macabi,x86_64-apple-tvos,x86_64-apple-watchos-sim,x86_64h-apple-darwin"
IPHONEOS_DEPLOYMENT_TARGET=10.0 ./x test tests/run-make/apple-deployment-target --target=i386-apple-ios
```

`arm64e-apple-darwin` and `arm64e-apple-ios` have not been tested, see https://github.com/rust-lang/rust/issues/130085, neither is `i686-apple-darwin`, since that requires using an x86_64 macbook, and I currently can't get mine to work, see https://github.com/rust-lang/rust/issues/130434.

CC `@petrochenkov`
2024-09-27 19:07:59 +02:00
Mads Marquart
fb10eeb42b Move Apple linker args from rustc_target to rustc_codegen_ssa
They are dependent on the deployment target and SDK version, but having
these in `rustc_target` makes it hard to introduce that dependency.
2024-09-26 16:40:25 +02:00
Taiki Endo
36455c6f6b rustc_target: Add powerpc64 atomic-related features 2024-09-26 16:43:04 +09:00
Taiki Endo
1bef68c4cb Update FIXME comment in s390x_unknown_linux_*.rs 2024-09-26 12:52:35 +09:00
Matthias Krüger
18cdc5e257
Rollup merge of #130809 - heiher:update-triple-ohos, r=jieyouxu
Update llvm triple for OpenHarmony targets

The `ohos` triple has been supported since LLVM 17, so it's time to update them.
2024-09-25 10:09:24 +02:00
Matthias Krüger
508b433e27
Rollup merge of #130549 - biabbas:riscv32_wrs_vxworks, r=nnethercote
Add RISC-V vxworks targets

Risc-V 32 and RISC-V 64 targets are to be added in the target list.
2024-09-25 10:09:22 +02:00
B I Mohammed Abbas
6d229f89ba Vxworks riscv target specs: remove redundant zicsr feature 2024-09-25 09:46:15 +05:30
WANG Rui
7a966b9188 Update llvm triple for OpenHarmony targets
The `ohos` triple has been supported since LLVM 17, so it's time to
update them.
2024-09-25 10:42:40 +08:00
Michael Goulet
4d0b44ab5b
Rollup merge of #130750 - heiher:loong-linux-ohos-tier3, r=jieyouxu
Add new Tier-3 target: `loongarch64-unknown-linux-ohos`

MCP: https://github.com/rust-lang/compiler-team/issues/784
2024-09-23 23:49:12 -04:00
Xiaotian Wu
9ab704612a Add new Tier-3 target: loongarch64-unknown-linux-ohos
MCP: https://github.com/rust-lang/compiler-team/issues/784

Co-authored-by: WANG Rui <wangrui@loongson.cn>
2024-09-23 23:06:14 +08:00
Jubilee
021ae2c7fd
Rollup merge of #130657 - arttet:fix/fuchsia, r=jieyouxu
Remove x86_64-fuchsia and aarch64-fuchsia target aliases

Closes #106649.
2024-09-23 07:54:45 -07:00
Michael Goulet
c682aa162b Reformat using the new identifier sorting from rustfmt 2024-09-22 19:11:29 -04:00
Jubilee
2875d6f98e
Rollup merge of #130650 - BlackHoleFox:apple-target-desc-consistency, r=jieyouxu
Fixup Apple target's description strings

Noticed this inconsistency in how the Apple target's had their new descriptions written while looking at https://github.com/rust-lang/rust/pull/130614, and figured it was easy enough to fixup shortly. I think prefixing every OS with `Apple` is clearer, especially for less known ones like `visionOS` and `watchOS`; so that's what was done here along with making the architecture names more consistent and then some other small tweaks.

~~r​? `@thomcc~~`

cc `@madsmtm`
2024-09-21 22:34:32 -07:00
BlackHoleFox
114093cdf1 Fixup Apple target's description strings 2024-09-21 10:59:01 -05:00
Folkert
4d75a4f0f2 disallow cmse ABIs on unsupported platforms 2024-09-21 13:05:23 +02:00
Folkert de Vries
1ddd67a79a add C-cmse-nonsecure-entry ABI 2024-09-21 13:04:14 +02:00
Artyom Tetyukhin
019435b265
Remove x86_64-fuchsia and aarch64-fuchsia target aliases 2024-09-21 13:29:00 +04:00
Taiki Endo
fa125e2be6 Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly 2024-09-21 01:51:26 +09:00
Artyom Tetyukhin
340b38ed67
Add arm64e-apple-tvos target 2024-09-20 18:53:09 +04:00
B I Mohammed Abbas
eb6a52c2f6 Update std support for all vxworks target archs 2024-09-20 17:23:49 +05:30
B I Mohammed Abbas
485e90f1a7 Add Vxworks RISC-V targets 2024-09-20 16:15:55 +05:30
Taiki Endo
078b067c0d Support 128-bit atomics on s390x 2024-09-19 20:26:43 +09:00
Jubilee Young
a800d1cf37 compiler: s/make_indirect_byval/pass_by_stack_offset/
The previous name is just an LLVMism, which conveys almost nothing about
what is actually meant by the function relative to the ABI.

In doing so, remove an already-addressed FIXME.
2024-09-18 12:28:55 -07:00
Jubilee Young
0cf89b5336 compiler: Use make_indirect for the wasm ABI
This is ignored by LLVM, but is still incorrect.
2024-09-18 12:28:55 -07:00
Nicole LeGare
ae5d448a26 Add x86_64-unknown-trusty as tier 3 2024-09-16 15:47:54 -07:00
Chris Copeland
1a0ba01177
Fix target-cpu fpu features on Armv8-R.
This is a follow-up to #123159, but applied to Armv8-R.

This required https://github.com/llvm/llvm-project/pull/88287 to work
properly. Now that this change exists in rustc's llvm, we can fix
Armv8-R's default fpu features. In Armv8-R's case, the default features
from LLVM for floating-point are sufficient, because there is no
integer-only variant of this architecture.
2024-09-14 21:39:23 -07:00
Matthias Krüger
778f6fba2b
Rollup merge of #130266 - heiher:loong-medium-cmodel, r=compiler-errors
target: default to the medium code model on LoongArch targets

The Rust LoongArch targets have been using the default LLVM code model so far, which is "small" in LLVM-speak and "normal" in LoongArch-speak. As described in the "Code Model" section of LoongArch ELF psABI spec v20231219 [1], one can only make function calls as far as ±128MiB with the "normal" code model; this is insufficient for very large software containing Rust components that needs to be linked into the big text section, such as Chromium.

Because:

* we do not want to ask users to recompile std if they are to build such software,
* objects compiled with larger code models can be linked with those with smaller code models without problems, and
* the "medium" code model is comparable to the "small"/"normal" one performance-wise (same data access pattern; each function call becomes 2-insn long and indirect, but this may be relaxed back into the direct 1-insn form in a future LLVM version), but is able to perform function calls within ±128GiB,

it is better to just switch the targets to the "medium" code model, which is also "medium" in LLVM-speak.

Relands [2]:  #120661

[1]: https://github.com/loongson/la-abi-specs/blob/v2.30/laelf.adoc#code-models
[2]: https://github.com/rust-lang/rust/issues/121289#issuecomment-2333687396
2024-09-13 18:25:45 +02:00
Stuart Cook
3ba12756d3
Rollup merge of #130235 - compiler-errors:nested-if, r=michaelwoerister
Simplify some nested `if` statements

Applies some but not all instances of `clippy::collapsible_if`. Some ended up looking worse afterwards, though, so I left those out. Also applies instances of `clippy::collapsible_else_if`

Review with whitespace disabled please.
2024-09-12 20:37:16 +10:00
Stuart Cook
65a5cd467d
Rollup merge of #129367 - madsmtm:fix-apple-aarch64-deployment-targets, r=jieyouxu
Fix default/minimum deployment target for Aarch64 simulator targets

The minimum that `rustc` encoded did not match [the version in Clang](https://github.com/llvm/llvm-project/blob/llvmorg-18.1.8/llvm/lib/TargetParser/Triple.cpp#L1900-L1932), and that meant that that when linking, Clang ended up bumping the version. See https://github.com/rust-lang/rust/issues/129432 for more motivation behind this change.

Specifically, this PR sets the correct deployment target of the following targets:
- `aarch64-apple-ios-sim` from 10.0 to 14.0
- `aarch64-apple-tvos-sim` from 10.0 to 14.0
- `aarch64-apple-watchos-sim` from 5.0 to 7.0
- `aarch64-apple-ios-macabi` from 13.1 to 14.0

I have chosen not to document the `-sim` changes in the platform support docs, as it is fundamentally uninteresting; the normal targets (e.g. `aarch64-apple-ios`) still have the same deployment target, and that's what developers should actually target.

r? compiler

CC `@BlackHoleFox`
2024-09-12 20:37:15 +10:00
bors
7c7372b6a1 Auto merge of #129369 - madsmtm:apple-cc-linker-pass-target, r=jieyouxu
Pass deployment target when linking with CC on Apple targets

This PR effectively implements what's also being considered in the `cc` crate [here](https://github.com/rust-lang/cc-rs/issues/1030#issuecomment-2051020649), that is:
- When linking macOS targets with CC, pass the `-mmacosx-version-min=.` option to specify the desired deployment target. Also, no longer pass `-m32`/`-m64`, these are redundant since we already pass `-arch`.
- When linking with CC on iOS, tvOS, watchOS and visionOS, only pass `-target` (we assume for these targets that CC forwards to Clang).

This is required to get the linker to emit the correct `LC_BUILD_VERSION` of the final binary. See https://github.com/rust-lang/rust/issues/129432 for more motivation behind this change.

r? compiler

CC `@BlackHoleFox`
2024-09-12 06:57:38 +00:00
WANG Xuerui
82777a94ad target: default to the medium code model on LoongArch targets
The Rust LoongArch targets have been using the default LLVM code model
so far, which is "small" in LLVM-speak and "normal" in LoongArch-speak.
As described in the "Code Model" section of LoongArch ELF psABI spec
v20231219 [1], one can only make function calls as far as ±128MiB with
the "normal" code model; this is insufficient for very large software
containing Rust components that needs to be linked into the big text
section, such as Chromium.

Because:

* we do not want to ask users to recompile std if they are to build
  such software,
* objects compiled with larger code models can be linked with those
  with smaller code models without problems, and
* the "medium" code model is comparable to the "small"/"normal" one
  performance-wise (same data access pattern; each function call
  becomes 2-insn long and indirect, but this may be relaxed back into
  the direct 1-insn form in a future LLVM version), but is able to
  perform function calls within ±128GiB,

it is better to just switch the targets to the "medium" code model,
which is also "medium" in LLVM-speak.

[1]: https://github.com/loongson/la-abi-specs/blob/v2.30/laelf.adoc#code-models

Co-authored-by: WANG Rui <wangrui@loongson.cn>
2024-09-12 14:13:48 +08:00
bors
1f51450c68 Auto merge of #117465 - paulmenage:small-data-limit, r=compiler-errors
Add -Z small-data-threshold

This flag allows specifying the threshold size above which LLVM should not consider placing small objects in a `.sdata` or `.sbss` section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-12 04:27:08 +00:00
Jubilee
a31a8fe0cf
Rollup merge of #130114 - eduardosm:needless-returns, r=compiler-errors
Remove needless returns detected by clippy in the compiler
2024-09-11 15:53:22 -07:00
Michael Goulet
af8d911d63 Also fix if in else 2024-09-11 17:24:01 -04:00
Paul Menage
3810386bbe Add -Z small-data-threshold
This flag allows specifying the threshold size above which LLVM should
not consider placing small objects in a .sdata or .sbss section.

Support is indicated in the target options via the
small-data-threshold-support target option, which can indicate either an
LLVM argument or an LLVM module flag.  To avoid duplicate specifications
in a large number of targets, the default value for support is
DefaultForArch, which is translated to a concrete value according to the
target's architecture.
2024-09-10 12:19:16 -07:00
Mads Marquart
dd35398545 Pass deployment target when linking with cc on Apple targets
When linking macOS targets with cc, pass the `-mmacosx-version-min=.`
option to specify the desired deployment target. Also, no longer pass
`-m32`/`-m64`, these are redundant since we already pass `-arch`.

When linking with cc on other Apple targets, always pass `-target`.
(We assume for these targets that cc => clang).
2024-09-09 13:57:17 +02:00
Mads Marquart
97df8fb7ec Fix default/minimum deployment target for Aarch64 simulator targets
The minimum that `rustc` encoded did not match the version in Clang, and
that meant that that when linking, we ended up bumping the version.

Specifically, this sets the correct deployment target of the following
simulator and Mac Catalyst targets:
- `aarch64-apple-ios-sim` from 10.0 to 14.0
- `aarch64-apple-tvos-sim` from 10.0 to 14.0
- `aarch64-apple-watchos-sim` from 5.0 to 7.0
- `aarch64-apple-ios-macabi` from 13.1 to 14.0

I have chosen to not document the simulator target versions in the
platform support docs, as it is fundamentally uninteresting; the normal
targets (e.g. `aarch64-apple-ios`, `aarch64-apple-tvos`) still have the
same deployment target as before, and that's what developers should
actually target.
2024-09-09 13:55:14 +02:00
Eduardo Sánchez Muñoz
0b20ffcb63 Remove needless returns detected by clippy in the compiler 2024-09-09 13:32:22 +02:00
Jubilee
a7c5797c90
Rollup merge of #130092 - zslayton:master, r=jieyouxu
Fixes typo in wasm32-wasip2 doc comment
2024-09-09 00:17:51 -07:00
Samuel Thibault
7626015848 added support for GNU/Hurd on x86_64 2024-09-08 23:37:07 +02:00
Zack Slayton
cfe85a3a73 Fixes typo in wasm32-wasip2 doc comment 2024-09-07 17:36:47 -04:00
bors
12b26c13fb Auto merge of #129941 - BoxyUwU:bump-boostrap, r=albertlarsan68
Bump boostrap compiler to new beta

Accidentally left some comments on the update cfgs commit directly xd
2024-09-07 20:37:30 +00:00
bors
9afe713695 Auto merge of #129341 - madsmtm:refactor-deployment-target, r=petrochenkov
Apple: Refactor deployment target version parsing

Refactor deployment target parsing to make it easier to do https://github.com/rust-lang/rust/pull/129342 (I wanted to make sure of all the places that `std::env::var` is called).

Specifically, my goal was to minimize the amount of target-specific configuration, so to that end I renamed the `opts` function that generates the `TargetOptions` to `base`, and made it return the LLVM target and `target_arch` too. In the future, I would like to move even more out of the target files and into `spec::apple`, as it makes it easier for me to maintain.

For example, this fixed a bug in `aarch64-apple-watchos`, which wasn't passing the deployment target as part of the LLVM triple. This (probably) fixes https://github.com/rust-lang/rust/issues/123582 and fixes https://github.com/rust-lang/rust/issues/107630.

We also now parse the patch version of deployment targets, allowing the user to specify e.g. `MACOSX_DEPLOYMENT_TARGET=10.12.6`.

Finally, this fixes the LLVM target name for visionOS, it should be `*-apple-xros` and not `*-apple-visionos`.

Since I have changed all the Apple targets here, I smoke-tested my changes by running the following:
```console
# Build each target
./x build library --target="aarch64-apple-darwin,aarch64-apple-ios,aarch64-apple-ios-macabi,aarch64-apple-ios-sim,aarch64-apple-tvos,aarch64-apple-tvos-sim,aarch64-apple-visionos,aarch64-apple-visionos-sim,aarch64-apple-watchos,aarch64-apple-watchos-sim,arm64_32-apple-watchos,arm64e-apple-ios,armv7k-apple-watchos,armv7s-apple-ios,i386-apple-ios,x86_64-apple-darwin,x86_64-apple-ios,x86_64-apple-ios-macabi,x86_64-apple-tvos,x86_64-apple-watchos-sim,x86_64h-apple-darwin"

# Test that we can still at least link basic projects
cargo new foobar && cd foobar && cargo +stage1 build --target=aarch64-apple-darwin --target=aarch64-apple-ios --target=aarch64-apple-ios-macabi --target=aarch64-apple-ios-sim --target=aarch64-apple-tvos --target=aarch64-apple-tvos-sim --target=aarch64-apple-visionos --target=aarch64-apple-visionos-sim --target=aarch64-apple-watchos --target=aarch64-apple-watchos-sim --target=arm64_32-apple-watchos --target=armv7s-apple-ios --target=i386-apple-ios --target=x86_64-apple-darwin --target=x86_64-apple-ios --target=x86_64-apple-ios-macabi --target=x86_64-apple-tvos --target=x86_64-apple-watchos-sim --target=x86_64h-apple-darwin
```

I couldn't build for the `arm64e-apple-darwin` target, the `armv7k-apple-watchos` and `arm64e-apple-ios` targets failed to link, and I know that the `i686-apple-darwin` target requires a bit of setup, but all of this is as it was before this PR.

r? thomcc

CC `@BlackHoleFox`

I would recommend using `rollup=never` when merging this, in case we need to bisect this later.
2024-09-07 01:37:52 +00:00
Boxy
0091b8ab2a update cfgs 2024-09-05 17:24:01 +01:00
Mads Marquart
bd56857e31 Apple: Add comments for -platform_version linker argument 2024-09-05 06:47:13 +02:00
Mads Marquart
5b51331abe Apple: Refactor deployment target version parsing
- Merge minimum OS version list into one function (makes it easier to
  see the logic in it).
- Parse patch deployment target versions.
- Consistently specify deployment target in LLVM target (previously
  omitted on `aarch64-apple-watchos`).
2024-09-05 06:47:13 +02:00
Mads Marquart
23cdb50e4f Apple: Improve comments for -arch linker argument 2024-09-05 06:47:11 +02:00
Matthias Krüger
3775e6bd9f
Rollup merge of #127021 - thesummer:1-add-target-support-for-rtems-arm-xilinx-zedboard, r=tgross35
Add target support for RTEMS Arm

# `armv7-rtems-eabihf`

This PR adds a new target for the RTEMS RTOS. To get things started it focuses on Xilinx/AMD Zynq-based targets, but in theory it should also support other armv7-based board support packages in the future.
Given that RTEMS has support for many POSIX functions it is mostly enabling corresponding unix features for the new target.
I also previously started a PR in libc (https://github.com/rust-lang/libc/pull/3561) to add the needed OS specific C-bindings and was told that a PR in this repo is needed first. I will update the PR to the newest version after approval here.
I will probably also need to change one line in the backtrace repo.

Current status is that I could compile rustc for the new target locally (with the updated libc and backtrace) and could compile binaries, link, and execute a simple "Hello World" RTEMS application for the target hardware.

> A proposed target or target-specific patch that substantially changes code shared with other targets (not just target-specific code) must be reviewed and approved by the appropriate team for that shared code before acceptance.

There should be no breaking changes for existing targets. Main changes are adding corresponding `cfg` switches for the RTEMS OS and adding the C binding in libc.

# Tier 3 target policy

> - A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.)

I will do the maintenance (for now) further members of the RTEMS community will most likely join once the first steps have been done.

> - Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target.
>     - Target names should not introduce undue confusion or ambiguity unless absolutely necessary to maintain ecosystem compatibility. For example, if the name of the target makes people extremely likely to form incorrect beliefs about what it targets, the name should be changed or augmented to disambiguate it.
>     - If possible, use only letters, numbers, dashes and underscores for the name. Periods (`.`) are known to cause issues in Cargo.

The proposed triple is `armv7-rtems-eabihf`

> - Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users.
>     - The target must not introduce license incompatibilities.
>     - Anything added to the Rust repository must be under the standard Rust license (`MIT OR Apache-2.0`).
>     - The target must not cause the Rust tools or libraries built for any other host (even when supporting cross-compilation to the target) to depend on any new dependency less permissive than the Rust licensing policy. This applies whether the dependency is a Rust crate that would require adding new license exceptions (as specified by the `tidy` tool in the rust-lang/rust repository), or whether the dependency is a native library or binary. In other words, the introduction of the target must not cause a user installing or running a version of Rust or the Rust tools to be subject to any new license requirements.
>     - Compiling, linking, and emitting functional binaries, libraries, or other code for the target (whether hosted on the target itself or cross-compiling from another target) must not depend on proprietary (non-FOSS) libraries. Host tools built for the target itself may depend on the ordinary runtime libraries supplied by the platform and commonly used by other applications built for the target, but those libraries must not be required for code generation for the target; cross-compilation to the target must not require such libraries at all. For instance, `rustc` built for the target may depend on a common proprietary C runtime library or console output library, but must not depend on a proprietary code generation library or code optimization library. Rust's license permits such combinations, but the Rust project has no interest in maintaining such combinations within the scope of Rust itself, even at tier 3.
>     - "onerous" here is an intentionally subjective term. At a minimum, "onerous" legal/licensing terms include but are _not_ limited to: non-disclosure requirements, non-compete requirements, contributor license agreements (CLAs) or equivalent, "non-commercial"/"research-only"/etc terms, requirements conditional on the employer or employment of any particular Rust developers, revocable terms, any requirements that create liability for the Rust project or its developers or users, or any requirements that adversely affect the livelihood or prospects of the Rust project or its developers or users.

The tools consists of the cross-compiler toolchain (gcc-based). The RTEMS kernel (BSD license) and parts of the driver stack of FreeBSD (BSD license). All tools are FOSS and publicly available here: https://gitlab.rtems.org/rtems
There are also no new features or dependencies introduced to the Rust code.

> - Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions.

N/A to me. I am not a reviewer nor Rust team member.

> - Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate (`core` for most targets, `alloc` for targets that can support dynamic memory allocation, `std` for targets with an operating system or equivalent layer of system-provided functionality), but may leave some code unimplemented (either unavailable or stubbed out as appropriate), whether because the target makes it impossible to implement or challenging to implement. The authors of pull requests are not obligated to avoid calling any portions of the standard library on the basis of a tier 3 target not implementing those portions.

`core` and `std` compile. Some advanced features of the `std` lib might not work yet. However, the goal of this tier 3 target it to make it easier for other people to build and run test applications to better identify the unsupported features and work towards enabling them.

> - The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible. If the target supports running binaries, or running tests (even if they do not pass), the documentation must explain how to run such binaries or tests for the target, using emulation if possible or dedicated hardware if necessary.

Building is described in platform support doc. Running simple unit tests works. Running the test suite of the stdlib is currently not that easy. Trying to work towards that after the this target has been added to the nightly.

> - Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via ````@`)``` to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages.

Understood.

>     - Backlinks such as those generated by the issue/PR tracker when linking to an issue or PR are not considered a violation of this policy, within reason. However, such messages (even on a separate repository) must not generate notifications to anyone involved with a PR who has not requested such notifications.

Ok

> - Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target.
>     - In particular, this may come up when working on closely related targets, such as variations of the same architecture with different features. Avoid introducing unconditional uses of features that another variation of the target may not have; use conditional compilation or runtime detection, as appropriate, to let each target run code supported by that target.

I think, I didn't add any breaking changes for any existing targets (see the comment regarding features above).

> - Tier 3 targets must be able to produce assembly using at least one of rustc's supported backends from any host target.

Can produce assembly code via the llvm backend (tested on Linux).

>
> If a tier 3 target stops meeting these requirements, or the target maintainers no longer have interest or time, or the target shows no signs of activity and has not built for some time, or removing the target would improve the quality of the Rust codebase, we may post a PR to remove it; any such PR will be CCed to the target maintainers (and potentially other people who have previously worked on the target), to check potential interest in improving the situation.GIAt this tier, the Rust project provides no official support for a target, so we place minimal requirements on the introduction of targets.

Understood.

r? compiler-team
2024-09-05 03:47:40 +02:00
Matthias Krüger
2f6e85567a
Rollup merge of #129863 - RalfJung:target-spec-features, r=wesleywiser
update comment regarding TargetOptions.features

The claim that `-Ctarget-features` cannot disable these features set in the target spec is definitely wrong -- I tried it for `x86_64-pc-windows-gnu`, which enables SSE3 that way. Building with `-Ctarget-feature=-sse3` works fine, and `cfg!(target_feature = "sse3")` is `false` in that build.

There are also some indications that these are actually intended to be overwritten:

3b14526cea/compiler/rustc_target/src/spec/targets/i686_unknown_uefi.rs (L22-L23)

84ac80f192/compiler/rustc_target/src/spec/targets/x86_64h_apple_darwin.rs (L18-L23)

So... let's update the comment to match reality, I guess?

The claim that they overwrite `-Ctarget-cpu` is based on
- for `native`, the comment in the apple target spec quoted above
- for other CPU strings, the assumption that `LLVMRustCreateTargetMachine` will apply these features after doing whatever the base CPU model does. I am not sure how to check that, I hope some LLVM backend people can chime in. :)
2024-09-03 19:13:25 +02:00
Ralf Jung
5c0dfc6182 update comment regarding TargetOptions.features 2024-09-03 09:35:15 +02:00
Jan Sommer
124454cda8 rtems: Add spec file for arm_rtems6_eabihf 2024-09-03 09:20:49 +02:00
bors
6199b69c53 Auto merge of #129777 - nnethercote:unreachable_pub-4, r=Urgau
Add `unreachable_pub`, round 4

A follow-up to #129732.

r? `@Urgau`
2024-09-03 01:27:20 +00:00
Nicholas Nethercote
0fb3a509cf Add warn(unreachable_pub) to rustc_target. 2024-09-03 08:49:54 +10:00
Matthias Krüger
929b308579
Rollup merge of #129878 - Sajjon:sajjon_fix_typos_batch_3, r=jieyouxu
chore: Fix typos in 'compiler' (batch 3)

Batch 3/3: Fixes typos in `compiler`

(See [issue](https://github.com/rust-lang/rust/issues/129874) tracking all PRs with typos fixes)
2024-09-02 22:35:21 +02:00
Alexander Cyon
5780c1ca5e
chore: Fix typos in 'compiler' (batch 3) 2024-09-02 07:33:41 +02:00
Matthias Krüger
efad457ad5
Rollup merge of #129842 - no1wudi:master, r=saethlin
Fix LLVM ABI NAME for riscv64imac-unknown-nuttx-elf

This patch fix https://github.com/rust-lang/rust/issues/129825

For the riscv64imac target, the LLVM ABI NAME should be "lp64", which is the default ABI if not specified for the riscv64imac target.
2024-09-02 04:19:30 +02:00
bors
1a1cc050d8 Auto merge of #127897 - nyurik:add-qnx-70-target, r=saethlin
add `aarch64_unknown_nto_qnx700` target - QNX 7.0 support for aarch64le

This backports the QNX 7.1 aarch64 implementation to 7.0.

* [x] required `-lregex` disabled, see https://github.com/rust-lang/libc/pull/3775 (released in libc 0.2.156)
* [x] uses `libgcc.a` instead of `libgcc_s.so` (7.0 used ancient GCC 5.4 which didn't have gcc_s)
* [x] a fix in `backtrace` crate to support stack traces https://github.com/rust-lang/backtrace-rs/pull/648

This PR bumps libc dependency to 0.2.158

CC: to the folks who did the [initial implementation](https://doc.rust-lang.org/rustc/platform-support/nto-qnx.html): `@flba-eb,` `@gh-tr,` `@jonathanpallant,` `@japaric`

# Compile target

```bash
# Configure qcc build environment
source _path_/_to_/qnx7.0/qnxsdp-env.sh

# Tell rust to use qcc when building QNX 7.0 targets
export build_env='
    CC_aarch64-unknown-nto-qnx700=qcc
    CFLAGS_aarch64-unknown-nto-qnx700=-Vgcc_ntoaarch64le_cxx
    CXX_aarch64-unknown-nto-qnx700=qcc
    AR_aarch64_unknown_nto_qnx700=ntoaarch64-ar'

# Build rust compiler, libs, and the remote test server
env $build_env ./x.py build \
  --target x86_64-unknown-linux-gnu,aarch64-unknown-nto-qnx700 \
  rustc library/core library/alloc library/std src/tools/remote-test-server

rustup toolchain link stage1 build/host/stage1
```

# Compile "hello world"

```bash
source _path_/_to_/qnx7.0/qnxsdp-env.sh

cargo new hello_world
cd hello_world
cargo +stage1 build --release --target aarch64-unknown-nto-qnx700
```

# Configure a remote for testing

Do this from a new shell - we will need to run more commands in the previous one.  I ran into these two issues, and found some workarounds.

* Temporary dir might not work properly
* Default `remote-test-server` has issues binding to an address

```
# ./remote-test-server
starting test server
thread 'main' panicked at src/tools/remote-test-server/src/main.rs:175:29:
called `Result::unwrap()` on an `Err` value: Os { code: 249, kind: AddrNotAvailable, message: "Can't assign requested address" }
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
```

Specifying `--bind` param actually fixes that, and so does setting `TMPDIR` properly.

```bash
# Copy remote-test-server to remote device. You may need to use sftp instead.
# ATTENTION: Note that the path is different from the one in the remote testing documentation for some reason
scp ./build/x86_64-unknown-linux-gnu/stage1-tools-bin/remote-test-server  qnxdevice:/path/

# Run ssh with port forwarding - so that rust tester can connect to the local port instead
ssh -L 12345:127.0.0.1:12345 qnxdevice

# on the device, run
rm -rf tmp && mkdir -p tmp && TMPDIR=$PWD/tmp ./remote-test-server --bind 0.0.0.0:12345
```

# Run test suit

Assume all previous environment variables are still set, or re-init them

```bash
export TEST_DEVICE_ADDR="localhost:12345"

# tidy needs to be skipped due to using un-published libc dependency
export exclude_tests='
    --exclude src/bootstrap
    --exclude src/tools/error_index_generator
    --exclude src/tools/linkchecker
    --exclude src/tools/tidy
    --exclude tests/ui-fulldeps
    --exclude rustc
    --exclude rustdoc
    --exclude tests/run-make-fulldeps'

env $build_env ./x.py test  $exclude_tests --stage 1 --target aarch64-unknown-nto-qnx700
```

try-job: dist-x86_64-msvc
2024-09-01 08:00:25 +00:00
Huang Qi
de7a14e977 Fix LLVM ABI NAME for riscv64imac-unknown-nuttx-elf
This patch fix https://github.com/rust-lang/rust/issues/129825

For the riscv64imac target, the LLVM ABI NAME should be "lp64",
which is the default ABI if not specified for the riscv64imac target.
2024-09-01 09:59:09 +08:00
Yuri Astrakhan
f41e0bb41d Squashed aarch64_unknown_nto_qnx700 support 2024-08-30 01:19:55 -04:00
Ding Xiang Fei
9c29b33c7e
riscv64imac: allow shadow call stack sanitizer 2024-08-29 21:48:48 +08:00
Jubilee
2ac56db8a2
Rollup merge of #129712 - randomPoison:trusty-tier-3-fix, r=saethlin
Correct trusty targets to be tier 3

The Trusty targets were added in https://github.com/rust-lang/rust/pull/129490, but in that PR I accidentally marked them as tier 2. This PR corrects the target metadata to mark them as tier 3.
2024-08-28 19:12:55 -07:00
Jubilee
4c8c9e092d
Rollup merge of #128192 - mrkajetanp:feature-detect, r=Amanieu
rustc_target: Add various aarch64 features

Add various aarch64 features already supported by LLVM and Linux.
Additionally include some comment fixes to ensure consistency of feature names with the Arm ARM.
Compiler support for features added to stdarch by https://github.com/rust-lang/stdarch/pull/1614.
Tracking issue for unstable aarch64 features is https://github.com/rust-lang/rust/issues/127764.

List of added features:

- FEAT_CSSC
- FEAT_ECV
- FEAT_FAMINMAX
- FEAT_FLAGM2
- FEAT_FP8
- FEAT_FP8DOT2
- FEAT_FP8DOT4
- FEAT_FP8FMA
- FEAT_HBC
- FEAT_LSE128
- FEAT_LSE2
- FEAT_LUT
- FEAT_MOPS
- FEAT_LRCPC3
- FEAT_SVE_B16B16
- FEAT_SVE2p1
- FEAT_WFxT
- FEAT_SME
- FEAT_SME_F16F16
- FEAT_SME_F64F64
- FEAT_SME_F8F16
- FEAT_SME_F8F32
- FEAT_SME_FA64
- FEAT_SME_I16I64
- FEAT_SME_LUTv2
- FEAT_SME2
- FEAT_SME2p1
- FEAT_SSVE_FP8DOT2
- FEAT_SSVE_FP8DOT4
- FEAT_SSVE_FP8FMA

FEAT_FPMR is added in the first commit and then removed in a separate one to highlight it being removed from upstream LLVM 19. The intention is for it to be detectable at runtime through stdarch but not have a corresponding Rust compile-time feature.
2024-08-28 19:12:49 -07:00
Nicole LeGare
d8129a1c01 Correct trusty targets to be tier 3 2024-08-28 16:15:36 -07:00
Matthias Krüger
5e226dd18b
Rollup merge of #129649 - RalfJung:unadjusted-abi-mismatch, r=petrochenkov
ABI compat check: detect unadjusted ABI mismatches
2024-08-27 18:59:30 +02:00
Kajetan Puchalski
4fc4019cbc rustc_target: Remove fpmr target feature
FEAT_FPMR has been removed from upstream LLVM as of LLVM 19.
Remove the feature from the target features list and temporarily hack
the LLVM codegen to always enable it until the minimum LLVM version is
bumped to 19.
2024-08-27 11:11:47 +01:00
Kajetan Puchalski
c3518067c7 rustc_target: Add SME aarch64 features
Add SME aarch64 features already supported by LLVM and Linux.

This commit adds compiler support for the following features:

- FEAT_SME
- FEAT_SME_F16F16
- FEAT_SME_F64F64
- FEAT_SME_F8F16
- FEAT_SME_F8F32
- FEAT_SME_FA64
- FEAT_SME_I16I64
- FEAT_SME_LUTv2
- FEAT_SME2
- FEAT_SME2p1
- FEAT_SSVE_FP8DOT2
- FEAT_SSVE_FP8DOT4
- FEAT_SSVE_FP8FMA
2024-08-27 11:11:47 +01:00
Kajetan Puchalski
4f847bd326 rustc_target: Add various aarch64 features
Add various aarch64 features already supported by LLVM and Linux.

The features are marked as unstable using a newly added symbol, i.e.
aarch64_unstable_target_feature.

Additionally include some comment fixes to ensure consistency of
feature names with the Arm ARM and support for architecture version
target features up to v9.5a.

This commit adds compiler support for the following features:

- FEAT_CSSC
- FEAT_ECV
- FEAT_FAMINMAX
- FEAT_FLAGM2
- FEAT_FP8
- FEAT_FP8DOT2
- FEAT_FP8DOT4
- FEAT_FP8FMA
- FEAT_FPMR
- FEAT_HBC
- FEAT_LSE128
- FEAT_LSE2
- FEAT_LUT
- FEAT_MOPS
- FEAT_LRCPC3
- FEAT_SVE_B16B16
- FEAT_SVE2p1
- FEAT_WFxT
2024-08-27 11:11:47 +01:00
Ralf Jung
ab7b03e3f4 ABI compat check: detect unadjusted ABI mismatches 2024-08-27 09:04:59 +02:00
Trevor Gross
8ea70e9537
Rollup merge of #129536 - beetrees:f16-f128-inline-asm-aarch64, r=Amanieu
Add `f16` and `f128` inline ASM support for `aarch64`

Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in #127043.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128

try-job: aarch64-gnu
try-job: aarch64-apple
2024-08-27 01:46:53 -05:00
beetrees
abd44fc5f4
Add f16 and f128 inline ASM support for aarch64 2024-08-25 00:13:25 +01:00
rongfu.leng
ec67cdf98a
Enable f16 in assembly on aarch64 platforms that support it
Signed-off-by: rongfu.leng <lenronfu@gmail.com>
2024-08-24 23:07:09 +01:00
Nicole LeGare
1ed9ee7b03 Remove reserve-x18 from armv7-unknown-trusty 2024-08-23 16:26:20 -07:00
Nicole LeGare
681a866067 Add Trusty OS as tier 3 target 2024-08-23 16:09:56 -07:00
beetrees
0f5c6eaccc
Make ArgAbi::make_indirect_force more specific 2024-08-21 02:43:12 +01:00
bors
d0293c6cf2 Auto merge of #125854 - beetrees:zst-arg-abi, r=estebank
Move ZST ABI handling to `rustc_target`

Currently, target specific handling of ZST function call ABI (specifically passing them indirectly instead of ignoring them) is handled in `rustc_ty_utils`, whereas all other target specific function call ABI handling is located in `rustc_target`. This PR moves the ZST handling to `rustc_target` so that all the target-specific function call ABI handling is in one place. In the process of doing so, this PR fixes #125850 by ensuring that ZST arguments are always correctly ignored in the x86-64 `"sysv64"` ABI; any code which would be affected by this fix would have ICEd before this PR. Tests are also added using `#[rustc_abi(debug)]` to ensure this behaviour does not regress.

Fixes #125850
2024-08-18 22:15:41 +00:00
bors
6de928dce9 Auto merge of #126450 - madsmtm:promote-mac-catalyst, r=Mark-Simulacrum
Promote Mac Catalyst targets to Tier 2, and ship with rustup

Promote the Mac Catalyst targets `x86_64-apple-ios-macabi` and `aarch64-apple-ios-macabi` to Tier 2, as per [the MCP](https://github.com/rust-lang/compiler-team/issues/761) (see that for motivation and details).

These targets are now also distributed with rustup, although without the sanitizer runtime, as that currently has trouble building, see https://github.com/rust-lang/rust/issues/129069.
2024-08-18 15:52:58 +00:00
Matthias Krüger
442ba180d6
Rollup merge of #127905 - BKPepe:powerpc-muslspe, r=wesleywiser
Add powerpc-unknown-linux-muslspe compile target

This is almost identical to already existing targets:
- powerpc_unknown_linux_musl.rs
- powerpc_unknown_linux_gnuspe.rs

It has support for PowerPC SPE (muslspe), which
can be used with GCC version up to 8. It is useful for Freescale or IBM cores like e500.

This was verified to be working with OpenWrt build system for CZ.NIC's Turris 1.x routers, which are using Freescale P2020, e500v2, so add it as a Tier 3 target.

Follow-up of https://github.com/rust-lang/rust/pull/100860
2024-08-15 00:02:24 +02:00
Mads Marquart
3ed63dd843 Promote Mac Catalyst targets to tier 2, and ship with rustup
- aarch64-apple-ios-macabi
- x86_64-apple-ios-macabi
2024-08-14 02:12:14 +02:00
Matthias Krüger
00d040e50a
Rollup merge of #128643 - beetrees:ppc64-abi-fix, r=bjorn3
Refactor `powerpc64` call ABI handling

As the [specification](https://openpowerfoundation.org/specifications/64bitelfabi/) for the ELFv2 ABI states that returned aggregates are returned like arguments as long as they are at most two doublewords, I've merged the `classify_arg` and `classify_ret` functions to reduce code duplication. The only functional change is to fix #128579: the `classify_ret` function was incorrectly handling aggregates where `bits > 64 && bits < 128`. I've used the aggregate handling implementation from `classify_arg` which doesn't have this issue.

`@awilfox` could you test this on `powerpc64-unknown-linux-musl`? I'm only able to cross-test on `powerpc64-unknown-linux-gnu` and `powerpc64le-unknown-linux-gnu` locally at the moment, and as a tier 3 target `powerpc64-unknown-linux-musl` has zero CI coverage.

Fixes: #128579
2024-08-13 12:12:21 +02:00
Guillaume Gomez
7c6dca9050
Rollup merge of #128978 - compiler-errors:assert-matches, r=jieyouxu
Use `assert_matches` around the compiler more

It's a useful assertion, especially since it actually prints out the LHS.
2024-08-12 17:09:19 +02:00
Michael Goulet
c361c924a0 Use assert_matches around the compiler 2024-08-11 12:25:39 -04:00
beetrees
715728f546
Refactor powerpc64 call ABI handling 2024-08-11 14:11:17 +01:00
Matthias Krüger
32e0fe129d
Rollup merge of #128762 - fmease:use-more-slice-pats, r=compiler-errors
Use more slice patterns inside the compiler

Nothing super noteworthy. Just replacing the common 'fragile' pattern of "length check followed by indexing or unwrap" with slice patterns for legibility and 'robustness'.

r? ghost
2024-08-11 07:51:51 +02:00
Matthias Krüger
bd7075c69e
Rollup merge of #128592 - evelynharthbrooke:master, r=Mark-Simulacrum
Promote aarch64-apple-darwin to Tier 1

This promotes aarch64-apple-darwin to Tier 1 status as per rust-lang/rfcs#3671 and tracking issue #73908. Not sure what else is necessary for this to impement the aforementioned RFC, however I figured I'd try. I did read in previous issues and PRs that the necessary infrastructure was already in place for the aarch64-apple-darwin target, and the RFC mentions the same. So this should be all thats necessary in order for the target to be promoted.

This is a recreation of my previous PR because I accidentally did an incorrect git rebase which caused unnecessary changes to various commit SHAs. So this PR is a recreation of my previous PR without said stumble. My bad.
2024-08-11 07:51:51 +02:00
Nadrieril
c256de2253 Update std and compiler 2024-08-10 12:07:17 +02:00
Evelyn Harthbrooke
1c02e2b5f1
fix incorrect value 2024-08-09 16:59:36 -06:00
León Orell Valerian Liehr
c4c518d2d4
Use more slice patterns inside the compiler 2024-08-07 13:37:52 +02:00
Caleb Zulawski
0b98a0c727 Fix typo
Co-authored-by: Amanieu d'Antras <amanieu@gmail.com>
2024-08-07 00:43:56 -04:00
Caleb Zulawski
5006711744 Remove redundant implied features 2024-08-07 00:41:48 -04:00
Caleb Zulawski
a25da077cf Don't use LLVM to compute -Ctarget-feature 2024-08-07 00:41:48 -04:00
Caleb Zulawski
484aca8857 Don't use LLVM's target features 2024-08-07 00:41:48 -04:00
Caleb Zulawski
fbd618d4aa Refactor and fill out target feature lists 2024-08-07 00:41:48 -04:00
Caleb Zulawski
c866e1f812 Add missing features 2024-08-07 00:41:48 -04:00
Caleb Zulawski
74653b61a6 Add implied target features to target_feature attribute 2024-08-07 00:41:48 -04:00
Matthias Krüger
8cbf1c1b22
Rollup merge of #122049 - Amanieu:riscv64-musl-tier2, r=Mark-Simulacrum
Promote riscv64gc-unknown-linux-musl to tier 2
2024-08-05 23:35:22 +02:00
daxpedda
80b74d397f
Implement a implicit target feature mechanism 2024-08-04 08:44:23 +02:00
daxpedda
90521399b4
Stabilize Wasm relaxed SIMD 2024-08-04 08:44:13 +02:00
Amanieu d'Antras
a937a3b5a1 Make riscv64gc-unknown-linux-musl dynamically linked by default 2024-08-03 23:26:10 +01:00
beetrees
b1493ba519
Move ZST ABI handling to rustc_target 2024-08-02 11:45:32 +01:00
sayantn
41b017ec99 Add the sha512, sm3 and sm4 target features
Add the feature in `core/lib.rs`
2024-08-02 02:29:15 +05:30
Matthias Krüger
c4ee411854
Rollup merge of #128296 - heiher:update-metadata, r=Urgau
Update target-spec metadata for loongarch64 targets
2024-08-01 00:50:11 +02:00
beetrees
fe6478cc53
Match LLVM ABI in extern "C" functions for f128 on Windows 2024-07-30 20:23:33 +01:00
bors
80d8270d84 Auto merge of #125016 - nicholasbishop:bishop-cb-112, r=tgross35
Update compiler_builtins to 0.1.114

The `weak-intrinsics` feature was removed from compiler_builtins in https://github.com/rust-lang/compiler-builtins/pull/598, so dropped the `compiler-builtins-weak-intrinsics` feature from alloc/std/sysroot.

In https://github.com/rust-lang/compiler-builtins/pull/593, some builtins for f16/f128 were added. These don't work for all compiler backends, so add a `compiler-builtins-no-f16-f128` feature and disable it for cranelift and gcc.
2024-07-29 07:41:33 +00:00
Nicholas Nethercote
84ac80f192 Reformat use declarations.
The previous commit updated `rustfmt.toml` appropriately. This commit is
the outcome of running `x fmt --all` with the new formatting options.
2024-07-29 08:26:52 +10:00
klensy
58c9999f25 dedup object
waiting on thorin-dwp update

dedup one wasmparser

run-make-support: drop some features for wasmparser

dedupe wasm-encoder
2024-07-28 17:21:07 +03:00
WANG Rui
b4e1a53b7a Update target-spec metadata for loongarch64 targets 2024-07-28 12:46:52 +08:00
bors
d111ccdb61 Auto merge of #127755 - no1wudi:master, r=michaelwoerister
Add NuttX based targets for RISC-V and ARM

Apache NuttX is a real-time operating system (RTOS) with an emphasis on standards compliance and small footprint. It is scalable from 8-bit to 64-bit microcontroller environments. The primary governing standards in NuttX are POSIX and ANSI standards.

NuttX adopts additional standard APIs from Unix and other common RTOSs, such as VxWorks. These APIs are used for functionality not available under the POSIX and ANSI standards. However, some APIs, like fork(), are not appropriate for deeply-embedded environments and are not implemented in NuttX.

For brevity, many parts of the documentation will refer to Apache NuttX as simply NuttX.

I'll be adding libstd support for NuttX in the future, but for now I'll just add the targets.

Tier 3 policy:

> A tier 3 target must have a designated developer or developers (the "target
>  maintainers") on record to be CCed when issues arise regarding the target.
>  (The mechanism to track and CC such developers may evolve over time.)

I will be the target maintainer for this target on matters that pertain to the NuttX part of the triple. For matters pertaining to the riscv or arm part of the triple, there should be no difference from all other targets. If there are issues, I will address issues regarding the target.

> Targets must use naming consistent with any existing targets; for instance, a
> target for the same CPU or OS as an existing Rust target should use the same
> name for that CPU or OS. Targets should normally use the same names and
> naming conventions as used elsewhere in the broader ecosystem beyond Rust
> (such as in other toolchains), unless they have a very good reason to
> diverge. Changing the name of a target can be highly disruptive, especially
> once the target reaches a higher tier, so getting the name right is important
> even for a tier 3 target.

This is a new supported OS, so I have taken the origin target like `riscv32imac-unknown-none-elf` or `thumbv7m-none-eabi` and changed the `os` section to `nuttx`.

> Target names should not introduce undue confusion or ambiguity unless
> absolutely necessary to maintain ecosystem compatibility. For example, if
> the name of the target makes people extremely likely to form incorrect
> beliefs about what it targets, the name should be changed or augmented to
> disambiguate it.

I feel that the target name does not introduce any ambiguity.

> Tier 3 targets may have unusual requirements to build or use, but must not
> create legal issues or impose onerous legal terms for the Rust project or for
> Rust developers or users.

The only unusual requirement for building the compiler-builtins crate is a standard RISC-V or ARM C compiler supported by cc-rs, and using this target does not require any additional software beyond what is shipped by rustup.

> The target must not introduce license incompatibilities.

All of the additional code will use Apache-2.0.

> Anything added to the Rust repository must be under the standard Rust
> license (`MIT OR Apache-2.0`).

Agreed, and there is no problem here.

> The target must not cause the Rust tools or libraries built for any other
> host (even when supporting cross-compilation to the target) to depend
> on any new dependency less permissive than the Rust licensing policy. This
> applies whether the dependency is a Rust crate that would require adding
> new license exceptions (as specified by the `tidy` tool in the
> rust-lang/rust repository), or whether the dependency is a native library
> or binary. In other words, the introduction of the target must not cause a
> user installing or running a version of Rust or the Rust tools to be
> subject to any new license requirements.

No new dependencies are added.

> Compiling, linking, and emitting functional binaries, libraries, or other
> code for the target (whether hosted on the target itself or cross-compiling
> from another target) must not depend on proprietary (non-FOSS) libraries.
> Host tools built for the target itself may depend on the ordinary runtime
> libraries supplied by the platform and commonly used by other applications
> built for the target, but those libraries must not be required for code
> generation for the target; cross-compilation to the target must not require
> such libraries at all. For instance, `rustc` built for the target may
> depend on a common proprietary C runtime library or console output library,
> but must not depend on a proprietary code generation library or code
> optimization library. Rust's license permits such combinations, but the
> Rust project has no interest in maintaining such combinations within the
> scope of Rust itself, even at tier 3.

Linking is performed by rust-lld

> "onerous" here is an intentionally subjective term. At a minimum, "onerous"
> legal/licensing terms include but are *not* limited to: non-disclosure
> requirements, non-compete requirements, contributor license agreements
> (CLAs) or equivalent, "non-commercial"/"research-only"/etc terms,
> requirements conditional on the employer or employment of any particular
> Rust developers, revocable terms, any requirements that create liability
> for the Rust project or its developers or users, or any requirements that
> adversely affect the livelihood or prospects of the Rust project or its
> developers or users.

There are no terms. NuttX is distributed under the Apache 2.0 license.

> Neither this policy nor any decisions made regarding targets shall create any
> binding agreement or estoppel by any party. If any member of an approving
> Rust team serves as one of the maintainers of a target, or has any legal or
> employment requirement (explicit or implicit) that might affect their
> decisions regarding a target, they must recuse themselves from any approval
> decisions regarding the target's tier status, though they may otherwise
> participate in discussions.

I'm not the reviewer here.

> This requirement does not prevent part or all of this policy from being
> cited in an explicit contract or work agreement (e.g. to implement or
> maintain support for a target). This requirement exists to ensure that a
> developer or team responsible for reviewing and approving a target does not
> face any legal threats or obligations that would prevent them from freely
> exercising their judgment in such approval, even if such judgment involves
> subjective matters or goes beyond the letter of these requirements.

Again I'm not the reviewer here.

> Tier 3 targets should attempt to implement as much of the standard libraries
> as possible and appropriate (`core` for most targets, `alloc` for targets
> that can support dynamic memory allocation, `std` for targets with an
> operating system or equivalent layer of system-provided functionality), but
> may leave some code unimplemented (either unavailable or stubbed out as
> appropriate), whether because the target makes it impossible to implement or
> challenging to implement. The authors of pull requests are not obligated to
> avoid calling any portions of the standard library on the basis of a tier 3
> target not implementing those portions.
> The target must provide documentation for the Rust community explaining how
> to build for the target, using cross-compilation if possible. If the target
> supports running binaries, or running tests (even if they do not pass), the
> documentation must explain how to run such binaries or tests for the target,
> using emulation if possible or dedicated hardware if necessary.

Building is described in platform support doc, but libstd is not supported now, I'll implement it later.

> Tier 3 targets must not impose burden on the authors of pull requests, or
> other developers in the community, to maintain the target. In particular,
> do not post comments (automated or manual) on a PR that derail or suggest a
> block on the PR based on a tier 3 target. Do not send automated messages or
> notifications (via any medium, including via ``@`)` to a PR author or others
> involved with a PR regarding a tier 3 target, unless they have opted into
> such messages.

Understood.

> Backlinks such as those generated by the issue/PR tracker when linking to
> an issue or PR are not considered a violation of this policy, within
> reason. However, such messages (even on a separate repository) must not
> generate notifications to anyone involved with a PR who has not requested
> such notifications.

Understood.

> Patches adding or updating tier 3 targets must not break any existing tier 2
> or tier 1 target, and must not knowingly break another tier 3 target without
> approval of either the compiler team or the maintainers of the other tier 3
> target.

I believe I didn't break any other target.

> In particular, this may come up when working on closely related targets,
> such as variations of the same architecture with different features. Avoid
> introducing unconditional uses of features that another variation of the
> target may not have; use conditional compilation or runtime detection, as
> appropriate, to let each target run code supported by that target.

I think there are no such problems in this PR.

> Tier 3 targets must be able to produce assembly using at least one of
> rustc's supported backends from any host target. (Having support in a fork
> of the backend is not sufficient, it must be upstream.)

Yes, it use standard RISCV or ARM backend to generate assembly.
2024-07-23 09:45:28 +00:00
Trevor Gross
5e8e46cbd2
Rollup merge of #127506 - liushuyu:s390x-target-features, r=davidtwco
rustc_target: add known safe s390x target features

This pull request adds known safe target features for s390x (aka IBM Z systems).
Currently, these features are unstable since stabilizing the target features requires submitting proposals.

The `vector` feature was added in IBM Z13 (`arch11`), and this is a SIMD feature for the newer IBM Z systems.
The `backchain` attribute is the IBM Z way of adding frame pointers like unwinding capabilities (the "frame-pointer" switch on IBM Z and IBM POWER platforms will add _emulated_ frame pointers to the binary, which profilers can't use for unwinding the stack).

Both attributes can be applied at the LLVM module or function levels. However, the `backchain` attribute has to be enabled for all the functions in the call stack to get a successful unwind process.
2024-07-22 11:40:19 -05:00
Huang Qi
a84ddc80ac Add NuttX based targets for RISC-V and ARM
Apache NuttX is a real-time operating system (RTOS) with an emphasis on standards compliance and small footprint. It is scalable from 8-bit to 64-bit microcontroller environments. The primary governing standards in NuttX are POSIX and ANSI standards.

NuttX adopts additional standard APIs from Unix and other common RTOSs, such as VxWorks. These APIs are used for functionality not available under the POSIX and ANSI standards. However, some APIs, like fork(), are not appropriate for deeply-embedded environments and are not implemented in NuttX.

For brevity, many parts of the documentation will refer to Apache NuttX as simply NuttX.

I'll be adding libstd support for NuttX in the future, but for now I'll just add the targets.

Tier 3 policy:

> A tier 3 target must have a designated developer or developers (the "target
>  maintainers") on record to be CCed when issues arise regarding the target.
>  (The mechanism to track and CC such developers may evolve over time.)

I will be the target maintainer for this target on matters that pertain to the NuttX part of the triple.
For matters pertaining to the riscv or arm part of the triple, there should be no difference from all other targets. If there are issues, I will address issues regarding the target.

> Targets must use naming consistent with any existing targets; for instance, a
> target for the same CPU or OS as an existing Rust target should use the same
> name for that CPU or OS. Targets should normally use the same names and
> naming conventions as used elsewhere in the broader ecosystem beyond Rust
> (such as in other toolchains), unless they have a very good reason to
> diverge. Changing the name of a target can be highly disruptive, especially
> once the target reaches a higher tier, so getting the name right is important
> even for a tier 3 target.

This is a new supported OS, so I have taken the origin target like `riscv32imac-unknown-none-elf` or `thumbv7m-none-eabi`
and changed the `os` section to `nuttx`.

> Target names should not introduce undue confusion or ambiguity unless
> absolutely necessary to maintain ecosystem compatibility. For example, if
> the name of the target makes people extremely likely to form incorrect
> beliefs about what it targets, the name should be changed or augmented to
> disambiguate it.

I feel that the target name does not introduce any ambiguity.

> Tier 3 targets may have unusual requirements to build or use, but must not
> create legal issues or impose onerous legal terms for the Rust project or for
> Rust developers or users.

The only unusual requirement for building the compiler-builtins crate is a standard RISC-V or ARM C compiler supported by cc-rs, and using this target does not require any additional software beyond what is shipped by rustup.

> The target must not introduce license incompatibilities.

All of the additional code will use Apache-2.0.

> Anything added to the Rust repository must be under the standard Rust
> license (`MIT OR Apache-2.0`).

Agreed, and there is no problem here.

> The target must not cause the Rust tools or libraries built for any other
> host (even when supporting cross-compilation to the target) to depend
> on any new dependency less permissive than the Rust licensing policy. This
> applies whether the dependency is a Rust crate that would require adding
> new license exceptions (as specified by the `tidy` tool in the
> rust-lang/rust repository), or whether the dependency is a native library
> or binary. In other words, the introduction of the target must not cause a
> user installing or running a version of Rust or the Rust tools to be
> subject to any new license requirements.

No new dependencies are added.

> Compiling, linking, and emitting functional binaries, libraries, or other
> code for the target (whether hosted on the target itself or cross-compiling
> from another target) must not depend on proprietary (non-FOSS) libraries.
> Host tools built for the target itself may depend on the ordinary runtime
> libraries supplied by the platform and commonly used by other applications
> built for the target, but those libraries must not be required for code
> generation for the target; cross-compilation to the target must not require
> such libraries at all. For instance, `rustc` built for the target may
> depend on a common proprietary C runtime library or console output library,
> but must not depend on a proprietary code generation library or code
> optimization library. Rust's license permits such combinations, but the
> Rust project has no interest in maintaining such combinations within the
> scope of Rust itself, even at tier 3.

Linking is performed by rust-lld

> "onerous" here is an intentionally subjective term. At a minimum, "onerous"
> legal/licensing terms include but are *not* limited to: non-disclosure
> requirements, non-compete requirements, contributor license agreements
> (CLAs) or equivalent, "non-commercial"/"research-only"/etc terms,
> requirements conditional on the employer or employment of any particular
> Rust developers, revocable terms, any requirements that create liability
> for the Rust project or its developers or users, or any requirements that
> adversely affect the livelihood or prospects of the Rust project or its
> developers or users.

There are no terms. NuttX is distributed under the Apache 2.0 license.

> Neither this policy nor any decisions made regarding targets shall create any
> binding agreement or estoppel by any party. If any member of an approving
> Rust team serves as one of the maintainers of a target, or has any legal or
> employment requirement (explicit or implicit) that might affect their
> decisions regarding a target, they must recuse themselves from any approval
> decisions regarding the target's tier status, though they may otherwise
> participate in discussions.

I'm not the reviewer here.

> This requirement does not prevent part or all of this policy from being
> cited in an explicit contract or work agreement (e.g. to implement or
> maintain support for a target). This requirement exists to ensure that a
> developer or team responsible for reviewing and approving a target does not
> face any legal threats or obligations that would prevent them from freely
> exercising their judgment in such approval, even if such judgment involves
> subjective matters or goes beyond the letter of these requirements.

Again I'm not the reviewer here.

> Tier 3 targets should attempt to implement as much of the standard libraries
> as possible and appropriate (`core` for most targets, `alloc` for targets
> that can support dynamic memory allocation, `std` for targets with an
> operating system or equivalent layer of system-provided functionality), but
> may leave some code unimplemented (either unavailable or stubbed out as
> appropriate), whether because the target makes it impossible to implement or
> challenging to implement. The authors of pull requests are not obligated to
> avoid calling any portions of the standard library on the basis of a tier 3
> target not implementing those portions.
> The target must provide documentation for the Rust community explaining how
> to build for the target, using cross-compilation if possible. If the target
> supports running binaries, or running tests (even if they do not pass), the
> documentation must explain how to run such binaries or tests for the target,
> using emulation if possible or dedicated hardware if necessary.

Building is described in platform support doc, but libstd is not supported now,
I'll implement it later.

> Tier 3 targets must not impose burden on the authors of pull requests, or
> other developers in the community, to maintain the target. In particular,
> do not post comments (automated or manual) on a PR that derail or suggest a
> block on the PR based on a tier 3 target. Do not send automated messages or
> notifications (via any medium, including via `@`) to a PR author or others
> involved with a PR regarding a tier 3 target, unless they have opted into
> such messages.

Understood.

> Backlinks such as those generated by the issue/PR tracker when linking to
> an issue or PR are not considered a violation of this policy, within
> reason. However, such messages (even on a separate repository) must not
> generate notifications to anyone involved with a PR who has not requested
> such notifications.

Understood.

> Patches adding or updating tier 3 targets must not break any existing tier 2
> or tier 1 target, and must not knowingly break another tier 3 target without
> approval of either the compiler team or the maintainers of the other tier 3
> target.

I believe I didn't break any other target.

> In particular, this may come up when working on closely related targets,
> such as variations of the same architecture with different features. Avoid
> introducing unconditional uses of features that another variation of the
> target may not have; use conditional compilation or runtime detection, as
> appropriate, to let each target run code supported by that target.

I think there are no such problems in this PR.

> Tier 3 targets must be able to produce assembly using at least one of
> rustc's supported backends from any host target. (Having support in a fork
> of the backend is not sufficient, it must be upstream.)

Yes, it use standard RISCV or ARM backend to generate assembly.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-07-19 22:00:42 +08:00
Josef Schlehofer
89f3064e34 Add powerpc-unknown-linux-muslspe compile target
This is almost identical to already existing targets:
- powerpc_unknown_linux_musl.rs
- powerpc_unknown_linux_gnuspe.rs

It has support for PowerPC SPE (muslspe), which
can be used with GCC version up to 8. It is useful for Freescale or IBM
cores like e500.

This was verified to be working with OpenWrt build system for CZ.NIC's
Turris 1.x routers, which are using Freescale P2020, e500v2, so add it as
a Tier 3 target.
2024-07-18 23:37:29 +02:00
Augie Fackler
72e22554ca cleanup: remove support for 3DNow! cpu features
In llvm/llvm-project@f0eb5587ce all
support for 3DNow! intrinsics and instructions were removed. Per the commit message
there, only AMD chips between 1998 and 2011 or so actually supported
these instructions, and they were effectively replaced by SSE which was
available on many more chips. I'd be very surprised if anyone had ever
used these from Rust.
2024-07-17 11:45:02 -04:00
liushuyu
01e6e60bf3 rustc_codegen_llvm: properly passing backchain attribute to LLVM ...
... this is a special attribute that was made to be a target-feature in
LLVM 18+, but in all previous versions, this "feature" is a naked
attribute. We will have to handle this situation differently than all
other target-features.
2024-07-17 07:56:00 +08:00
liushuyu
efcf35e524 rustc_target: add known safe s390x target features 2024-07-17 07:53:14 +08:00
bors
adeb79d3f5 Auto merge of #127265 - harmou01:dev/harmou01/target-spec-metadata, r=Nilstrieb
Fill out target-spec metadata for all targets

**What does this PR try to resolve?**

This PR completes the target-spec metadata fields for all targets. This is required for a corresponding Cargo PR which adds a check for whether a target supports building the standard library when the `-Zbuild-std=std` flag is passed ([see this issue](https://github.com/rust-lang/wg-cargo-std-aware/issues/87). This functionality in Cargo is reliant on the output of `--print=target-spec-json`.

**How should we test and review this PR?**

Check that a given target-spec metadata has been updated with:
```
$ ./x.py build library/std
$ build/host/stage1/bin/rustc --print=target-spec-json --target <target_name> -Zunstable-options
```

**Additional Information**

A few things to note:
* Where a targets 'std' or 'host tools' support is listed as '?' in the rust docs, these are left as 'None' with this PR. The corresponding changes in cargo will only reject an attempt to build std if the 'std' field is 'Some(false)'. In the case it is 'None', cargo will continue trying to build
* There's no rush for this to be merged. I understand that the format for this is not finalised yet.
* Related: #120745
2024-07-15 08:37:39 +00:00
sayantn
1fd0311eab Added the xop target feature and xop_target_feature gate 2024-07-12 23:30:22 +05:30
sayantn
ec05c4ea3f Add the feature gate and target-features 2024-07-11 19:00:49 -07:00
Nikita Popov
8a50bcbdce Remove extern "wasm" ABI
Remove the unstable `extern "wasm"` ABI (`wasm_abi` feature tracked
in #83788).

As discussed in https://github.com/rust-lang/rust/pull/127513#issuecomment-2220410679
and following, this ABI is a failed experiment that did not end
up being used for anything. Keeping support for this ABI in LLVM 19
would require us to switch wasm targets to the `experimental-mv`
ABI, which we do not want to do.

It should be noted that `Abi::Wasm` was internally used for two
things: The `-Z wasm-c-abi=legacy` ABI that is still used by
default on some wasm targets, and the `extern "wasm"` ABI. Despite
both being `Abi::Wasm` internally, they were not the same. An
explicit `extern "wasm"` additionally enabled the `+multivalue`
feature.

I've opted to remove `Abi::Wasm` in this patch entirely, instead
of keeping it as an ABI with only internal usage. Both
`-Z wasm-c-abi` variants are now treated as part of the normal
C ABI, just with different different treatment in
adjust_for_foreign_abi.
2024-07-11 12:20:26 +02:00
Harry Moulton
3b14526cea Fill out target-spec metadata for all targets
Complete the metadata fields for all targets. Cargo will depend on this
for checking whether a given target supports building the standard
library.
2024-07-03 10:13:07 +01:00
DianQK
c453dcd62a
Use the aligned size for alloca at args when the pass mode is cast.
The `load` and `store` instructions in LLVM access the aligned size.
2024-07-02 06:33:35 +08:00
John Paul Adrian Glaubitz
e57bbb3779 rustc_target: Build sparc_unknown_linux_gnu with -mcpu=v9 and -m32
The previously -mv8plus parameter is supported by GCC only, so let's
use something that the SPARC backend in LLVM supports as well.
2024-06-24 17:58:21 +02:00
John Paul Adrian Glaubitz
a194f42d21 rustc_target: Rewrite sparc_unknown_linux_gnu spec to use TargetOptions 2024-06-24 17:57:59 +02:00
Matthias Krüger
3108dfaced
Rollup merge of #126849 - workingjubilee:correctly-classify-arm-low-dregs, r=Amanieu
Fix 32-bit Arm reg classes by hierarchically sorting them

We were rejecting legal `asm!` because we were asking for the "greatest" feature that includes a register class, instead of the "least" feature that includes a register class. This was only revealed on certain 32-bit Arm targets because not all have the same register limitations.

This is a somewhat hacky solution, but other solutions would require potentially rearchitecting how the internals of parsing or rejecting register classes work for all targets.

Fixes #126797

r​? ``@Amanieu``
2024-06-24 06:27:16 +02:00
Jubilee Young
7c0b5cf99f compiler: Add FramePointer::ratchet 2024-06-23 00:36:33 -07:00
Jubilee Young
0d8f734172 compiler: Fix arm32 asm issues by hierarchically sorting reg classes 2024-06-22 21:39:58 -07:00
Guillaume Gomez
07e8b3ac01
Rollup merge of #126555 - beetrees:f16-inline-asm-arm, r=Amanieu
Add `f16` inline ASM support for 32-bit ARM

Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).`

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-22 12:57:18 +02:00
Jubilee
e7956cd994
Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu
Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-21 21:02:26 -07:00
beetrees
771e44ebd3
Add f16 inline ASM support for RISC-V 2024-06-21 18:48:20 +01:00