nordic-dev.net/rust
nordic-dev.net/rust
2
0
Fork 0
mirror of https://github.com/rust-lang/rust.git synced 2024-10-31 06:22:00 +00:00
Code Issues Packages Projects Releases Wiki Activity

Vxworks riscv target specs: remove redundant zicsr feature

Browse Source
This commit is contained in:
B I Mohammed Abbas 2024-09-25 09:46:15 +05:30
parent 4957eda2c1
commit 6d229f89ba
2 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
compiler/rustc_target/src/spec/targets/riscv32_wrs_vxworks.rs
View File

@ -1,4 +1,4 @@
use crate::spec::{base, StackProbeType, Target, TargetOptions};
use crate::spec::{StackProbeType, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
cpu: "generic-rv32".into(),
llvm_abiname: "ilp32d".into(),
max_atomic_width: Some(32),
features: "+m,+a,+f,+d,+c,+zicsr".into(),
features: "+m,+a,+f,+d,+c".into(),
stack_probes: StackProbeType::Inline,
..base::vxworks::opts()
},

4
compiler/rustc_target/src/spec/targets/riscv64_wrs_vxworks.rs
View File

@ -1,4 +1,4 @@
use crate::spec::{base, StackProbeType, Target, TargetOptions};
use crate::spec::{StackProbeType, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
cpu: "generic-rv64".into(),
llvm_abiname: "lp64d".into(),
max_atomic_width: Some(64),
features: "+m,+a,+f,+d,+c,+zicsr".into(),
features: "+m,+a,+f,+d,+c".into(),
stack_probes: StackProbeType::Inline,
..base::vxworks::opts()
},