Commit Graph

2148 Commits

Author SHA1 Message Date
Kajetan Puchalski
335f67b652 rustc_target: Add sme-b16b16 as an explicit aarch64 target feature
LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.
2024-10-10 10:24:57 +00:00
Matthias Krüger
e642442f12
Rollup merge of #131424 - workingjubilee:stem-the-tyde-of-glob-imports, r=jieyouxu
compiler: Stop reexporting enum-globs from `rustc_target::abi`

Three enums had **all** their variants glob-exported into a distressingly large amount of the tree. Cease to do that, and also cease to glob import the contents of the module that contained them. Redirect relevant imports to their actual source, the `rustc_abi` crate.

No functional changes.
2024-10-09 20:27:24 +02:00
Jubilee Young
1379ef592a compiler: Factor rustc_target::abi out of cg_llvm 2024-10-08 18:24:56 -07:00
Michael Goulet
17eca60c24 Dont ICE when encountering post-mono layout cycle error 2024-10-08 16:46:16 -04:00
bors
cf24c73141 Auto merge of #126733 - ZhuUx:llvm-19-adapt, r=Zalathar
[Coverage][MCDC] Adapt mcdc to llvm 19

Related issue: #126672

Also finish task 4 at #124144

[llvm #82448](https://github.com/llvm/llvm-project/pull/82448) has introduced some break changes into mcdc, causing incompatibility between llvm 18 and 19. This draft adapts to that change and gives up supporting for llvm-18.
2024-10-08 07:08:41 +00:00
zhuyunxing
6e3e19f714 coverage. Adapt to mcdc mapping formats introduced by llvm 19 2024-10-08 11:15:24 +08:00
zhuyunxing
99bd601df5 coverage. MCDC ConditionId start from 0 to keep with llvm 19 2024-10-08 10:50:18 +08:00
zhuyunxing
911ac56e95 coverage. Disable supporting mcdc on llvm-18 2024-10-08 10:50:18 +08:00
Stuart Cook
4d63896018
Rollup merge of #130824 - Darksonn:fix-function-return, r=wesleywiser
Add missing module flags for `-Zfunction-return=thunk-extern`

This fixes a bug in the `-Zfunction-return=thunk-extern` flag. The flag needs to be passed onto LLVM to ensure that functions such as `asan.module_ctor` and `asan.module_dtor` that are created internally in LLVM have the mitigation applied to them.

This was originally discovered [in the Linux kernel](https://lore.kernel.org/all/CANiq72myZL4_poCMuNFevtpYYc0V0embjSuKb7y=C+m3vVA_8g@mail.gmail.com/).

Original flag PR: #116892
PR for similar issue: #129373
Tracking issue: #116853

cc ``@ojeda``
r? ``@wesleywiser``
2024-10-08 13:19:43 +11:00
Urgau
018ba0528f Use wide pointers consistenly across the compiler 2024-10-04 14:06:48 +02:00
Jacob Kiesel
bb5a8276be add unstable support for outputting file checksums for use in cargo 2024-10-01 21:23:20 -06:00
bors
06bb8364aa Auto merge of #131111 - matthiaskrgr:rollup-n6do187, r=matthiaskrgr
Rollup of 4 pull requests

Successful merges:

 - #130005 (Replace -Z default-hidden-visibility with -Z default-visibility)
 - #130229 (ptr::add/sub: do not claim equivalence with `offset(c as isize)`)
 - #130773 (Update Unicode escapes in `/library/core/src/char/methods.rs`)
 - #130933 (rustdoc: lists items that contain multiple paragraphs are more clear)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-10-01 19:29:26 +00:00
Matthias Krüger
389a399a50
Rollup merge of #130005 - davidlattimore:protected-vis-flag, r=Urgau
Replace -Z default-hidden-visibility with -Z default-visibility

Issue #105518
2024-10-01 21:09:18 +02:00
Guillaume Gomez
344b6a1668
Rollup merge of #130630 - taiki-e:s390x-clobber-abi, r=Amanieu
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly

This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335.

This also supports vector registers (as `vreg`) and access registers (as `areg`) as clobber-only, which need to support clobbering of them to implement clobber_abi.

Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
  - Vector registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L249
  - Access registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L332

I have three questions:
- ~~ELF Application Binary Interface s390x Supplement says that `cc` (condition code, bits 18-19 of PSW) is "Volatile".
  However, we do not have a register class for `cc` and instead mark `cc` as clobbered unless `preserves_flags` is specified (https://github.com/rust-lang/rust/pull/111331).
  Therefore, in the current implementation, if both `preserves_flags` and `clobber_abi` are specified, `cc` is not marked as clobbered. Is this okay? Or even if `preserves_flags` is used, should `cc` be marked as clobbered if `clobber_abi` is used?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- ~~ELF Application Binary Interface s390x Supplement says that `pm` (program mask, bits 20-23 of PSW) is "Cleared".
  There does not appear to be any registers associated with this in either [LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td) or [GCC](33ccc1314d/gcc/config/s390/s390.h (L407-L431)), so at this point I don't see any way other than to just ignore it. Is this okay as-is?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and `reg_addr`, which uses the “a” constraint (https://github.com/rust-lang/rust/pull/119431)...

Note:

- GCC seems to [recognize only `a0` and `a1`](33ccc1314d/gcc/config/s390/s390.h (L428-L429)), and using `a[2-15]` [causes errors](https://godbolt.org/z/a46vx8jjn).
  Given that cg_gcc has a similar problem with other architecture (https://github.com/rust-lang/rustc_codegen_gcc/issues/485), I don't feel this is a blocker for this PR, but it is worth mentioning here.
- `vreg` should be able to accept `#[repr(simd)]` types as input if the `vector` target feature added in https://github.com/rust-lang/rust/pull/127506 is enabled, but core_arch has no s390x vector type and both `#[repr(simd)]` and `core::simd` are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... https://github.com/rust-lang/rust/pull/88245#issuecomment-905559591

cc `@uweigand`

r? `@Amanieu`

`@rustbot` label +O-SystemZ
2024-10-01 17:32:07 +02:00
David Lattimore
f48194ea55 Replace -Z default-hidden-visibility with -Z default-visibility
MCP: https://github.com/rust-lang/compiler-team/issues/782

Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
2024-10-01 22:32:13 +10:00
Trevor Gross
acaa6cee07
Rollup merge of #130877 - taiki-e:riscv-atomic, r=Amanieu
rustc_target: Add RISC-V atomic-related features

This adds the following three target features to unstable riscv_target_feature.

- `zaamo` (Zaamo Extension 1.0.0): Atomic Memory Operations (`amo*.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L229-L231), [available since LLVM 19](8be079cddd))
- `zabha` (Zabha Extension 1.0.0): Byte and Halfword Atomic Memory Operations (`amo*.{b,h}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L238-L240), [available since LLVM 19](6b7444964a))
- `zalrsc` (Zalrsc Extension 1.0.0): Load-Reserved/Store-Conditional Instructions (`lr.{w,d}{,.aq,.rl,.aqrl}` and `sc.{w,d}{,.aq,.rl,.aqrl}`)
  ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L261-L263), [available since LLVM 19](8be079cddd))

(Zacas Extension is not included here because it is still marked as experimental in LLVM 19 70e7d26e56 and will become non-experimental in LLVM 20 614aeda93b)

`a` implies `zaamo` and `zalrsc`, and `zabha` implies `zaamo`:

- After Zaamo and Zalrsc Extensions are frozen, riscv-isa-manual says "The A extension comprises instructions provided by the Zaamo and Zalrsc extensions" (e87412e621), and [`a` implies `zaamo` and `zalrsc` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L44)). However, in LLVM, [`a` does not define them as implying `zaamo` and `zalrsc`](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L206).
- Zabha and Zaamo are in a similar situation, [riscv-isa-manual](https://github.com/riscv/riscv-isa-manual/blob/main/src/zabha.adoc) says "The Zabha extension depends upon the Zaamo standard extension", and [`zabha` implies `zaamo` in GCC](08693e29ec/gcc/config/riscv/arch-canonicalize (L45-L46)), but [does not in LLVM (but enabling `zabha` without `zaamo` or `a` is not allowed)](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/TargetParser/RISCVISAInfo.cpp#L776-L778).

r? `@Amanieu`

`@rustbot` label +O-riscv +A-target-feature
2024-09-30 19:18:49 -04:00
Ralf Jung
a78fd694d4 extend comment in global_llvm_features regarding target-cpu=native handling 2024-09-29 12:16:35 +02:00
Taiki Endo
62612af372 rustc_target: Add RISC-V atomic-related features 2024-09-28 11:26:09 +09:00
Josh Stone
4160a54dc5 Use &raw in the compiler
Like #130865 did for the standard library, we can use `&raw` in the
compiler now that stage0 supports it. Also like the other issue, I did
not make any doc or test changes at this time.
2024-09-26 20:33:26 -07:00
Alice Ryhl
540e41f8b3 Add missing module flags for function-return=thunk-extern 2024-09-25 15:53:53 +02:00
Josh Stone
0999b019f8 Dogfood feature(file_buffered) 2024-09-24 14:25:16 -07:00
bors
4cbfcf1b7f Auto merge of #130389 - Luv-Ray:LLVMMDNodeInContext2, r=nikic
llvm: replace some deprecated functions

`LLVMMDStringInContext` and `LLVMMDNodeInContext` are deprecated, replace them with `LLVMMDStringInContext2` and `LLVMMDNodeInContext2`.
Also replace `Value` with `Metadata` in some function signatures for better consistency.
2024-09-24 12:07:48 +00:00
Michael Goulet
702a644b74 Check vtable projections for validity in miri 2024-09-23 19:38:26 -04:00
Luv-Ray
d7ebf9e541 format 2024-09-23 23:45:13 +08:00
bors
66b0b29e65 Auto merge of #130724 - compiler-errors:bump, r=Mark-Simulacrum
Bump stage0 to beta-2024-09-22 and rustfmt to nightly-2024-09-22

I'm doing this to apply the changes to version sorting (https://github.com/rust-lang/rustfmt/pull/6284) that have occurred since rustfmt last upgraded (and a few other miscellaneous changes, like changes to expression overflowing: https://github.com/rust-lang/rustfmt/pull/6260). Eagerly updating rustfmt and formatting-the-world will ideally move some of the pressure off of the beta bump which will happen at the beginning of the next release cycle.

You can verify this is correct by checking out the changes, reverting the last commit, reapplying them, and diffing the changes:

```
git fetch git@github.com:compiler-errors/rust.git bump
git checkout -b bump FETCH_HEAD
git reset --hard HEAD~5
./x.py fmt --all
git diff FETCH_HEAD
# ignore the changes to stage0, and rustfmt.toml,
# and test file changes in rustdoc-js-std, run-make.
```

Or just take my word for it? Up to the reviewer.

r? release
2024-09-23 02:02:22 +00:00
bors
d14c1c75ab Auto merge of #130680 - saethlin:module-name-to-str, r=jieyouxu
Call module_name_to_str instead of just unwrapping

This makes the ICE message in https://github.com/rust-lang/rust/issues/130678 more clear. It looks like not calling this function was just an oversight in https://github.com/rust-lang/rust/pull/76859, but clearly not a major one because it's taken us 4 years to notice.

try-job: i686-msvc
2024-09-22 23:14:12 +00:00
Michael Goulet
c682aa162b Reformat using the new identifier sorting from rustfmt 2024-09-22 19:11:29 -04:00
Ben Kimock
6419aeb1ec Call module_name_to_str instead of just unwrapping 2024-09-21 18:42:51 -04:00
Folkert
5722a80782 remove #[cmse_nonsecure_entry] 2024-09-21 13:05:21 +02:00
Folkert de Vries
1ddd67a79a add C-cmse-nonsecure-entry ABI 2024-09-21 13:04:14 +02:00
Michael Goulet
914193c8f4 Do not unnecessarily eval consts in codegen 2024-09-20 20:38:11 -04:00
Guillaume Gomez
bf6389f077
Rollup merge of #128209 - beetrees:no-macos-10.10, r=jieyouxu
Remove macOS 10.10 dynamic linker bug workaround

Rust's current minimum macOS version is 10.12, so the hack can be removed. This PR also updates the `remove_dir_all` docs to reflect that all supported macOS versions are protected against TOCTOU race conditions (the fallback implementation was already removed in #127683).

try-job: dist-x86_64-apple
try-job: dist-aarch64-apple
try-job: dist-apple-various
try-job: aarch64-apple
try-job: x86_64-apple-1
2024-09-20 19:46:37 +02:00
Taiki Endo
fa125e2be6 Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly 2024-09-21 01:51:26 +09:00
Luv-Ray
6da2d6e026 MetadataType type cast 2024-09-19 18:56:02 +08:00
Luv-Ray
e2ec83ced9 move place 2024-09-19 18:52:09 +08:00
Luv-Ray
632342a135 wrap LLVMSetMetadata 2024-09-19 18:45:23 +08:00
Nicholas Nethercote
1f359405cb Reformat some comments.
So they are less than 100 chars.
2024-09-19 20:11:28 +10:00
Nicholas Nethercote
5fd16dffdc Merge adjacent unsafe extern "C" blocks. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
c5af8b2722 Avoid heavy repetition in llvm/ffi.rs.
Through judicious use of `use` and `Self`.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
3b071692cb Remove a low-value local variable. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
ccd6c6102d Fix a comment.
I'm pretty sure `CodegenCx` applies to codegen units, rather than
compilation units.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
badd8cc8f4 Reduce visibility. 2024-09-19 20:10:42 +10:00
Nicholas Nethercote
bfef2611d9 Reorder ConstMethods.
It's crazy to have the integer methods in something close to random
order.

The reordering makes the gaps clear: `const_i64`, `const_i128`,
`const_isize`, and `const_u16`. I guess they just aren't needed.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
fda530d729 Streamline hidden visibility setting.
In `get_fn` there is a complicated set of if/elses to determine if
`hidden` visibility should be applied. There are five calls to
`LLVMRustSetVisibility` and some repetition in the comments.

This commit streamlines it a bit:
- Computes `hidden` and then uses it to determine if a single call to
  `LLVMRustSetVisibility` occurs.
- Converts some of the if/elses into boolean expressions.
- Removes the repetitive comments.

Overall this makes it quite a bit shorter, and I find it easier to read.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
eb575506f2 Remove a low-value comment.
We rarely use parameter comments, and these ones don't tell us anything
interesting.
2024-09-19 20:10:42 +10:00
Nicholas Nethercote
4ce010efcf Use a macro to factor out some repetitive code.
Similar to the existing macro just above.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
0d78f1e86b Reduce repetition in target_is_apple. 2024-09-19 20:10:41 +10:00
Nicholas Nethercote
9429e64c24 Streamline report_inline_asm.
By using `use`.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
63210bd68c Rename a parameter.
This seems to be a typo. `singletree` doesn't make sense, and everywhere
else it is `singlethread`.
2024-09-19 20:10:41 +10:00
Nicholas Nethercote
785a26af03 Streamline register methods.
These can be made more concise, mostly through appropriate use of `use`
declarations.
2024-09-19 20:10:41 +10:00