Sebastian Goll
b299266cd2
It is not necessary to enable interrupts before registering waker
2024-03-27 00:32:06 +01:00
Sebastian Goll
2e2986c67b
It is not necessary to wait for SB and MSL sequentially
2024-03-27 00:32:06 +01:00
Sebastian Goll
c1175bf7d8
It is not necessary to wait for STOP to be fully generated
2024-03-27 00:32:06 +01:00
Sebastian Goll
accec7a840
Implement asynchronous transaction for I2C v1
2024-03-27 00:32:06 +01:00
Sebastian Goll
9c00a40e73
Extract frame options generation into iterator to reuse in async
2024-03-26 22:53:14 +01:00
Sebastian Goll
0885c102d3
Refactor async I2C transfers to use frame options
2024-03-26 22:53:14 +01:00
Sebastian Goll
746ded94b1
Fix minor typos
2024-03-26 22:53:14 +01:00
schmettow
82046c4691
Added YLab project to "in the wild"
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YLab uses Embassy
2024-03-26 22:26:44 +01:00
eZio Pan
cf11d28d62
stm32 H5: LSE low drive mode is not functional
2024-03-27 00:55:44 +08:00
Emilie Burgun
1acc34bfaa
Remove the need for TxDma to be a DMA channel in the blocking UartTx impl
2024-03-26 17:45:38 +01:00
Dario Nieuwenhuis
f3a0bcb15e
Merge pull request #2737 from adri326/adri326/add-iosv-option
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Add a config option to make the VDDIO2 supply line valid
2024-03-26 16:29:45 +00:00
Emilie Burgun
402def86ee
Remove ad-hoc fixes for setting the IOSV bit to true
2024-03-26 17:27:02 +01:00
Emilie Burgun
ca998c170f
Missing half of the implementation detail comment
2024-03-26 16:33:41 +01:00
Emilie Burgun
64964bd614
Add a config option to make the VDDIO2 supply line valid
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On STM32L4[7-A]xx, STM32L5xxx and STM32U5xxx chips, the GPIOG[2..15] pins are only available
once the IOSV bit has been set in PWR->CR2 (U5 chips have the bit in a funkier register).
This is meant to allow the user to have control over this power supply, so the GPIOG pins
are initially insulated, until the user wishes to un-insulate them (or something like that?).
For most applications, though, the VDDIO2 is connected to the VDD line, and this behavior only
gets in the way and causes confusing issues.
This submission adds an option in `embassy_stm32::Config`, called `enable_independent_io_supply`,
which simply enables the IOSV bit. It is only available on chips for which I could find a mention
of IOSV (STM32L4 and STM32L5) or IO2SV (STM32U5).
2024-03-26 16:22:05 +01:00
eZio Pan
6b2e15e318
stm32 CORDIC: exclude stm32u5a
2024-03-26 15:06:06 +08:00
Dario Nieuwenhuis
cdd1c671e9
Merge pull request #2707 from barafael/barafael/minor_clippy_lints_rp
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fix minor clippy lints in embassy_rp
2024-03-25 14:31:52 +00:00
Rafael Bachmann
e139a4e076
fix: CI
2024-03-25 15:09:41 +01:00
Rafael Bachmann
cf789be420
Merge branch 'embassy-rs:main' into barafael/minor_clippy_lints_rp
2024-03-25 14:43:18 +01:00
Ulf Lilleengen
133a753e49
Merge pull request #2733 from cumthugo/bootloader-comment
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boot: update comments
2024-03-24 17:43:57 +00:00
Dario Nieuwenhuis
a009275875
Merge pull request #2732 from CBJamo/sharedbus_setconfig
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embassy-embedded-hal: Allow changing Spi/I2cDeviceWithConfig's config at runtime
2024-03-24 11:36:19 +00:00
ZhangYong
9bc00e68fa
update comments
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use 4/5/6 as new firmware for better understanding
2024-03-24 18:25:04 +08:00
Caleb Jamison
8f1bed3d95
Allow changing Spi/I2cDeviceWithConfig's config at runtime
2024-03-23 12:21:13 -04:00
eZio Pan
79eabc95aa
stm32 CORDIC: add g491re back to cordic test
2024-03-23 09:57:29 +08:00
eZio Pan
8fa1d06a6a
stm32 CORDIC: use private_bounds for sealed traits.
2024-03-23 09:15:25 +08:00
eZio Pan
0abcccee96
stm32 CORDIC: re-design API
2024-03-23 09:15:25 +08:00
eZio Pan
83069e7b49
stm32 CORDIC: add example
2024-03-23 09:15:25 +08:00
eZio Pan
441aa4c8ce
stm32 CORDIC: make HIL run
2024-03-23 09:15:25 +08:00
eZio Pan
fac4f9aa2f
stm32 CORDIC: typo fix
2024-03-23 09:15:25 +08:00
eZio Pan
0d065ab2d6
stm32 CORDIC: add HIL test
2024-03-23 09:15:25 +08:00
eZio Pan
c42d9f9eaa
stm32 CORDIC: bug fix
2024-03-23 09:15:25 +08:00
eZio Pan
641da3602e
stm32 CORDIC: error handle
2024-03-23 09:15:25 +08:00
eZio Pan
10a9cce855
stm32 CORDIC: DMA for q1.31 and q1.15
2024-03-23 09:15:25 +08:00
eZio Pan
2fa04d93ed
stm32 CORDIC: DMA for q1.31
2024-03-23 09:15:25 +08:00
eZio Pan
c9f759bb21
stm32 CORDIC: ZeroOverhead for q1.31 and q1.15
2024-03-23 09:15:25 +08:00
eZio Pan
5d12f59430
stm32 CORDIC: make use of "preload" feature
2024-03-23 09:15:25 +08:00
eZio Pan
a1ca9088b4
stm32 CORDIC: ZeroOverhead q1.31 mode
2024-03-23 09:15:25 +08:00
eZio Pan
b595d94244
stm32 CORDIC: split into multiple files
2024-03-23 09:15:25 +08:00
eZio Pan
cf065d439e
stm32 CORDIC: ZeroOverhead q1.31 1 arg 1 res mode
2024-03-23 09:15:25 +08:00
Dario Nieuwenhuis
1171e11655
Merge pull request #2730 from embassy-rs/stm32-sealed
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stm32: use private_bounds for sealed traits.
2024-03-23 01:55:42 +01:00
Dario Nieuwenhuis
2fd6f0e718
Merge pull request #2731 from embassy-rs/sealed4
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use private_bounds for sealed traits.
2024-03-23 01:55:13 +01:00
Dario Nieuwenhuis
4aa4ea99c2
use private_bounds for sealed traits.
2024-03-23 01:45:19 +01:00
Dario Nieuwenhuis
cb1e4e684e
Merge pull request #2729 from adamgreig/usb-no-dd-buf
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usb: remove device_descriptor buffer, store bytes in UsbDevice.inner instead
2024-03-23 00:39:04 +00:00
Dario Nieuwenhuis
2bca875b5f
stm32: use private_bounds for sealed traits.
2024-03-23 01:38:51 +01:00
Dario Nieuwenhuis
389cbc0a77
stm32/timer: simplify traits, convert from trait methods to struct.
2024-03-23 01:37:28 +01:00
Adam Greig
7cf6490fba
usb: remove device_descriptor buffer, store bytes in UsbDevice.inner instead
2024-03-23 00:35:15 +00:00
Dario Nieuwenhuis
c2aa95016a
Merge pull request #2727 from de-vri-es/forward-std-feature-to-critical-section
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Forward the "std" feature to the critical-section crate in embassy-sync.
2024-03-22 11:34:45 +00:00
Maarten de Vries
a85e9c6e68
Forward the "std" feature to the critical-section crate in embassy-sync.
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Otherwise, using embassy-sync in unit tests will result in linker errors
when using the CriticalSectionRawMutex.
2024-03-22 12:29:01 +01:00
Ulf Lilleengen
3668ace35c
Merge pull request #2651 from peterkrull/once_lock
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Add `OnceLock` sync primitive
2024-03-22 08:40:27 +00:00
Dario Nieuwenhuis
7cf5cf4580
Merge pull request #2725 from DeepSOIC/regout0
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nRF52840/config: add dcdc voltage parameter
2024-03-21 23:01:45 +00:00
DeepSOIC
10597e3b4d
nRF52840/config: add dcdc voltage parameter
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address #2700
2024-03-21 23:56:35 +01:00