Caleb Garrett
6e9e8eeb5f
Refactored cryp din/dout into functions.
2024-03-11 11:08:02 -04:00
Caleb Garrett
4a5b6e05fb
Correct more CI build issues.
2024-03-10 17:33:40 -04:00
Caleb Garrett
50a7ada0bb
Fixed DMA CI build issues.
2024-03-10 17:28:53 -04:00
Caleb Garrett
e92094986d
Add DMA request priority as transfer option.
2024-03-10 16:53:37 -04:00
Adam Greig
b456addb2b
stm32: bump metapac version
2024-03-09 20:13:20 +00:00
Dominic
71179fa818
Check for CPU_FREQ_BOOST
2024-03-09 11:55:09 +01:00
Dominic
fadffc5061
Fix incorrect D1CPRE max for STM32H7 RM0468
2024-03-09 11:55:09 +01:00
Ralf
b7bb4b23f8
STM32 SimplePwm: Fix regression and re-enable output pin
...
PR #2499 implemented timer hierarchy, but removed enable_outputs()
from trait CaptureCompare16bitInstance and from SimplePwm.
This functions is required for advanced timers to set bit BDTR.MOE
and to enable the output signal.
2024-03-08 11:18:45 +01:00
Dario Nieuwenhuis
b2d236ee39
Merge pull request #2667 from timokroeger/stm32-anychannel-fix
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stm32: Implement `Channel` trait for `AnyChannel`
2024-03-07 15:18:32 +00:00
Tomas Barton
bb3711bbf9
update stm32c0 HSI frequency
2024-03-07 06:51:32 -08:00
Timo Kröger
bbc06458a3
stm32: Implement Channel trait for AnyChannel
2024-03-07 15:05:28 +01:00
Torin Cooper-Bennun
e0018c6f4f
stm32: can:fd: merge read impls; buffered RX returns Result<_, BusError>
2024-03-04 12:38:46 +00:00
Torin Cooper-Bennun
72c6cdc5d5
stm32: can: fd: rename TxBufferMode::Queue -> ::Priority for clarity
2024-03-04 12:22:18 +00:00
Dario Nieuwenhuis
ae266f3bf5
stm32/rcc: port c0 to new api. Add c0 HSIKER/HSISYS support.
2024-03-04 00:08:14 +01:00
Dario Nieuwenhuis
c8c4b0b701
stm32/rcc: port g0 to new api.
2024-03-04 00:04:06 +01:00
Dario Nieuwenhuis
b4567bb8c5
stm32/rcc: g4: consistent PllSource, add pll pqr limits, simplify a bit.
2024-03-04 00:04:06 +01:00
Corey Schuhen
b693ab9b34
Restore init order to restore H7.
...
Previous commit broke H7 support in HIL farm. Restore previous order by moving a bunch of config from new and into_config_mode to apply_config.
This is a cleanup that I had considered to move more register access into peripheral.rs.
2024-03-02 14:18:12 +10:00
Corey Schuhen
bf06d10534
Delay setting TX buffer mode until user had a chance to configure it.
2024-03-02 14:00:56 +10:00
Torin Cooper-Bennun
9e403fa89a
stm32: can: fd: rename abort_pending_mailbox, rm pub qualifier
2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
befbb2845a
stm32: can: fd: write: if in TX FIFO mode & bufs full, then abort
2024-03-02 10:08:20 +10:00
Torin Cooper-Bennun
30606f9782
stm32: can: fd: allow TX buffers in FIFO mode
2024-03-02 10:08:20 +10:00
Dario Nieuwenhuis
3fe907b54d
Merge pull request #2646 from cschuhen/feature/wake_tx_on_buffered_push
...
Give CAN a kick when writing into TX buffer via sender.
2024-03-01 23:15:42 +00:00
Corey Schuhen
df8f508ffa
Writing to TX buffer also needs to fire an interrupt to kick off transmission if it is idle.
...
Formatting
2024-03-02 09:09:27 +10:00
Dario Nieuwenhuis
95234cddba
stm32: autogenerate mux config for all chips.
2024-03-01 23:54:37 +01:00
Dario Nieuwenhuis
d5c9c611fa
Merge pull request #2619 from caleb-garrett/cryp
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STM32 Crypto Accelerator
2024-03-01 19:35:57 +00:00
Siebe Claes
96af20cf5b
stm32: can: fd: Fix Frame is_extended() function
2024-03-01 19:21:01 +01:00
Caleb Garrett
c9cca3c007
Fix H7 CRYP operation.
2024-02-29 19:09:44 -05:00
Caleb Garrett
998532c33e
Merge branch 'embassy-rs:main' into cryp
2024-02-29 15:21:06 -05:00
Dario Nieuwenhuis
263d1b024c
Merge pull request #2637 from cschuhen/feature/fix_buf_size
...
Buffer is not big enough for FD frames.
2024-02-28 17:33:58 +00:00
eZio Pan
47c579eba2
update metapac
2024-02-29 00:11:40 +08:00
Corey Schuhen
1353a343b8
Buffer is not big enough for FD frames.
2024-02-28 18:03:53 +10:00
Dario Nieuwenhuis
5ced938184
Merge pull request #2634 from maiaherringfish/stm32h7-fdcansel-fix
...
adding FDCANSEL logic for STM32H7x
2024-02-28 00:54:43 +00:00
Torin Cooper-Bennun
a8da42943f
stm32: can: fd: rm some irrelevant commented code and dead code
2024-02-27 23:47:41 +00:00
Torin Cooper-Bennun
0ed402fd79
stm32: can: fd: refactor out some duplicate code
2024-02-27 23:47:25 +00:00
Maia
b7e0964a07
added FDCANSEL logic for H7
2024-02-27 11:07:05 -08:00
Dario Nieuwenhuis
62c5df7e5b
Merge pull request #2631 from MaxiluxSystems/small-fdcan-fixes
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stm32: can: fd: fix SID read/write and BRS setting for TX
2024-02-27 12:19:03 +00:00
Torin Cooper-Bennun
9a4f58fe15
stm32: can: fd: only TX with BRS if also TXing with FDF
2024-02-27 10:38:40 +00:00
Torin Cooper-Bennun
e63b0d7a2f
stm32: can: fd: fix SID read/write from buf elems
2024-02-27 10:38:07 +00:00
eZio Pan
bf44adc4bc
allow higher psc value for iwdg_v3
2024-02-27 14:20:58 +08:00
Dario Nieuwenhuis
d5a2b3be58
Merge pull request #2614 from MaxiluxSystems/time_driver_tim1
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stm32: time_driver: allow use of TIM1 for driver
2024-02-26 12:08:32 +00:00
Torin Cooper-Bennun
5c45723777
stm32: timers: use TIMx_CC interrupt source for advanced timers
...
fixes (hopefully) time driver when using TIM1/8/20
2024-02-26 10:03:51 +00:00
Caleb Garrett
29d0d80808
Merge branch 'main' into cryp
2024-02-25 21:21:21 -05:00
Dario Nieuwenhuis
c83ab20526
stm32: update metapac.
2024-02-26 03:02:58 +01:00
Dario Nieuwenhuis
72c6f9a101
stm32/adc: reexport enums from PAC to avoid boilerplate hell.
2024-02-26 03:02:58 +01:00
Caleb Garrett
d9c0da8102
Update metapac to address CI build issue.
2024-02-25 20:59:07 -05:00
Caleb Garrett
236fc6f650
Add CRYP test.
2024-02-25 20:59:07 -05:00
Caleb Garrett
f352b6d68b
Address CI build issues.
2024-02-25 20:59:07 -05:00
Caleb Garrett
25ec838af5
Correct AAD ingest.
2024-02-25 20:59:07 -05:00
Caleb Garrett
967b4927b0
Correct tag generation.
2024-02-25 20:59:07 -05:00
Caleb Garrett
cbca3a5c9f
Support v1 and v2 cryp variants.
2024-02-25 20:59:07 -05:00
