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Merge pull request #3511 from elagil/chore_upgrade_stm32_metapac
Upgrade STM32 metapac
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commit
7a2f8399d3
@ -72,7 +72,7 @@ rand_core = "0.6.3"
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sdio-host = "0.5.0"
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critical-section = "1.1"
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#stm32-metapac = { version = "15" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9b7414490b10ffbd5beb1b0dcf14adb018cbe37f" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7bb5f235587c3a6886a7be1c8f58fdf22c5257f3" }
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vcell = "0.1.3"
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nb = "1.0.0"
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@ -101,7 +101,7 @@ proc-macro2 = "1.0.36"
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quote = "1.0.15"
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#stm32-metapac = { version = "15", default-features = false, features = ["metadata"]}
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9b7414490b10ffbd5beb1b0dcf14adb018cbe37f", default-features = false, features = ["metadata"] }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-7bb5f235587c3a6886a7be1c8f58fdf22c5257f3", default-features = false, features = ["metadata"] }
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[features]
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default = ["rt"]
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@ -279,8 +279,10 @@ pub(crate) unsafe fn init(config: Config) {
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hsi48: hsi48,
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rtc: rtc,
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hse: hse,
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hse_div_2: hse.map(|clk| clk / 2u32),
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hsi: hsi,
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pll1_p: pll1.p,
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pll1_p_div_2: pll1.p.map(|clk| clk / 2u32),
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pll1_q: pll1.q,
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pll1_r: pll1.r,
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pll2_p: pll2.p,
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