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stm32: Only check errors on running RingBufferedUartRx, reduce number of small one-time functions
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@ -71,33 +71,18 @@ impl<'d> UartRx<'d, Async> {
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}
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}
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impl<'d> RingBufferedUartRx<'d> {
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impl<'d> RingBufferedUartRx<'d> {
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/// Clear the ring buffer and start receiving in the background
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pub fn start(&mut self) -> Result<(), Error> {
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// Clear the ring buffer so that it is ready to receive data
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self.ring_buf.clear();
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self.setup_uart();
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Ok(())
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}
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fn stop(&mut self, err: Error) -> Result<usize, Error> {
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self.teardown_uart();
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Err(err)
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}
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/// Reconfigure the driver
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/// Reconfigure the driver
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pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> {
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pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError> {
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reconfigure(self.info, self.kernel_clock, config)
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reconfigure(self.info, self.kernel_clock, config)
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}
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}
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/// Start uart background receive
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/// Configure and start the DMA backed UART receiver
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fn setup_uart(&mut self) {
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///
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// fence before starting DMA.
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/// Note: This is also done automatically by [`read()`] if required.
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pub fn start_uart(&mut self) {
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// Clear the buffer so that it is ready to receive data
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self.ring_buf.clear();
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compiler_fence(Ordering::SeqCst);
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compiler_fence(Ordering::SeqCst);
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// start the dma controller
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self.ring_buf.start();
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self.ring_buf.start();
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let r = self.info.regs;
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let r = self.info.regs;
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@ -118,8 +103,8 @@ impl<'d> RingBufferedUartRx<'d> {
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});
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});
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}
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}
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/// Stop uart background receive
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/// Stop DMA backed UART receiver
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fn teardown_uart(&mut self) {
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fn stop_uart(&mut self) {
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self.ring_buf.request_pause();
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self.ring_buf.request_pause();
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let r = self.info.regs;
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let r = self.info.regs;
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@ -153,13 +138,15 @@ impl<'d> RingBufferedUartRx<'d> {
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pub async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Error> {
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pub async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Error> {
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let r = self.info.regs;
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let r = self.info.regs;
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// Start background receive if it was not already started
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// Start DMA and Uart if it was not already started,
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// otherwise check for errors in status register.
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let sr = clear_idle_flag(r);
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if !r.cr3().read().dmar() {
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if !r.cr3().read().dmar() {
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self.start()?;
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self.start_uart();
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} else {
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check_for_errors(sr)?;
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}
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}
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check_for_errors(clear_idle_flag(r))?;
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loop {
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loop {
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match self.ring_buf.read(buf) {
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match self.ring_buf.read(buf) {
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Ok((0, _)) => {}
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Ok((0, _)) => {}
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@ -167,14 +154,16 @@ impl<'d> RingBufferedUartRx<'d> {
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return Ok(len);
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return Ok(len);
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}
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}
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Err(_) => {
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Err(_) => {
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return self.stop(Error::Overrun);
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self.stop_uart();
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return Err(Error::Overrun);
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}
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}
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}
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}
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match self.wait_for_data_or_idle().await {
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match self.wait_for_data_or_idle().await {
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Ok(_) => {}
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Ok(_) => {}
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Err(err) => {
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Err(err) => {
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return self.stop(err);
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self.stop_uart();
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return Err(err);
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}
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}
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}
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}
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}
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}
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@ -228,7 +217,7 @@ impl<'d> RingBufferedUartRx<'d> {
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impl Drop for RingBufferedUartRx<'_> {
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impl Drop for RingBufferedUartRx<'_> {
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fn drop(&mut self) {
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fn drop(&mut self) {
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self.teardown_uart();
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self.stop_uart();
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self.rx.as_ref().map(|x| x.set_as_disconnected());
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self.rx.as_ref().map(|x| x.set_as_disconnected());
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self.rts.as_ref().map(|x| x.set_as_disconnected());
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self.rts.as_ref().map(|x| x.set_as_disconnected());
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super::drop_tx_rx(self.info, self.state);
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super::drop_tx_rx(self.info, self.state);
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