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Update CFBLR configuration

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As per section "43.7.23 LTDC layer x color frame buffer length register (LTDC_LxCFBLR)" of Reference manual for STM32U5 RM0456, CFBLL has to be set to the length of one pixel line plus 3 (instead of plus 7 as for H7)
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William 2024-10-25 15:03:26 +02:00
parent 8803128707
commit 45e7a7a55a
1 changed files with 3 additions and 0 deletions
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embassy-stm32/src/ltdc.rs
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@ -395,7 +395,10 @@ impl<'d, T: Instance> Ltdc<'d, T> {
// framebuffer pitch and line length
layer.cfblr().modify(|w| {
w.set_cfbp(width * bytes_per_pixel);
#[cfg(not(stm32u5))]
w.set_cfbll(width * bytes_per_pixel + 7);
#[cfg(stm32u5)]
w.set_cfbll(width * bytes_per_pixel + 3);
});
// framebuffer line number