From 45e7a7a55aa6b5b8d41d81949b75b1b4a154f9bd Mon Sep 17 00:00:00 2001
From: William <174336620+williams-one@users.noreply.github.com>
Date: Fri, 25 Oct 2024 15:03:26 +0200
Subject: [PATCH] Update CFBLR configuration

As per section "43.7.23 LTDC layer x color frame buffer length register (LTDC_LxCFBLR)" of Reference manual for STM32U5 RM0456, CFBLL has to be set to the length of one pixel line plus 3 (instead of plus 7 as for H7)
---
 embassy-stm32/src/ltdc.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/embassy-stm32/src/ltdc.rs b/embassy-stm32/src/ltdc.rs
index 4c5239971..e25c4f3fb 100644
--- a/embassy-stm32/src/ltdc.rs
+++ b/embassy-stm32/src/ltdc.rs
@@ -395,7 +395,10 @@ impl<'d, T: Instance> Ltdc<'d, T> {
         // framebuffer pitch and line length
         layer.cfblr().modify(|w| {
             w.set_cfbp(width * bytes_per_pixel);
+            #[cfg(not(stm32u5))]
             w.set_cfbll(width * bytes_per_pixel + 7);
+            #[cfg(stm32u5)]
+            w.set_cfbll(width * bytes_per_pixel + 3);
         });
 
         // framebuffer line number