diff --git a/wgpu-core/src/binding_model.rs b/wgpu-core/src/binding_model.rs index bcf6f0e24..60bfcd4b3 100644 --- a/wgpu-core/src/binding_model.rs +++ b/wgpu-core/src/binding_model.rs @@ -999,8 +999,6 @@ crate::impl_trackable!(BindGroup); #[derive(Clone, Debug, Error)] #[non_exhaustive] pub enum GetBindGroupLayoutError { - #[error("Pipeline is invalid")] - InvalidPipeline, #[error("Invalid group index {0}")] InvalidGroupIndex(u32), #[error(transparent)] diff --git a/wgpu-core/src/command/bundle.rs b/wgpu-core/src/command/bundle.rs index 62969cbe2..0758eec78 100644 --- a/wgpu-core/src/command/bundle.rs +++ b/wgpu-core/src/command/bundle.rs @@ -631,15 +631,13 @@ fn set_bind_group( fn set_pipeline( state: &mut State, - pipeline_guard: &crate::storage::Storage>, + pipeline_guard: &crate::storage::Storage>, context: &RenderPassContext, is_depth_read_only: bool, is_stencil_read_only: bool, pipeline_id: id::Id, ) -> Result<(), RenderBundleErrorInner> { - let pipeline = pipeline_guard - .get_owned(pipeline_id) - .map_err(|_| RenderCommandError::InvalidPipelineId(pipeline_id))?; + let pipeline = pipeline_guard.strict_get(pipeline_id).get()?; pipeline.same_device(&state.device)?; diff --git a/wgpu-core/src/command/draw.rs b/wgpu-core/src/command/draw.rs index 6b70f5f8e..779bbb7c9 100644 --- a/wgpu-core/src/command/draw.rs +++ b/wgpu-core/src/command/draw.rs @@ -76,8 +76,6 @@ pub enum RenderCommandError { VertexBufferIndexOutOfRange { index: u32, max: u32 }, #[error("Dynamic buffer offset {0} does not respect device's requested `{1}` limit {2}")] UnalignedBufferOffset(u64, &'static str, u32), - #[error("RenderPipelineId {0:?} is invalid")] - InvalidPipelineId(id::RenderPipelineId), #[error("Render pipeline targets are incompatible with render pass")] IncompatiblePipelineTargets(#[from] crate::device::RenderPassCompatibilityError), #[error("{0} writes to depth, while the pass has read-only depth access")] diff --git a/wgpu-core/src/command/render.rs b/wgpu-core/src/command/render.rs index 6dea322f7..ec9867e16 100644 --- a/wgpu-core/src/command/render.rs +++ b/wgpu-core/src/command/render.rs @@ -583,8 +583,6 @@ pub enum RenderPassErrorInner { InvalidParentEncoder, #[error("The format of the depth-stencil attachment ({0:?}) is not a depth-stencil format")] InvalidDepthStencilAttachmentFormat(wgt::TextureFormat), - #[error("Render pipeline {0:?} is invalid")] - InvalidPipeline(id::RenderPipelineId), #[error("Render bundle {0:?} is invalid")] InvalidRenderBundle(id::RenderBundleId), #[error("The format of the {location} ({format:?}) is not resolvable")] @@ -2847,8 +2845,8 @@ impl Global { let hub = &self.hub; let pipeline = hub .render_pipelines - .get(pipeline_id) - .map_err(|_| RenderPassErrorInner::InvalidPipeline(pipeline_id)) + .strict_get(pipeline_id) + .get() .map_pass_err(scope)?; base.commands.push(ArcRenderCommand::SetPipeline(pipeline)); diff --git a/wgpu-core/src/command/render_command.rs b/wgpu-core/src/command/render_command.rs index 447debd65..0754e30a7 100644 --- a/wgpu-core/src/command/render_command.rs +++ b/wgpu-core/src/command/render_command.rs @@ -171,12 +171,12 @@ impl RenderCommand { } RenderCommand::SetPipeline(pipeline_id) => ArcRenderCommand::SetPipeline( - pipelines_guard - .get_owned(pipeline_id) - .map_err(|_| RenderPassError { + pipelines_guard.strict_get(pipeline_id).get().map_err(|e| { + RenderPassError { scope: PassErrorScope::SetPipelineRender, - inner: RenderCommandError::InvalidPipelineId(pipeline_id).into(), - })?, + inner: e.into(), + } + })?, ), RenderCommand::SetPushConstant { diff --git a/wgpu-core/src/device/global.rs b/wgpu-core/src/device/global.rs index 0a0381a92..c378f0413 100644 --- a/wgpu-core/src/device/global.rs +++ b/wgpu-core/src/device/global.rs @@ -1348,13 +1348,13 @@ impl Global { } } - let id = fid.assign(pipeline); + let id = fid.assign(Fallible::Valid(pipeline)); api_log!("Device::create_render_pipeline -> {id:?}"); return (id, None); }; - let id = fid.assign_error(); + let id = fid.assign(Fallible::Invalid(Arc::new(desc.label.to_string()))); // We also need to assign errors to the implicit pipeline layout and the // implicit bind group layouts. @@ -1386,9 +1386,9 @@ impl Global { let hub = &self.hub; let error = 'error: { - let pipeline = match hub.render_pipelines.get(pipeline_id) { + let pipeline = match hub.render_pipelines.strict_get(pipeline_id).get() { Ok(pipeline) => pipeline, - Err(_) => break 'error binding_model::GetBindGroupLayoutError::InvalidPipeline, + Err(e) => break 'error e.into(), }; let id = match pipeline.layout.bind_group_layouts.get(index as usize) { Some(bg) => hub @@ -1415,9 +1415,11 @@ impl Global { let hub = &self.hub; - if let Some(_pipeline) = hub.render_pipelines.unregister(render_pipeline_id) { - #[cfg(feature = "trace")] - if let Some(t) = _pipeline.device.trace.lock().as_mut() { + let _pipeline = hub.render_pipelines.strict_unregister(render_pipeline_id); + + #[cfg(feature = "trace")] + if let Ok(pipeline) = _pipeline.get() { + if let Some(t) = pipeline.device.trace.lock().as_mut() { t.add(trace::Action::DestroyRenderPipeline(render_pipeline_id)); } } diff --git a/wgpu-core/src/hub.rs b/wgpu-core/src/hub.rs index 0c731a05c..db7a6c175 100644 --- a/wgpu-core/src/hub.rs +++ b/wgpu-core/src/hub.rs @@ -171,7 +171,7 @@ pub struct Hub { pub(crate) bind_groups: Registry>, pub(crate) command_buffers: Registry>, pub(crate) render_bundles: Registry>, - pub(crate) render_pipelines: Registry>, + pub(crate) render_pipelines: Registry>, pub(crate) compute_pipelines: Registry>, pub(crate) pipeline_caches: Registry>, pub(crate) query_sets: Registry>,