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![]() rustc_target: RISC-V: add base `I`-related important extensions Of ratified RISC-V features defined, this commit adds extensions satisfying following criteria: * Formerly a part of the `I` extension and splitted thereafter (now ratified as `I` + `Zifencei` + `Zicsr` + `Zicntr` + `Zihpm`) or * Dicoverable from newer versions of the Linux kernel and implemented as a part of `std_detect`'s feature (`Zihintpause`) and * Available on LLVM 18. This is based on [the latest ratified ISA Manuals (version 20240411)](https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154769/RISC-V+Technical+Specifications). LLVM Definitions: * [`Zifencei`](https://github.com/llvm/llvm-project/blob/llvmorg-20.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L133-L137) * [`Zicsr`](https://github.com/llvm/llvm-project/blob/llvmorg-20.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L116-L120) * [`Zicntr`](https://github.com/llvm/llvm-project/blob/llvmorg-20.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L122-L124) * [`Zihpm`](https://github.com/llvm/llvm-project/blob/llvmorg-20.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L153-L155) * [`Zihintpause`](https://github.com/llvm/llvm-project/blob/llvmorg-20.1.0/llvm/lib/Target/RISCV/RISCVFeatures.td#L139-L144) Additional (1): One of those, `Zicsr`, is a dependency of many other ISA extensions and this commit adds correct dependencies to `Zicsr`. Additional (2): In RISC-V, `G` is an abbreviation of following extensions: * `I` * `M` * `A` * `F` * `D` * `Zicsr` (although implied by `F`) * `Zifencei` and all RISC-V targets with the `G` abbreviation and targets for Android / VxWorks are updated accordingly. Note: Android will require RVA22 (likely RVA22U64) and some more extensions, which is a superset of RV64GC. For VxWorks, all BSPs currently distributed by Wind River are for boards with RV64GC (this commit also updates `riscv32-wrs-vxworks` though). -------- This is the version 4. `Ztso` in the original proposal is removed on the PR version 2 due to the minimum LLVM version (non-experimental `Ztso` requires LLVM 19 while minimum LLVM version of Rust is 18). This is not back in PR version 3 and 4 after noticing adding `Ztso` is possible by checking host LLVM version because PR version 3 introduces compiler target changes (and adding more extensions would complicate the problems; sorry `Zihintpause`). Version 4: * Fixed some commit messages, * Added Android / VxWorks targets to imply `G` and * Added an implication from `Zve32x` to `Zicsr` (which makes all vector extension subsets to imply `Zicsr`) since #138742 is now merged. Related: * #44839 (`riscv_target_feature`) * #114544 (This PR can be a prerequisite of resolving a part of that tracking issue) * #138742 (Touches the same place and vector extensions depend on `Zicsr`) NOT Related but linked: * #132618 (This PR won't be blocked by this issue since none of those extensions do not change the ABI) `@rustbot` r? `@Amanieu` `@rustbot` label +T-compiler +O-riscv +A-target-feature |
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README.md |
rustc_target
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