Johnathan Van Why fd21eb18e9 32-bit ARM: Emit lr instead of r14 when specified as an asm! output register. ... On 32-bit ARM platforms, the register `r14` has the alias `lr`. When used as an output register in `asm!`, rustc canonicalizes the name to `r14`. LLVM only knows the register by the name `lr`, and rejects it. This changes rustc's LLVM code generation to output `lr` instead.		2021-02-14 23:41:10 -08:00
..
back	HWASan support	2021-02-07 23:48:58 -08:00
coverageinfo	remove redundant closures (clippy::redundant_closure)	2021-01-03 13:34:24 +01:00
debuginfo	Rollup merge of #79570 - alexcrichton:split-debuginfo, r=bjorn3	2021-01-29 09:17:20 +09:00
llvm	HWASan support	2021-02-07 23:48:58 -08:00
abi.rs	Add a new ABI to support cmse_nonsecure_call	2021-02-02 13:04:31 +00:00
allocator.rs	Collapse all uses of target.options.foo into target.foo	2020-11-08 17:29:13 +03:00
asm.rs	32-bit ARM: Emit lr instead of r14 when specified as an asm! output register.	2021-02-14 23:41:10 -08:00
attributes.rs	HWASan support	2021-02-07 23:48:58 -08:00
base.rs	Update and improve rustc_codegen_{llvm,ssa} docs	2020-12-22 19:42:23 -08:00
builder.rs	Use ty::{IntTy,UintTy,FloatTy} in rustc	2021-01-18 21:09:30 +01:00
callee.rs	rustc_target: Rename some target options to avoid tautology	2020-11-08 17:29:13 +03:00
common.rs	Update and improve rustc_codegen_{llvm,ssa} docs	2020-12-22 19:42:23 -08:00
consts.rs	Use is_local instead of as_local	2021-02-04 11:17:01 +01:00
context.rs	Auto merge of #80652 - calebzulawski:simd-lanes, r=nagisa	2021-02-07 22:25:14 +00:00
declare.rs	Make declare_cfn more flexible	2021-01-23 17:19:49 -05:00
intrinsic.rs	Make declare_cfn more flexible	2021-01-23 17:19:49 -05:00
lib.rs	rustc: Stabilize -Zrun-dsymutil as -Csplit-debuginfo	2021-01-28 08:51:11 -08:00
llvm_util.rs	Rollup merge of #81095 - LingMan:unwrap, r=oli-obk	2021-01-17 12:24:59 +00:00
metadata.rs	Collapse all uses of target.options.foo into target.foo	2020-11-08 17:29:13 +03:00
mono_item.rs	mv compiler to compiler/	2020-08-30 18:45:07 +03:00
type_.rs	Use ty::{IntTy,UintTy,FloatTy} in rustc	2021-01-18 21:09:30 +01:00
type_of.rs	Revert "cg_llvm: fewer_names in uncached_llvm_type"	2020-12-17 16:40:47 +00:00
va_arg.rs	Add big-endian support for AArch64 va_arg	2021-01-27 22:47:56 +00:00
value.rs	mv compiler to compiler/	2020-08-30 18:45:07 +03:00