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rust/compiler/rustc_target
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Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu 
Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-21 21:02:26 -07:00
..
src Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu 2024-06-21 21:02:26 -07:00
Cargo.toml Update to bitflags 2 in the compiler 2023-12-30 18:17:28 +01:00
README.md Fix outdated crate names in compiler docs 2021-04-08 11:12:14 -05:00

README.md

rustc_target contains some very low-level details that are specific to different compilation targets and so forth.

For more information about how rustc works, see the rustc dev guide.