rust/compiler/rustc_codegen_ssa/src
bors c90eb4825a Auto merge of #108282 - cjgillot:mir-checked-sh, r=tmiasko
Implement checked Shl/Shr at MIR building.

This does not require any special handling by codegen backends,
as the overflow behaviour is entirely determined by the rhs (shift amount).

This allows MIR ConstProp to remove the overflow check for constant shifts.

~There is an existing different behaviour between cg_llvm and cg_clif (cc `@bjorn3).`
I took cg_llvm's one as reference: overflow if `rhs < 0 || rhs > number_of_bits_in_lhs_ty`.~

EDIT: `cg_llvm` and `cg_clif` implement the overflow check differently. This PR uses `cg_llvm`'s implementation based on a `BitAnd` instead of `cg_clif`'s one based on an unsigned comparison.
2023-03-15 21:31:06 +00:00
..
back Don't export of __rust_* alloc symbols if not codegened 2023-03-09 19:21:44 -05:00
coverageinfo Remove in_band_lifetimes from rustc_codegen_ssa 2021-12-15 00:41:41 -05:00
debuginfo s/eval_usize/eval_target_usize/ for clarity 2023-02-14 08:51:19 +00:00
mir Auto merge of #108282 - cjgillot:mir-checked-sh, r=tmiasko 2023-03-15 21:31:06 +00:00
traits various: translation resources from cg backend 2023-02-22 09:15:54 +00:00
base.rs Don't export of __rust_* alloc symbols if not codegened 2023-03-09 19:21:44 -05:00
codegen_attrs.rs Rollup merge of #109088 - Nilstrieb:target-feature-on-statics-when, r=compiler-errors 2023-03-13 21:55:39 +01:00
common.rs DELETE - fn span_invalid_monomorphization_error and localize intrinsics macros 2022-12-27 20:59:22 -05:00
errors.rs errors: generate typed identifiers in each crate 2023-02-22 09:15:53 +00:00
glue.rs Add 0..=isize::MAX range metadata to size loads from vtables 2022-12-08 01:30:07 -05:00
lib.rs Simplify message paths 2023-03-11 22:51:57 +01:00
meth.rs rustc: Remove needless lifetimes 2022-12-20 22:10:40 +01:00
mono_item.rs Store a LocalDefId in hir::AnonConst. 2022-11-13 14:06:11 +00:00
target_features.rs Auto merge of #109001 - matthiaskrgr:rollup-a3agnwp, r=matthiaskrgr 2023-03-11 07:28:44 +00:00