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rust/compiler/rustc_codegen_llvm
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Matthias Krüger 12c102ec53
Rollup merge of #119431 - taiki-e:asm-s390x-reg-addr, r=Amanieu 
Support reg_addr register class in s390x inline assembly

In s390x, `r0` cannot be used as an address register (it is evaluated as zero in an address context).

Therefore, currently, in assemblies involving memory accesses, `r0` must be [marked as clobbered](1a1155653a/src/arch/s390x.rs (L58)) or [explicitly used to a non-address](1a1155653a/src/arch/s390x.rs (L135)) or explicitly use an address register to prevent `r0` from being allocated to a register for the address.

This patch adds a register class for allocating general-purpose registers, except `r0`, to make it easier to use address registers. (powerpc already has a register class (reg_nonzero) for a similar purpose.)

This is identical to the `a` constraint in LLVM and GCC:

https://llvm.org/docs/LangRef.html#supported-constraint-code-list
> a: A 32, 64, or 128-bit integer address register (excludes R0, which in an address context evaluates as zero).

https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
> a
> Address register (general purpose register except r0)

cc ``@uweigand``

r? ``@Amanieu``
2024-01-04 15:33:59 +01:00
..
src Rollup merge of #119431 - taiki-e:asm-s390x-reg-addr, r=Amanieu 2024-01-04 15:33:59 +01:00
Cargo.toml Update to bitflags 2 in the compiler 2023-12-30 18:17:28 +01:00
messages.ftl warn when using an unstable feature with -Ctarget-feature 2023-11-06 09:44:00 +01:00
README.md mv compiler to compiler/ 2020-08-30 18:45:07 +03:00

README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.