rust/compiler/rustc_codegen_cranelift/src/intrinsics
2023-09-14 07:27:30 +02:00
..
cpuid.rs Merge commit 'e9d1a0a7b0b28dd422f1a790ccde532acafbf193' into sync_cg_clif-2022-08-24 2022-08-24 18:40:58 +02:00
llvm_aarch64.rs refactor(rustc_middle): Substs -> GenericArg 2023-07-14 13:27:35 +01:00
llvm_x86.rs Remove special handling in codegen for some AVX and SSE2 shift by immediate intrinsics 2023-09-05 20:17:01 +02:00
llvm.rs refactor(rustc_middle): Substs -> GenericArg 2023-07-14 13:27:35 +01:00
mod.rs Apply suggestions from code review 2023-08-06 15:47:40 -07:00
simd.rs cleanup op_to_const a bit; rename ConstValue::ByRef → Indirect 2023-09-14 07:27:30 +02:00