rust/compiler/rustc_target
Simon Sapin 20bd0c3771 Re-enable atomic loads and stores for all RISC-V targets
This roughly reverts PR https://github.com/rust-lang/rust/pull/66548

Atomic "CAS" are still disabled for targets without the
*“A” Standard Extension for Atomic Instructions*.
However this extension only adds instructions for operations more complex
than simple loads and stores, which are always atomic when aligned.

In the [Unprivileged Spec v. 20191213](https://riscv.org/technical/specifications/)
section 2.6 *Load and Store Instructions* of
chapter 2 *RV32I Base Integer Instruction Set* (emphasis mine):

> Even when misaligned loads and stores complete successfully,
> these accesses might run extremely slowly depending on the implementation
> (e.g., when implemented via an invisible trap). Further-more, whereas
> **naturally aligned loads and stores are guaranteed to execute atomically**,
> misaligned loads and stores might not, and hence require
> additional synchronization to ensure atomicity.

Unfortunately PR https://github.com/rust-lang/rust/pull/66548 did not provide
much details on the bug that motivated it, but
https://github.com/rust-lang/rust/issues/66240 and
https://github.com/rust-lang/rust/issues/85736 appear related
and happen with targets that do have the A extension.
2022-06-21 12:31:42 +02:00
..
src Re-enable atomic loads and stores for all RISC-V targets 2022-06-21 12:31:42 +02:00
Cargo.toml Use serde_json for target spec json 2022-06-03 16:46:19 +00:00
README.md Fix outdated crate names in compiler docs 2021-04-08 11:12:14 -05:00

rustc_target contains some very low-level details that are specific to different compilation targets and so forth.

For more information about how rustc works, see the rustc dev guide.