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rust/compiler/rustc_codegen_ssa
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bors c90eb4825a Auto merge of #108282 - cjgillot:mir-checked-sh, r=tmiasko 
Implement checked Shl/Shr at MIR building.

This does not require any special handling by codegen backends,
as the overflow behaviour is entirely determined by the rhs (shift amount).

This allows MIR ConstProp to remove the overflow check for constant shifts.

~There is an existing different behaviour between cg_llvm and cg_clif (cc `@bjorn3).`
I took cg_llvm's one as reference: overflow if `rhs < 0 || rhs > number_of_bits_in_lhs_ty`.~

EDIT: `cg_llvm` and `cg_clif` implement the overflow check differently. This PR uses `cg_llvm`'s implementation based on a `BitAnd` instead of `cg_clif`'s one based on an unsigned comparison.
2023-03-15 21:31:06 +00:00
..
src Auto merge of #108282 - cjgillot:mir-checked-sh, r=tmiasko 2023-03-15 21:31:06 +00:00
Cargo.toml remove unused imports 2023-02-06 17:40:18 +03:00
messages.ftl Simplify message paths 2023-03-11 22:51:57 +01:00
README.md mv compiler to compiler/ 2020-08-30 18:45:07 +03:00

README.md

Please read the rustc-dev-guide chapter on Backend Agnostic Codegen.