Commit Graph

119 Commits

Author SHA1 Message Date
Florian Schmiderer
3409ca65d8 Add OwnedTargetMachine to manage llvm:TargetMachine. Uses pointers
instead of &'static mut and provides safe interface to create/dispose
it.
2023-09-24 21:11:37 +02:00
Matthias Krüger
3ce90b1649 inline format!() args up to and including rustc_codegen_llvm 2023-07-30 14:22:50 +02:00
Josh Stone
190ded8443 Update the minimum external LLVM to 15 2023-07-27 14:07:08 -07:00
Matthias Krüger
b1d1e99c22
Rollup merge of #113780 - dtolnay:printkindpath, r=b-naber
Support `--print KIND=PATH` command line syntax

As is already done for `--emit KIND=PATH` and `-L KIND=PATH`.

In the discussion of #110785, it was pointed out that `--print KIND=PATH` is nicer than trying to apply the single global `-o` path to `--print`'s output, because in general there can be multiple print requests within a single rustc invocation, and anyway `-o` would already be used for a different meaning in the case of `link-args` and `native-static-libs`.

I am interested in using `--print cfg=PATH` in Buck2. Currently Buck2 works around the lack of support for `--print KIND=PATH` by [indirecting through a Python wrapper script](d43cf3a51a/prelude/rust/tools/get_rustc_cfg.py) to redirect rustc's stdout into the location dictated by the build system.

From skimming Cargo's usages of `--print`, it definitely seems like it would benefit from `--print KIND=PATH` too. Currently it is working around the lack of this by inserting `--crate-name=___ --print=crate-name` so that it can look for a line containing `___` as a delimiter between the 2 other `--print` informations it actually cares about. This is commented as a "HACK" and "abuse". 31eda6f7c3/src/cargo/core/compiler/build_context/target_info.rs (L242) (FYI `@weihanglo` as you dealt with this recently in https://github.com/rust-lang/cargo/pull/11633.)

Mentioning reviewers active in #110785: `@fee1-dead` `@jyn514` `@bjorn3`
2023-07-21 06:52:28 +02:00
David Tolnay
815a114974
Implement printing to file in PassWrapper 2023-07-20 11:04:31 -07:00
David Tolnay
6e734fce63
Implement printing to file in llvm_util 2023-07-20 11:04:31 -07:00
David Tolnay
c0dc0c6875
Store individual output file name with every PrintRequest 2023-07-20 11:04:30 -07:00
Patrick Walton
2d47816cba rustc_llvm: Add a -Z print-llvm-stats option to expose LLVM statistics.
LLVM has a neat [statistics] feature that tracks how often optimizations kick
in. It's very handy for optimization work. Since we expose the LLVM pass
timings, I thought it made sense to expose the LLVM statistics too.

[statistics]: https://llvm.org/docs/ProgrammersManual.html#the-statistic-class-stats-option
2023-07-16 22:56:04 +09:00
Jamie Cunliffe
a059e68d11 Create a structure to define the features from to_llvm_features.
Rather than returning an array of features from to_llvm_features, return a structure that contains
the dependencies. This also contains metadata on how the features depend on each other to allow for
the correct enabling and disabling.
2023-05-22 14:46:40 +01:00
Jamie Cunliffe
aab0757c66 Only disable folded features when it makes sense.
Some features that are tied together only make sense to be folded
together when enabling the feature. For example on AArch64 sve and
neon are tied together, however it doesn't make sense to disable neon
when disabling sve.
2023-05-22 14:27:14 +01:00
Jamie Cunliffe
4cca436e30 Tie neon with fp-armv8.
In #91608 the fp-armv8 feature was removed as it's tied to the neon
feature. However disabling neon didn't actually disable the use of
floating point registers and instructions, for this `-fp-armv8` is
required.
2023-05-22 14:27:14 +01:00
bors
ce5919fcef Auto merge of #107707 - calebzulawski:remove-features, r=Amanieu
Remove misleading target feature aliases

Fixes #100752.  This is a follow up to #103750. These aliases could not be completely removed until rust-lang/stdarch#1355 landed.

cc `@Amanieu`
2023-05-15 18:47:52 +00:00
James Dietz
f239cd6a35 added SAFETY comment 2023-05-04 20:54:17 -04:00
James Dietz
cb74cd524f change expect() to unwrap_or_else() and update msg 2023-05-04 20:29:38 -04:00
James Dietz
9aa596a014 moved default CPU message inline 2023-05-04 20:29:38 -04:00
James Dietz
ea17aa9141 --print target-cpus shows default target cpu, updated docs 2023-05-04 20:29:38 -04:00
est31
edd7d4a9f7 More general captures
This avoids repetition
2023-03-22 15:39:24 +01:00
Nikita Popov
45f694dbba Remove pass initialization code
This is no longer necessary with the new pass manager.
2023-03-01 09:24:13 +01:00
Josh Stone
ffdbd58d85 Drop llvm14-builtins-abi with compiler_builtins 0.1.87 2023-02-10 16:13:31 -08:00
Josh Stone
a06aaa4a9e Update the minimum external LLVM to 14 2023-02-10 16:06:25 -08:00
Caleb Zulawski
47fc13268c Remove misleading target feature aliases 2023-02-05 17:04:39 -05:00
Nilstrieb
fb79e44df6 Remove wrapper functions for some unstable options
They are trivial and just forward to the option. Like most other
options, we can just access it directly.
2022-12-20 15:02:15 +01:00
Matthias Krüger
dab14348e9
Rollup merge of #105026 - oToToT:aarch64-v8a, r=davidtwco
v8a as default aarch64 target

After https://github.com/llvm/llvm-project/commit/8689f5e landed, LLVM takes the intersection of v8a and v8r as default. This commit brings back v8a support by explicitly specifying v8a in the feature list.

This should solve #97724.

p.s. a bit more context can also be found in https://github.com/llvm/llvm-project/issues/57904#issuecomment-1329555590.
2022-12-02 21:22:47 +01:00
Matthias Krüger
3539cf9344
Rollup merge of #104627 - calebzulawski:print-target-features, r=compiler-errors
Print all features with --print target-features

This fixes `rustc --print target-features` with respect to aliases and tied features.

Before this change, the print command assumed that each LLVM feature corresponds exactly to one rustc feature.  In the case of aliases and tied features, this assumption failed and some features (such as aarch64's "pacg") were missing.  With this change, every target feature is listed.
2022-11-29 22:43:17 +01:00
Tommy Chiang (oToToT)
382dba52ee v8a as default aarch64 target
After https://github.com/llvm/llvm-project/commit/8689f5e landed, LLVM takes the intersection of v8a and v8r as default.
This commit brings back v8a support by explicitly specifying v8a in the feature list.

This should solve #97724.
2022-11-29 14:25:46 +08:00
Maybe Waffle
1d42936b18 Prefer doc comments over //-comments in compiler 2022-11-27 11:19:04 +00:00
Caleb Zulawski
102a5d867c Print all features with --print target-features, including aliases and tied features 2022-11-19 21:22:17 -05:00
Caleb Zulawski
11224000e8 Update compiler/rustc_codegen_llvm/src/llvm_util.rs
Co-authored-by: Jubilee <46493976+workingjubilee@users.noreply.github.com>
2022-11-12 18:46:39 -05:00
Caleb Zulawski
d7152f8eec Allow actual AVX512-related feature names in the case of some misleading aliases 2022-11-12 18:46:21 -05:00
SLASHLogin
9a1545861e Simplify existing Diagnostic implementations 2022-11-09 14:56:21 +01:00
SLASHLogin
185ef7b6de Port MissingFeatures and TargetFeatureDisableOrEnable 2022-11-09 14:56:21 +01:00
SLASHLogin
69d412a073 Missing lifetime parameter and formatting 2022-11-09 14:56:20 +01:00
SLASHLogin
b1647903f8 Change String in structs to &'a str 2022-11-09 14:56:20 +01:00
SLASHLogin
a54c8003ab Formatting 2022-11-09 14:56:20 +01:00
SLASHLogin
575f6098da Port unknown feature diagnostic to the new framework 2022-11-09 14:56:20 +01:00
Josh Stone
2860f77a0d Remove support for LLVM's legacy pass manager 2022-09-18 13:25:49 -07:00
bors
c97922dca5 Auto merge of #99443 - jam1garner:mips-virt-feature, r=nagisa
Add support for MIPS VZ ISA extension

[Link to relevant LLVM line where virt extension is specified](83fab8cee9/llvm/lib/Target/Mips/Mips.td (L172-L173))

This has been tested on mips-unknown-linux-musl with a target-cpu that is >= MIPS32 5 and `target-features=+virt`. The example was checked in a disassembler to ensure the correct assembly sequence was being generated using the virtualization instructions.

Needed additional work:

* MIPS is missing from [the Rust reference CPU feature lists](https://doc.rust-lang.org/reference/attributes/codegen.html#available-features)

Example docs for later:

```md
#### `mips` or `mips64`

This platform requires that `#[target_feature]` is only applied to [`unsafe`
functions][unsafe function]. This target's feature support is currently unstable
and must be enabled by `#![feature(mips_target_feature)]` ([Issue #44839])

[Issue #44839]: https://github.com/rust-lang/rust/issues/44839

Further documentation on these features can be found in the [MIPS Instruction Set
Reference Manual], or elsewhere on [mips.com].

[MIPS Instruction Set Reference Manual]: https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00086-2B-MIPS32BIS-AFP-6.06.pdf
[developer.arm.com]: https://www.mips.com/products/architectures/ase/

Feature        | Implicitly Enables | Description
---------------|--------------------|-------------------
`fp64`         |                    | 64-bit Floating Point
`msa`          |                    | "MIPS SIMD Architecture"
`virt`         |                    | Virtualization instructions (VZ ASE)
```

If the above is good I can also submit a PR for that if there's interest in documenting it while it's still unstable. Otherwise that can be dropped, I just wrote it before realizing it was possibly not a good idea.

Relevant to #44839
2022-09-14 08:21:25 +00:00
Oli Scherer
ee3c835018 Always import all tracing macros for the entire crate instead of piecemeal by module 2022-09-01 14:54:27 +00:00
Josh Stone
2970ad8aee Update the minimum external LLVM to 13 2022-08-14 13:46:51 -07:00
Nikita Popov
89582e8193 Pass +atomics-32 feature for thumbv6m target
https://reviews.llvm.org/D120026 changed atomics on thumbv6m to
use libatomic, to ensure that atomic load/store are compatible with
atomic RMW/CAS. However, Rust wants to expose only load/store
without libcalls.

https://reviews.llvm.org/D130480 added support for this behind
the +atomics-32 target feature, so enable that feature.
2022-08-09 12:39:59 +02:00
jam1garner
bec3a545a5
Add support for MIPS VZ ISA extension 2022-07-18 20:40:41 -04:00
Joshua Nelson
3c9765cff1 Rename debugging_opts to unstable_opts
This is no longer used only for debugging options (e.g. `-Zoutput-width`, `-Zallow-features`).
Rename it to be more clear.
2022-07-13 17:47:06 -05:00
Amanieu d'Antras
e51f1b7e27 Keep unstable target features for asm feature checking
Inline assembly uses the target features to determine which registers
are available on the current target. However it needs to be able to
access unstable target features for this.

Fixes #99071
2022-07-11 14:26:58 +01:00
SparrowLii
b3cd892ae1 Avoid creating SmallVecs in global_llvm_features 2022-06-06 18:05:07 +08:00
Nikita Popov
25286dda2b Drop support for -Znew-llvm-pass-manager=no with LLVM 15 2022-04-20 09:25:47 +02:00
Loïc BRANSTETT
ccff48f97b Replace every String in Target(Options) with Cow<'static, str> 2022-04-03 21:29:57 +02:00
Jubilee Young
990c297ffb Filter for all features instead of any
Adds regression tests for feature logic
Co-authored-by: bjorn3 <bjorn3@users.noreply.github.com>
Co-authored-by: Simonas Kazlauskas <git@kazlauskas.me>
2022-03-22 15:20:01 -07:00
Jubilee Young
b807d5970b Fold aarch64 feature +fp into +neon
Arm's FEAT_FP and Feat_AdvSIMD describe the same thing on AArch64:
The Neon unit, which handles both floating point and SIMD instructions.
Moreover, a configuration for AArch64 must include both or neither.
Arm says "entirely proprietary" toolchains may omit floating point:
https://developer.arm.com/documentation/102374/0101/Data-processing---floating-point
In the Programmer's Guide for Armv8-A, Arm says AArch64 can have
both FP and Neon or neither in custom implementations:
https://developer.arm.com/documentation/den0024/a/AArch64-Floating-point-and-NEON

In "Bare metal boot code for Armv8-A", enabling Neon and FP
is just disabling the same trap flag:
https://developer.arm.com/documentation/dai0527/a

In an unlikely future where "Neon and FP" become unrelated,
we can add "[+-]fp" as its own feature flag.
Until then, we can simplify programming with Rust on AArch64 by
folding both into "[+-]neon", which is valid as it supersets both.

"[+-]neon" is retained for niche uses such as firmware, kernels,
"I just hate floats", and so on.
2022-03-22 15:14:33 -07:00
Adam Gemmell
39961390ad Tie fp and neon 2022-03-14 10:54:21 +00:00
Nikita Popov
0c7d0a19dd Use new pass manager on s390x with LLVM 14
The problematic compile-time issue should be resolved with this
version.
2022-03-09 10:00:23 +01:00