Commit Graph

1412 Commits

Author SHA1 Message Date
Stuart Cook
0bfc49b053
Rollup merge of #131876 - workingjubilee:llvm-c-c-c-comdat, r=Zalathar
compiler: Use LLVM's Comdat support

Acting on these long-ago issues:
- https://github.com/rust-lang/rust/issues/46437
- https://github.com/rust-lang/rust/issues/68955
2024-10-20 14:06:03 +11:00
Jubilee Young
45d61b0d26 cg_llvm: Reuse LLVM-C Comdat support
Migrate `llvm::set_comdat` and `llvm::SetUniqueComdat` to LLVM-C FFI.

Note, now we can call `llvm::set_comdat` only when the target actually
supports adding comdat. As this has no convenient LLVM-C API, we
implement this as `TargetOptions::supports_comdat`.

Co-authored-by: Stuart Cook <Zalathar@users.noreply.github.com>
2024-10-19 10:46:10 -07:00
WANG Rui
275ec06900 Default to the medium code model on OpenHarmony LoongArch target
The context for this is #130266: setting the medium code model for the
'loongarch64-linux-ohos' target.
2024-10-18 14:16:51 +08:00
WANG Rui
67ed9fac55 Enable XRay instrumentation for LoongArch Linux targets 2024-10-17 22:35:51 +08:00
Matthias Krüger
9aee5d98cf
Rollup merge of #131583 - heiher:loong-issue-118053, r=jieyouxu
Setting up indirect access to external data for loongarch64-linux-{musl,ohos}

In issue #118053, the `loongarch64-unknown-linux-gnu` target needs indirection to access external data, and so do the `loongarch64-unknown-linux-musl` and `loongarch64-unknown-linux-ohos` targets.
2024-10-17 12:07:20 +02:00
Matthew Maurer
e985396145 llvm: Match aarch64 data layout to new LLVM layout
LLVM has added 3 new address spaces to support special Windows use
cases. These shouldn't trouble us for now, but LLVM requires matching
data layouts.

See llvm/llvm-project#111879 for details
2024-10-16 01:16:44 +00:00
Matthias Krüger
dbb0581ff5
Rollup merge of #131667 - taiki-e:aarch64-inline-asm-reg-emit, r=Amanieu
Fix AArch64InlineAsmReg::emit

Currently, this method uses `self as u32 - Self::x0 as u32` to get register index:
36780360b6/compiler/rustc_target/src/asm/aarch64.rs (L204)

However, this is incorrect for reasons explained in the following comment:
36780360b6/compiler/rustc_codegen_llvm/src/asm.rs (L544-L549)

r? ``@Amanieu``

``@rustbot`` label O-AArch64 +A-inline-assembly
2024-10-14 17:06:38 +02:00
Matthias Krüger
43bf4f1fd3
Rollup merge of #131332 - taiki-e:arm64ec-clobber-abi, r=Amanieu
Fix clobber_abi and disallow SVE-related registers in Arm64EC inline assembly

Currently `clobber_abi` in Arm64EC inline assembly is implemented using `InlineAsmClobberAbi::AArch64NoX18`, but broken since it attempts to clobber registers that cannot be used in Arm64EC: https://godbolt.org/z/r3PTrGz5r

```
error: cannot use register `x13`: x13, x14, x23, x24, x28, v16-v31 cannot be used for Arm64EC
 --> <source>:6:14
  |
6 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
  |              ^^^^^^^^^^^^^^^^

error: cannot use register `x14`: x13, x14, x23, x24, x28, v16-v31 cannot be used for Arm64EC
 --> <source>:6:14
  |
6 |     asm!("", clobber_abi("C"), options(nostack, nomem, preserves_flags));
  |              ^^^^^^^^^^^^^^^^

<omitted the same errors for v16-v31>
```

Additionally, this disallows SVE-related registers per https://github.com/rust-lang/rust/pull/131332#issuecomment-2401189142.

cc ``@dpaoliello``

r? ``@Amanieu``

``@rustbot`` label O-windows O-AArch64 +A-inline-assembly
2024-10-14 17:06:35 +02:00
Matthias Krüger
cb140dcb00
Rollup merge of #131473 - workingjubilee:move-that-abi-up, r=saethlin
compiler: `{TyAnd,}Layout` comes home

The `Layout` and `TyAndLayout` types are heavily abstract and have no particular target-specific qualities, though we do use them to answer questions particular to targets. We can keep it that way if we simply move them out of `rustc_target` and into `rustc_abi`. They bring a small entourage of connected types with them, but that's fine.

This will allow us to strengthen a few abstraction barriers over time and thus make the notoriously gnarly layout code easier to refactor. For now, we don't need to worry about that and deliberately use reexports to minimize this particular diff.
2024-10-14 06:04:28 +02:00
Taiki Endo
67ebb6c20b Fix AArch64InlineAsmReg::emit 2024-10-14 06:04:07 +09:00
Taiki Endo
d858dfedbb Fix clobber_abi and disallow SVE-related registers in Arm64EC inline assembly 2024-10-14 05:30:45 +09:00
WANG Rui
b1579e8acf Setting up indirect access to external data for loongarch64-linux-{musl,ohos}
In issue #118053, the `loongarch64-unknown-linux-gnu` target needs indirection
to access external data, and so do the `loongarch64-unknown-linux-musl` and
`loongarch64-unknown-linux-ohos` targets.
2024-10-13 18:56:35 +08:00
Trevor Gross
d576cdda7e
Rollup merge of #131334 - heiher:loong-sanitizers, r=Mark-Simulacrum
Enable sanitizers for loongarch64-unknown-*

Enable sanitizers for `loongarch64-unknown-linux-{gnu,musl,ohos}` targets.
2024-10-12 21:38:35 -05:00
Trevor Gross
9e72070f77
Rollup merge of #131310 - taiki-e:msp430-clobber-abi, r=Amanieu
Support clobber_abi in MSP430 inline assembly

This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335.

Refs: Section 3.2 "Register Conventions" in [MSP430 Embedded Application Binary Interface](https://www.ti.com/lit/an/slaa534a/slaa534a.pdf)

cc ``@cr1901``

r? ``@Amanieu``

``@rustbot`` label +O-msp430
2024-10-11 23:57:46 -04:00
Jubilee Young
10721909f2 compiler: Wire {TyAnd,}Layout into rustc_abi
This finally unites TyAndLayout, Layout, and LayoutS into the same crate,
as one might imagine they would be placed. No functional changes.
2024-10-11 17:41:52 -07:00
Jubilee Young
255bdd2f24 compiler: Empty out rustc_target::abi 2024-10-11 17:41:52 -07:00
Jubilee Young
559de74562 compiler: Move impl of ToJson for abi::Endian 2024-10-11 17:41:52 -07:00
Matthias Krüger
fc81a7c1d5
Rollup merge of #131208 - mustartt:aix-call-abi, r=davidtwco
ABI: Pass aggregates by value on AIX

On AIX we pass aggregates byval. Adds new ABI for AIX for powerpc64.

313ad85dfa/clang/lib/CodeGen/Targets/PPC.cpp (L216)

Fixes the following 2 testcases on AIX:
```
tests/ui/abi/extern/extern-pass-TwoU16s.rs
tests/ui/abi/extern/extern-pass-TwoU8s.rs
```
2024-10-11 15:36:51 +02:00
Kajetan Puchalski
335f67b652 rustc_target: Add sme-b16b16 as an explicit aarch64 target feature
LLVM 20 split out what used to be called b16b16 and correspond to aarch64
FEAT_SVE_B16B16 into sve-b16b16 and sme-b16b16.
Add sme-b16b16 as an explicit feature and update the codegen accordingly.
2024-10-10 10:24:57 +00:00
Jubilee Young
43e198a3ae compiler: Seal off the rustc_target::abi enum glob imports 2024-10-08 18:24:56 -07:00
Stuart Cook
e416a9cf4e
Rollup merge of #131170 - madsmtm:target-info-esp32-vendor, r=workingjubilee
Fix `target_vendor` in non-IDF Xtensa ESP32 targets

`rustc`'s Xtensa ESP32 targets are the following:
- `xtensa-esp32-none-elf`
- `xtensa-esp32-espidf`
- `xtensa-esp32s2-none-elf`
- `xtensa-esp32s2-espidf`
- `xtensa-esp32s3-none-elf`
- `xtensa-esp32s3-espidf`

The ESP-IDF targets already set `target_vendor="espressif"`, however, the ESP32 is, from my understanding, produced by Espressif regardless of whether using the IDF or not, so we should set the target vendor there as well?
2024-10-08 13:19:43 +11:00
WANG Rui
8a5e03bf43 Enable sanitizers for loongarch64-unknown-* 2024-10-06 11:57:06 +08:00
Taiki Endo
3743618c13 Support clobber_abi in MSP430 inline assembly 2024-10-06 08:14:44 +09:00
Henri Lunnikivi
04099b663c Update target fns to latest main 2024-10-05 12:14:35 +03:00
Henri Lunnikivi
7a0bac49c8 Add comment: data_layout 2024-10-05 12:14:35 +03:00
Henri Lunnikivi
b22b348e0d Add targets: riscv32{e|em|emc}
- Based on riscv32{i|im|imc}
- Set data_layout stack alignment: S32 (bits)
- Set llvm_abiname = ilp32e
2024-10-05 12:13:59 +03:00
Jubilee
1462815098
Rollup merge of #131174 - madsmtm:target-info-sparc-abi, r=pnkfelix
Fix `target_abi` in `sparc-unknown-none-elf`

This was previously set to `target_abi = "elf"`, but `elf` is not used elsewhere as a target ABI (even though there's many targets that have it in their name), so I've removed it.

CC target maintainer ``@jonathanpallant,`` what do you think about this?
``@rustbot`` label O-SPARC
2024-10-04 14:11:36 -07:00
Jubilee
ff57e0b24e
Rollup merge of #131171 - madsmtm:target-info-avr-env, r=petrochenkov
Fix `target_env` in `avr-unknown-gnu-atmega328`

The target name itself contains GNU, we should probably reflect that as `target_env = "gnu"` as well? Or from my reading of https://github.com/rust-lang/rust/pull/74941#issuecomment-712219034, perhaps not, but then that should probably be documented somewhere?

There's no listed target maintainer, but the target was introduced in https://github.com/rust-lang/rust/pull/74941, so I'll ping the author of that: `@dylanmckay`

Relatedly, I wonder _why_ the recommendation is to [create separate target triples for each AVR](https://github.com/Rahix/avr-hal/tree/main/avr-specs), when `-Ctarget-cpu=...` would suffice, perhaps you could also elaborate on that? Was it just because `-Ctarget-cpu=...` didn't exist back then? If so, now that it does, should we now change the target back to e.g. `avr-unknown-none-gnu`, and require the user to set `-Ctarget-cpu=...` instead?
2024-10-04 14:11:35 -07:00
Jubilee
b88f56f862
Rollup merge of #130453 - randomPoison:trusty-x86, r=pnkfelix
Add x86_64-unknown-trusty as tier 3 target

This PR adds a third target for the Trusty platform, `x86_64-unknown-trusty`.

Please let me know if an MCP is required. https://github.com/rust-lang/compiler-team/issues/582 was made when adding the first two targets, I can make another one for the new target as well if needed.

# Target Tier Policy Acknowledgements

> A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.)

- Nicole LeGare (```@randomPoison)```
- Andrei Homescu (```@ahomescu)```
- Chris Wailes (chriswailes@google.com)
- As a fallback trusty-dev-team@google.com can be contacted

Note that this does not reflect the maintainers currently listed in [`trusty.md`](c52c23b6f4/src/doc/rustc/src/platform-support/trusty.md). #130452 is currently open to update the list of maintainers in the documentation.

> Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target.

The new target `x86_64-unknown-trusty` follows the existing naming convention for similar targets.

> Target names should not introduce undue confusion or ambiguity unless absolutely necessary to maintain ecosystem compatibility. For example, if the name of the target makes people extremely likely to form incorrect beliefs about what it targets, the name should be changed or augmented to disambiguate it.

👍

> Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users.

There are no known legal issues or license incompatibilities.

> Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions.

👍

> Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate (core for most targets, alloc for targets that can support dynamic memory allocation, std for targets with an operating system or equivalent layer of system-provided functionality), but may leave some code unimplemented (either unavailable or stubbed out as appropriate), whether because the target makes it impossible to implement or challenging to implement. The authors of pull requests are not obligated to avoid calling any portions of the standard library on the basis of a tier 3 target not implementing those portions.

This PR only adds the target. `std` support is being worked on and will be added in a future PR.

> The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible. If the target supports running binaries, or running tests (even if they do not pass), the documentation must explain how to run such binaries or tests for the target, using emulation if possible or dedicated hardware if necessary.

👍

> Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via ```@)``` to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages.

👍

> Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target.

👍

> Tier 3 targets must be able to produce assembly using at least one of rustc's supported backends from any host target. (Having support in a fork of the backend is not sufficient, it must be upstream.)

👍
2024-10-04 14:11:34 -07:00
Mads Marquart
f51d8e3276 Fix target_abi in sparc-unknown-none-elf
This was previously set to `target_abi = "elf"`, but `elf` is not used
elsewhere as a target ABI (even though there's many targets that have it
in their name).
2024-10-04 20:47:28 +02:00
Guillaume Gomez
ba94a2ada1
Rollup merge of #131202 - Urgau:wide-ptrs-compiler, r=jieyouxu
Use wide pointers consistenly across the compiler

This PR replace every use of "fat pointer" for the more recent "wide pointer" terminology.

Since some time T-lang as preferred the "wide pointer" terminology, as can be seen on [the last RFCs](https://github.com/search?q=repo%3Arust-lang%2Frfcs+%22wide+pointer%22&type=code), on some [lints](https://doc.rust-lang.org/rustc/lints/listing/warn-by-default.html#ambiguous-wide-pointer-comparisons), but also in [the reference](https://doc.rust-lang.org/stable/reference/expressions/operator-expr.html?highlight=wide%20pointer#pointer-to-pointer-cast).

Currently we have a [mix of both](https://github.com/search?q=repo%3Arust-lang%2Frust+%22wide+pointer%22&type=code) (including in error messages), which isn't great, but with this PR no more.

r? `@jieyouxu` (feel free to re-roll)
2024-10-04 15:42:54 +02:00
Urgau
018ba0528f Use wide pointers consistenly across the compiler 2024-10-04 14:06:48 +02:00
Henry Jiang
d09e27d54a update call 2024-10-03 12:36:36 -04:00
Henry Jiang
7d27ceb954 Add AIX Calling Convention 2024-10-03 11:37:41 -04:00
Matthias Krüger
35ff9e2bc6
Rollup merge of #131173 - madsmtm:target-info-solid_asp3-abi, r=lcnr
Fix `target_abi` in SOLID targets

The `armv7a-kmc-solid_asp3-eabi` and `armv7a-kmc-solid_asp3-eabihf` targets clearly have the ABI in their name, so it should also be exposed in Rust's `target_abi` cfg variable.

CC target maintainer `@kawadakk.`
2024-10-03 13:48:00 +02:00
Jubilee
cc61b81c6a
Rollup merge of #131166 - madsmtm:target-info-switch-vendor, r=jieyouxu
Fix `target_vendor` for `aarch64-nintendo-switch-freestanding`

Previously set to `target_vendor = "unknown"`, but Nintendo is clearly the vendor of the Switch, and is also reflected in the target name itself.

CC target maintainers `@leo60228` and `@jam1garner`
2024-10-02 21:26:59 -07:00
Mads Marquart
0ae796440a Fix target_abi in SOLID targets
The `armv7a-kmc-solid_asp3-eabi` and `armv7a-kmc-solid_asp3-eabihf`
targets clearly have the ABI in their name, so it should also be exposed
in Rust's `target_abi` cfg variable.
2024-10-02 20:54:09 +02:00
Mads Marquart
033fdda46c Fix target_env in avr-unknown-gnu-atmega328
The target name itself contains GNU, we should set that in the
environment as well.
2024-10-02 20:30:51 +02:00
Mads Marquart
51537c686c Fix target_vendor in non-idf Xtensa ESP32 targets
The Xtensa ESP32 targets are the following:
- xtensa-esp32-none-elf
- xtensa-esp32-espidf
- xtensa-esp32s2-none-elf
- xtensa-esp32s2-espidf
- xtensa-esp32s3-none-elf
- xtensa-esp32s3-espidf

The ESP-IDF targets already set `target_vendor="espressif"`, however,
the ESP32 is produced by Espressif regardless of whether using the IDF
or not, so we should set the target vendor there as well.
2024-10-02 20:09:27 +02:00
Mads Marquart
746c322592 Fix target_vendor for aarch64-nintendo-switch-freestanding
Previously set to `target_vendor = "unknown"`, but Nintendo is clearly
the vendor of the Switch, and is also reflected in the target name
itself.
2024-10-02 19:30:55 +02:00
Matthias Krüger
5fd6218d72
Rollup merge of #131016 - madsmtm:no-sdk-version-in-object, r=jieyouxu
Apple: Do not specify an SDK version in `rlib` object files

This was added in https://github.com/rust-lang/rust/pull/114114, but is unnecessary, since it ends up being overwritten when linking anyhow, and it feels wrong to embed some arbitrary SDK version in here. The object files produced by LLVM also do not set this, and the tooling shows `n/a` when it's `0`, so it seems to genuinely be optional in object files.

I've also added a test for the different places the SDK version shows up, and documented a bit more in the code how SDK versions work.

See https://github.com/rust-lang/rust/issues/129432 for the bigger picture.

Tested with (excludes the same few targets as in https://github.com/rust-lang/rust/pull/130435):
```console
./x test tests/run-make/apple-sdk-version --target aarch64-apple-darwin,aarch64-apple-ios,aarch64-apple-ios-macabi,aarch64-apple-ios-sim,aarch64-apple-tvos,aarch64-apple-tvos-sim,aarch64-apple-visionos,aarch64-apple-visionos-sim,aarch64-apple-watchos,aarch64-apple-watchos-sim,arm64_32-apple-watchos,armv7k-apple-watchos,armv7s-apple-ios,x86_64-apple-darwin,x86_64-apple-ios,x86_64-apple-ios-macabi,x86_64-apple-tvos,x86_64-apple-watchos-sim,x86_64h-apple-darwin
IPHONEOS_DEPLOYMENT_TARGET=10.0 ./x test tests/run-make/apple-sdk-version --target=i386-apple-ios
```

CC `@BlackHoleFox,` you [originally commented on these values](https://github.com/rust-lang/rust/pull/114114#discussion_r1300599445).

`@rustbot` label O-apple
2024-10-02 17:10:43 +02:00
bors
06bb8364aa Auto merge of #131111 - matthiaskrgr:rollup-n6do187, r=matthiaskrgr
Rollup of 4 pull requests

Successful merges:

 - #130005 (Replace -Z default-hidden-visibility with -Z default-visibility)
 - #130229 (ptr::add/sub: do not claim equivalence with `offset(c as isize)`)
 - #130773 (Update Unicode escapes in `/library/core/src/char/methods.rs`)
 - #130933 (rustdoc: lists items that contain multiple paragraphs are more clear)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-10-01 19:29:26 +00:00
Matthias Krüger
389a399a50
Rollup merge of #130005 - davidlattimore:protected-vis-flag, r=Urgau
Replace -Z default-hidden-visibility with -Z default-visibility

Issue #105518
2024-10-01 21:09:18 +02:00
Guillaume Gomez
344b6a1668
Rollup merge of #130630 - taiki-e:s390x-clobber-abi, r=Amanieu
Support clobber_abi and vector/access registers (clobber-only) in s390x inline assembly

This supports `clobber_abi` which is one of the requirements of stabilization mentioned in #93335.

This also supports vector registers (as `vreg`) and access registers (as `areg`) as clobber-only, which need to support clobbering of them to implement clobber_abi.

Refs:
- "1.2.1.1. Register Preservation Rules" section in ELF Application Binary Interface s390x Supplement, Version 1.6.1 (lzsabi_s390x.pdf in https://github.com/IBM/s390x-abi/releases/tag/v1.6.1)
- Register definition in LLVM:
  - Vector registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L249
  - Access registers https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td#L332

I have three questions:
- ~~ELF Application Binary Interface s390x Supplement says that `cc` (condition code, bits 18-19 of PSW) is "Volatile".
  However, we do not have a register class for `cc` and instead mark `cc` as clobbered unless `preserves_flags` is specified (https://github.com/rust-lang/rust/pull/111331).
  Therefore, in the current implementation, if both `preserves_flags` and `clobber_abi` are specified, `cc` is not marked as clobbered. Is this okay? Or even if `preserves_flags` is used, should `cc` be marked as clobbered if `clobber_abi` is used?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- ~~ELF Application Binary Interface s390x Supplement says that `pm` (program mask, bits 20-23 of PSW) is "Cleared".
  There does not appear to be any registers associated with this in either [LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td) or [GCC](33ccc1314d/gcc/config/s390/s390.h (L407-L431)), so at this point I don't see any way other than to just ignore it. Is this okay as-is?~~ UPDATE: resolved https://github.com/rust-lang/rust/pull/130630#issuecomment-2367923121
- Is "areg" a good name for register class name for access registers? It may be a bit confusing between that and `reg_addr`, which uses the “a” constraint (https://github.com/rust-lang/rust/pull/119431)...

Note:

- GCC seems to [recognize only `a0` and `a1`](33ccc1314d/gcc/config/s390/s390.h (L428-L429)), and using `a[2-15]` [causes errors](https://godbolt.org/z/a46vx8jjn).
  Given that cg_gcc has a similar problem with other architecture (https://github.com/rust-lang/rustc_codegen_gcc/issues/485), I don't feel this is a blocker for this PR, but it is worth mentioning here.
- `vreg` should be able to accept `#[repr(simd)]` types as input if the `vector` target feature added in https://github.com/rust-lang/rust/pull/127506 is enabled, but core_arch has no s390x vector type and both `#[repr(simd)]` and `core::simd` are unstable, so I have not implemented it in this PR. EDIT: And supporting it is probably more complex than doing the equivalent on other architectures... https://github.com/rust-lang/rust/pull/88245#issuecomment-905559591

cc `@uweigand`

r? `@Amanieu`

`@rustbot` label +O-SystemZ
2024-10-01 17:32:07 +02:00
David Lattimore
f48194ea55 Replace -Z default-hidden-visibility with -Z default-visibility
MCP: https://github.com/rust-lang/compiler-team/issues/782

Co-authored-by: bjorn3 <17426603+bjorn3@users.noreply.github.com>
2024-10-01 22:32:13 +10:00
Mads Marquart
6b06ceb2fd Do not specify an SDK version in object files
This is unnecessary, since it ends up being overwritten when linking
anyhow, and it feels wrong to embed some arbitrary SDK version in here.
2024-09-29 14:45:09 +02:00
Taiki Endo
62612af372 rustc_target: Add RISC-V atomic-related features 2024-09-28 11:26:09 +09:00
Matthias Krüger
fd9d961ed8
Rollup merge of #130873 - taiki-e:ppc64-atomic, r=Amanieu
rustc_target: Add powerpc64 atomic-related features

This adds the following two target features to unstable powerpc_target_feature.

- `partword-atomics`: 8-bit and 16-bit atomic instructions (`l{b,h}arx` and `st{b,h}cx.`) ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPC.td#L170-L172))
- `quadword-atomics`: 128-bit atomic instructions (`lqarx` and `stqcx.`) ([definition in LLVM](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPC.td#L173-L175))

Both features are [available on power8+](https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/PowerPC/PPC.td#L408-L422), so enabled by default for `powerpc64le-*` targets.

r? `@Amanieu`

`@rustbot` label +O-PowerPC
2024-09-27 19:08:00 +02:00
Matthias Krüger
f9cd81f3d9
Rollup merge of #130435 - madsmtm:move-apple-link-args, r=petrochenkov
Move Apple linker args from `rustc_target` to `rustc_codegen_ssa`

They are dependent on the deployment target and SDK version, but having these in `rustc_target` makes it hard to introduce that dependency. Part of the work needed to do https://github.com/rust-lang/rust/issues/118204, see https://github.com/rust-lang/rust/pull/129342 for some discussion.

Tested using:
```console
./x test tests/run-make/apple-deployment-target --target="aarch64-apple-darwin,aarch64-apple-ios,aarch64-apple-ios-macabi,aarch64-apple-ios-sim,aarch64-apple-tvos,aarch64-apple-tvos-sim,aarch64-apple-visionos,aarch64-apple-visionos-sim,aarch64-apple-watchos,aarch64-apple-watchos-sim,arm64_32-apple-watchos,armv7k-apple-watchos,armv7s-apple-ios,x86_64-apple-darwin,x86_64-apple-ios,x86_64-apple-ios-macabi,x86_64-apple-tvos,x86_64-apple-watchos-sim,x86_64h-apple-darwin"
IPHONEOS_DEPLOYMENT_TARGET=10.0 ./x test tests/run-make/apple-deployment-target --target=i386-apple-ios
```

`arm64e-apple-darwin` and `arm64e-apple-ios` have not been tested, see https://github.com/rust-lang/rust/issues/130085, neither is `i686-apple-darwin`, since that requires using an x86_64 macbook, and I currently can't get mine to work, see https://github.com/rust-lang/rust/issues/130434.

CC `@petrochenkov`
2024-09-27 19:07:59 +02:00
Mads Marquart
fb10eeb42b Move Apple linker args from rustc_target to rustc_codegen_ssa
They are dependent on the deployment target and SDK version, but having
these in `rustc_target` makes it hard to introduce that dependency.
2024-09-26 16:40:25 +02:00