Commit Graph

25 Commits

Author SHA1 Message Date
Scott McMurray
d2309c2a9d Ban non-array SIMD 2024-09-09 19:39:43 -07:00
Rajveer
b324fcb169 [testsuite][cleanup] Remove all usages of dont_merge hack to avoid function merging
Resolves #129438

The `-Zmerge-functions=disabled` compile flag exists for this purpose.
2024-08-31 01:12:41 +05:30
beetrees
abd44fc5f4
Add f16 and f128 inline ASM support for aarch64 2024-08-25 00:13:25 +01:00
rongfu.leng
ec67cdf98a
Enable f16 in assembly on aarch64 platforms that support it
Signed-off-by: rongfu.leng <lenronfu@gmail.com>
2024-08-24 23:07:09 +01:00
Folkert
8419c0956e stabilize asm_const 2024-08-13 23:18:31 +02:00
Nicholas Nethercote
84ac80f192 Reformat use declarations.
The previous commit updated `rustfmt.toml` appropriately. This commit is
the outcome of running `x fmt --all` with the new formatting options.
2024-07-29 08:26:52 +10:00
Guillaume Gomez
07e8b3ac01
Rollup merge of #126555 - beetrees:f16-inline-asm-arm, r=Amanieu
Add `f16` inline ASM support for 32-bit ARM

Adds `f16` inline ASM support for 32-bit ARM. SIMD vector types are taken from [here](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A32]).`

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-22 12:57:18 +02:00
Jubilee
e7956cd994
Rollup merge of #126530 - beetrees:f16-inline-asm-riscv, r=Amanieu
Add `f16` inline ASM support for RISC-V

This PR adds `f16` inline ASM support for RISC-V. A `FIXME` is left for `f128` support as LLVM does not support the required `Q` (Quad-Precision Floating-Point) extension yet.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128
2024-06-21 21:02:26 -07:00
beetrees
771e44ebd3
Add f16 inline ASM support for RISC-V 2024-06-21 18:48:20 +01:00
beetrees
753fb070bb
Add f16 inline ASM support for 32-bit ARM 2024-06-21 18:26:42 +01:00
Gary Guo
5812b1fd12 Remove c_unwind from tests and fix tests 2024-06-19 13:54:55 +01:00
beetrees
dfc5514527
Add f16 and f128 inline ASM support for x86 and x86-64 2024-06-13 16:12:23 +01:00
Jubilee Young
fb6fbf02a6 Use FileCheck to parameterize codegen tests over hashes
When things like our internal hashing or representations change,
it is inappropriate for these tests to suddenly fail for no reason.
The chance of error is reduced if we instead pattern-match.
2024-06-04 01:30:51 -07:00
Nicholas Nethercote
d063c7b6c8 Run rustfmt on tests/assembly/. 2024-05-30 16:15:46 +10:00
Daniel Paoliello
2e44d29460 Add support for Arm64EC inline assembly 2024-04-10 10:06:44 -07:00
许杰友 Jieyou Xu (Joe)
6e48b96692
[AUTO_GENERATED] Migrate compiletest to use ui_test-style //@ directives 2024-02-22 16:04:04 +00:00
Taiki Endo
ee41651d2f Support reg_addr register class in s390x inline assembly 2024-01-03 18:00:37 +09:00
Dario Nieuwenhuis
7de6d04bc8 Update the minimum external LLVM to 16. 2023-11-21 22:40:16 +01:00
Ben Kimock
33b0e4be06 Automatically enable cross-crate inlining for small functions 2023-10-17 19:53:51 -04:00
Ximin Luo
b65c2afdfd
Fix linkage for large binaries on mips64 platforms ...
... by enabling xgot feature

Co-Authored-By: Zixing Liu <zixing.liu@canonical.com>
2023-05-29 10:57:03 -06:00
zhaixiaojuan
5f2fa4c11d Add loongarch64 asm! support 2023-04-25 14:15:31 +08:00
Ezra Shaw
d31e8a499b
allow array-style simd in inline asm 2023-04-23 19:28:50 +12:00
Ian Douglas Scott
2ac8dee44f Add inline assembly support for m68k 2023-04-12 17:58:15 -07:00
Thom Chiovoloni
476737e03c Fix an assembly test with a hard-coded hash 2023-04-05 15:59:29 +00:00
Albert Larsan
cf2dff2b1e
Move /src/test to /tests 2023-01-11 09:32:08 +00:00