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Rollup merge of #116618 - chriswailes:riscv64-linux-android-vector, r=workingjubilee
Add the V (vector) extension to the riscv64-linux-android target spec This feature has been enabled and tested internally in the Android project.
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commit
f29dbe8885
@ -9,7 +9,7 @@ pub fn target() -> Target {
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options: TargetOptions {
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv64".into(),
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features: "+m,+a,+f,+d,+c,+Zba,+Zbb,+Zbs".into(),
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features: "+m,+a,+f,+d,+c,+zba,+zbb,+zbs,+v".into(),
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llvm_abiname: "lp64d".into(),
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supported_sanitizers: SanitizerSet::ADDRESS,
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max_atomic_width: Some(64),
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@ -45,3 +45,19 @@ The riscv64-linux-android target is supported as a Tier 3 target.
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A list of all supported targets can be found
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[here](../platform-support.html)
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## Architecture Notes
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### riscv64-linux-android
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Currently the `riscv64-linux-android` target requires the following architecture features/extensions:
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* `a` (atomics)
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* `d` (double-precision floating-point)
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* `c` (compressed instruction set)
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* `f` (single-precision floating-point)
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* `m` (multiplication and division)
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* `v` (vector)
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* `Zba` (address calculation instructions)
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* `Zbb` (base instructions)
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* `Zbs` (single-bit instructions)
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