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Reserve x18 on AArch64 and un-reserve x16
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@ -83,8 +83,8 @@ def_regs! {
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x13: reg = ["x13", "w13"],
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x14: reg = ["x14", "w14"],
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x15: reg = ["x15", "w15"],
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x16: reg = ["x16", "w16"],
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x17: reg = ["x17", "w17"],
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x18: reg = ["x18", "w18"],
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x20: reg = ["x20", "w20"],
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x21: reg = ["x21", "w21"],
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x22: reg = ["x22", "w22"],
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@ -127,8 +127,8 @@ def_regs! {
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v29: vreg = ["v29", "b29", "h29", "s29", "d29", "q29"],
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v30: vreg = ["v30", "b30", "h30", "s30", "d30", "q30"],
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v31: vreg = ["v31", "b31", "h31", "s31", "d31", "q31"],
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#error = ["x16", "w16"] =>
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"x16 is used internally by LLVM and cannot be used as an operand for inline asm",
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#error = ["x18", "w18"] =>
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"x18 is used as a reserved register on some targets and cannot be used as an operand for inline asm",
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#error = ["x19", "w19"] =>
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"x19 is used internally by LLVM and cannot be used as an operand for inline asm",
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#error = ["x29", "w29", "fp", "wfp"] =>
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@ -33,9 +33,9 @@ pub fn egetkey(request: &Align512<[u8; 512]>) -> Result<Align16<[u8; 16]>, u32>
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asm!(
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// rbx is reserved by LLVM
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"xchg {}, rbx",
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"xchg {0}, rbx",
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"enclu",
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"mov rbx, {}",
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"mov rbx, {0}",
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inout(reg) request => _,
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inlateout("eax") ENCLU_EGETKEY => error,
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in("rcx") out.as_mut_ptr(),
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@ -64,9 +64,9 @@ pub fn ereport(
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asm!(
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// rbx is reserved by LLVM
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"xchg {}, rbx",
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"xchg {0}, rbx",
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"enclu",
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"mov rbx, {}",
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"mov rbx, {0}",
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inout(reg) targetinfo => _,
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in("eax") ENCLU_EREPORT,
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in("rcx") reportdata,
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@ -681,7 +681,6 @@ Some registers cannot be used for input or output operands:
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| x86 | `mm[0-7]` | MMX registers are not currently supported (but may be in the future). |
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| x86 | `st([0-7])` | x87 registers are not currently supported (but may be in the future). |
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| AArch64 | `xzr` | This is a constant zero register which can't be modified. |
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| AArch64 | `x16` | This is used internally by LLVM for speculative load hardening. |
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| ARM | `pc` | This is the program counter, not a real register. |
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| ARM | `r9` | This is a reserved register on some ARM targets. |
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| MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. |
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@ -695,8 +694,8 @@ Some registers cannot be used for input or output operands:
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In some cases LLVM will allocate a "reserved register" for `reg` operands even though this register cannot be explicitly specified. Assembly code making use of reserved registers should be careful since `reg` operands may alias with those registers. Reserved registers are the frame pointer and base pointer
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- The frame pointer and LLVM base pointer on all architectures.
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- `x16` on AArch64.
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- `r6` and `r9` on ARM.
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- `r9` on ARM.
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- `x18` on AArch64.
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## Template modifiers
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