Reserve x18 on AArch64 and un-reserve x16

This commit is contained in:
Amanieu d'Antras 2021-04-30 18:30:30 +01:00
parent 09cfb248e7
commit ea310d9253
3 changed files with 9 additions and 10 deletions

View File

@ -83,8 +83,8 @@ def_regs! {
x13: reg = ["x13", "w13"],
x14: reg = ["x14", "w14"],
x15: reg = ["x15", "w15"],
x16: reg = ["x16", "w16"],
x17: reg = ["x17", "w17"],
x18: reg = ["x18", "w18"],
x20: reg = ["x20", "w20"],
x21: reg = ["x21", "w21"],
x22: reg = ["x22", "w22"],
@ -127,8 +127,8 @@ def_regs! {
v29: vreg = ["v29", "b29", "h29", "s29", "d29", "q29"],
v30: vreg = ["v30", "b30", "h30", "s30", "d30", "q30"],
v31: vreg = ["v31", "b31", "h31", "s31", "d31", "q31"],
#error = ["x16", "w16"] =>
"x16 is used internally by LLVM and cannot be used as an operand for inline asm",
#error = ["x18", "w18"] =>
"x18 is used as a reserved register on some targets and cannot be used as an operand for inline asm",
#error = ["x19", "w19"] =>
"x19 is used internally by LLVM and cannot be used as an operand for inline asm",
#error = ["x29", "w29", "fp", "wfp"] =>

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@ -33,9 +33,9 @@ pub fn egetkey(request: &Align512<[u8; 512]>) -> Result<Align16<[u8; 16]>, u32>
asm!(
// rbx is reserved by LLVM
"xchg {}, rbx",
"xchg {0}, rbx",
"enclu",
"mov rbx, {}",
"mov rbx, {0}",
inout(reg) request => _,
inlateout("eax") ENCLU_EGETKEY => error,
in("rcx") out.as_mut_ptr(),
@ -64,9 +64,9 @@ pub fn ereport(
asm!(
// rbx is reserved by LLVM
"xchg {}, rbx",
"xchg {0}, rbx",
"enclu",
"mov rbx, {}",
"mov rbx, {0}",
inout(reg) targetinfo => _,
in("eax") ENCLU_EREPORT,
in("rcx") reportdata,

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@ -681,7 +681,6 @@ Some registers cannot be used for input or output operands:
| x86 | `mm[0-7]` | MMX registers are not currently supported (but may be in the future). |
| x86 | `st([0-7])` | x87 registers are not currently supported (but may be in the future). |
| AArch64 | `xzr` | This is a constant zero register which can't be modified. |
| AArch64 | `x16` | This is used internally by LLVM for speculative load hardening. |
| ARM | `pc` | This is the program counter, not a real register. |
| ARM | `r9` | This is a reserved register on some ARM targets. |
| MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. |
@ -695,8 +694,8 @@ Some registers cannot be used for input or output operands:
In some cases LLVM will allocate a "reserved register" for `reg` operands even though this register cannot be explicitly specified. Assembly code making use of reserved registers should be careful since `reg` operands may alias with those registers. Reserved registers are the frame pointer and base pointer
- The frame pointer and LLVM base pointer on all architectures.
- `x16` on AArch64.
- `r6` and `r9` on ARM.
- `r9` on ARM.
- `x18` on AArch64.
## Template modifiers