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hexagon: adapt test for upstream output changes
The output of IR formatting changed slightly in upstream rev a0bc67e555f404d0e7ddb2e78cb891d96eaf913d (https://reviews.llvm.org/D123096). I'm not actually sure what any of that means, as I don't even know what hexagon is in this context, but this change allows the test to pass on both old and new LLVMs. r? @nikic
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@ -73,7 +73,7 @@ macro_rules! check_reg {
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// CHECK-LABEL: sym_static:
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// CHECK-LABEL: sym_static:
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// CHECK: InlineAsm Start
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// CHECK: InlineAsm Start
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// CHECK: r0 = #extern_static
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// CHECK: r0 = {{#+}}extern_static
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// CHECK: InlineAsm End
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// CHECK: InlineAsm End
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#[no_mangle]
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#[no_mangle]
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pub unsafe fn sym_static() {
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pub unsafe fn sym_static() {
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@ -88,7 +88,7 @@ pub unsafe fn sym_static() {
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// CHECK-LABEL: sym_fn:
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// CHECK-LABEL: sym_fn:
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// CHECK: InlineAsm Start
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// CHECK: InlineAsm Start
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// CHECK: r0 = #extern_func
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// CHECK: r0 = {{#+}}extern_func
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// CHECK: InlineAsm End
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// CHECK: InlineAsm End
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#[no_mangle]
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#[no_mangle]
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pub unsafe fn sym_fn() {
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pub unsafe fn sym_fn() {
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@ -108,7 +108,7 @@ pub unsafe fn sym_fn() {
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// CHECK: InlineAsm Start
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// CHECK: InlineAsm Start
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// CHECK: {
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// CHECK: {
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// CHECK: r{{[0-9]+}} = r0
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// CHECK: r{{[0-9]+}} = r0
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// CHECK: memw(r1) = r{{[0-9]+}}
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// CHECK: memw(r1{{(\+#0)?}}) = r{{[0-9]+}}
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// CHECK: }
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// CHECK: }
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// CHECK: InlineAsm End
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// CHECK: InlineAsm End
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#[no_mangle]
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#[no_mangle]
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