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https://github.com/rust-lang/rust.git
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Add various pointer & void-using x86 intrinsics.
This commit is contained in:
Huon Wilson
parent
2b45a9ab54
commit
c19e7b629b
@ -36,6 +36,20 @@
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "{0.width_mm}_maskload_{0.data_type}",
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"width": [128, 256],
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"llvm": "maskload.{0.data_type_short}{0.width_suffix}",
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"ret": ["f(32-64)"],
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"args": ["0SPc/S8", "0s->0"]
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},
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{
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"intrinsic": "{3.width_mm}_maskstore_{3.data_type}",
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"width": [128, 256],
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"llvm": "maskstore.{3.data_type_short}{3.width_suffix}",
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"ret": "V",
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"args": ["F(32-64)Pm/S8", "1Dsv->1Dv", "1Dv"]
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},
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{
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"intrinsic": "256_min_{0.data_type}",
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"width": [256],
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@ -78,6 +92,20 @@
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"ret": "f32",
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"args": ["f32"]
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},
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{
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"intrinsic": "256_storeu_{2.data_type}",
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"width": [256],
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"llvm": "storeu.ps.256",
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"ret": "V",
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"args": ["f(32-64)Pm/U8", "1D"]
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},
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{
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"intrinsic": "256_storeu_si256",
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"width": [256],
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"llvm": "storeu.dq.256",
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"ret": "V",
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"args": ["u8Pm/U8", "1D"]
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},
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{
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"intrinsic": "256_sqrt_{0.data_type}",
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"width": [256],
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@ -147,6 +175,20 @@
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"llvm": "ptestz.256",
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"ret": "S32",
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"args": ["u64", "u64"]
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},
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{
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"intrinsic": "256_zeroall",
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"width": [256],
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"llvm": "vzeroall",
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"ret": "V",
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"args": []
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},
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{
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"intrinsic": "256_zeroupper",
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"width": [256],
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"llvm": "vzeroupper",
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"ret": "V",
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"args": []
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}
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]
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}
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@ -4,21 +4,21 @@
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{
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"intrinsic": "256_abs_{0.data_type}",
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"width": [256],
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"llvm": "avx2.pabs.{0.data_type_short}",
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"llvm": "pabs.{0.data_type_short}",
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"ret": "s(8-32)",
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"args": ["0"]
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},
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{
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"intrinsic": "256_adds_{0.data_type}",
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"width": [256],
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"llvm": "avx2.padd{0.kind_short}s.{0.data_type_short}",
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"llvm": "padd{0.kind_short}s.{0.data_type_short}",
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"ret": "i(8-16)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "256_avg_{0.data_type}",
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"width": [256],
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"llvm": "avx2.pavg.{0.data_type_short}",
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"llvm": "pavg.{0.data_type_short}",
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"ret": "u(8-16)",
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"args": ["0", "0"]
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},
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@ -64,6 +64,48 @@
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"ret": "s16",
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"args": ["s8", "s8"]
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},
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{
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"intrinsic": "{0.width_mm}_mask_i32gather_{0.data_type}",
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"width": [128, 256],
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"llvm": "gather.d.{0.data_type_short}{0.width_suffix}",
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"ret": ["s32", "f32"],
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"args": ["0", "0SPc/S8", "s32", "0s->0", "S32/8"]
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},
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{
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"intrinsic": "{0.width_mm}_mask_i32gather_{0.data_type}",
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"width": [128, 256],
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"llvm": "gather.d.{0.data_type_short}{0.width_suffix}",
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"ret": ["s64", "f64"],
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"args": ["0", "0SPc/S8", "s32x128", "0s->0", "S32/8"]
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},
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{
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"intrinsic": "{3.width_mm}_mask_i64gather_{0.data_type}",
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"width": [128, 256],
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"llvm": "gather.q.{0.data_type_short}{0.width_suffix}",
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"ret": ["s32x128", "f32x128"],
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"args": ["0", "0SPc/S8", "s64", "0s->0", "S32/8"]
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},
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{
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"intrinsic": "{0.width_mm}_mask_i64gather_{0.data_type}",
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"width": [128, 256],
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"llvm": "gather.q.{0.data_type_short}{0.width_suffix}",
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"ret": ["s64", "f64"],
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"args": ["0", "0SPc/S8", "s64", "0s->0", "S32/8"]
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},
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{
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"intrinsic": "{0.width_mm}_maskload_{0.data_type}",
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"width": [128, 256],
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"llvm": "maskload.{0.data_type_short}{0.width_suffix}",
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"ret": ["s(32-64)"],
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"args": ["0Pc/S8", "0"]
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},
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{
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"intrinsic": "{2.width_mm}_maskstore_{2.data_type}",
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"width": [128, 256],
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"llvm": "maskstore.{2.data_type_short}{2.width_suffix}",
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"ret": "V",
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"args": ["S(32-64)Pm/S8", "1Dv", "2"]
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},
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{
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"intrinsic": "256_max_{0.data_type}",
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"width": [256],
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@ -42,6 +42,13 @@
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"llvm": "!llvm.sqrt.v4f32",
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"ret": "f32",
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"args": ["0"]
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},
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{
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"intrinsic": "_storeu_ps",
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"width": [128],
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"llvm": "storeu.ps",
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"ret": "V",
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"args": ["F32Pm/S8", "f32"]
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}
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]
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}
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@ -15,6 +15,13 @@
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"ret": "u(8-16)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "_lfence",
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"width": [128],
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"llvm": "lfence",
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"ret": "V",
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"args": []
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},
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{
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"intrinsic": "_madd_epi16",
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"width": [128],
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@ -22,6 +29,13 @@
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"ret": "s32",
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"args": ["s16", "s16"]
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},
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{
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"intrinsic": "_maskmoveu_si128",
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"width": [128],
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"llvm": "maskmov.dqu",
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"ret": "V",
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"args": ["u8", "u8", "U8Pm"]
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},
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{
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"intrinsic": "_max_{0.data_type}",
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"width": [128],
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@ -36,6 +50,13 @@
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"ret": "f64",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "_mfence",
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"width": [128],
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"llvm": "fence",
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"ret": "V",
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"args": []
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},
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{
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"intrinsic": "_min_{0.data_type}",
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"width": [128],
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@ -99,6 +120,13 @@
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"ret": "u64",
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"args": ["u8", "u8"]
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},
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{
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"intrinsic": "_sfence",
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"width": [128],
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"llvm": "sfence",
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"ret": "V",
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"args": []
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},
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{
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"intrinsic": "_sqrt_pd",
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"width": [128],
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@ -106,6 +134,20 @@
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"ret": "f64",
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"args": ["0"]
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},
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{
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"intrinsic": "_storeu_pd",
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"width": [128],
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"llvm": "storeu.pd",
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"ret": "V",
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"args": ["F64Pm/U8", "f64"]
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},
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{
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"intrinsic": "_storeu_si128",
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"width": [128],
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"llvm": "storeu.dq",
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"ret": "V",
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"args": ["u8Pm/U8", "u8"]
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},
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{
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"intrinsic": "_subs_{0.data_type}",
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"width": [128],
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@ -21,6 +21,13 @@
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"llvm": "hsub.{0.data_type}",
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"ret": "f(32-64)",
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"args": ["0", "0"]
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},
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{
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"intrinsic": "_lddqu_si128",
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"width": [128],
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"llvm": "ldu.dq",
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"ret": "u8",
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"args": ["0Pc/S8"]
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}
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]
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}
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@ -13,7 +13,7 @@
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#![allow(unused_imports)]
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use {Intrinsic, i, i_, u, u_, f, v, agg, p, void};
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use {Intrinsic, i, i_, u, u_, f, v, v_, agg, p, void};
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use IntrinsicDef::Named;
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use rustc::middle::ty;
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@ -50,6 +50,11 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: v(f(32), 4),
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definition: Named("llvm.sqrt.v4f32")
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},
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"_storeu_ps" => Intrinsic {
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inputs: vec![p(false, f(32), Some(i(8))), v(f(32), 4)],
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output: void(),
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definition: Named("llvm.x86.sse.storeu.ps")
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},
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"_adds_epi8" => Intrinsic {
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inputs: vec![v(i(8), 16), v(i(8), 16)],
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output: v(i(8), 16),
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@ -80,11 +85,21 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: v(u(16), 8),
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definition: Named("llvm.x86.sse2.pavg.w")
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},
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"_lfence" => Intrinsic {
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inputs: vec![],
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output: void(),
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definition: Named("llvm.x86.sse2.lfence")
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},
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"_madd_epi16" => Intrinsic {
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inputs: vec![v(i(16), 8), v(i(16), 8)],
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output: v(i(32), 4),
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definition: Named("llvm.x86.sse2.pmadd.wd")
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},
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"_maskmoveu_si128" => Intrinsic {
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inputs: vec![v(u(8), 16), v(u(8), 16), p(false, u(8), None)],
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output: void(),
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definition: Named("llvm.x86.sse2.maskmov.dqu")
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},
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"_max_epi16" => Intrinsic {
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inputs: vec![v(i(16), 8), v(i(16), 8)],
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output: v(i(16), 8),
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@ -100,6 +115,11 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: v(f(64), 2),
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definition: Named("llvm.x86.sse2.max.pd")
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},
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"_mfence" => Intrinsic {
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inputs: vec![],
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output: void(),
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definition: Named("llvm.x86.sse2.fence")
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},
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"_min_epi16" => Intrinsic {
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inputs: vec![v(i(16), 8), v(i(16), 8)],
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output: v(i(16), 8),
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@ -160,11 +180,26 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: v(u(64), 2),
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definition: Named("llvm.x86.sse2.psad.bw")
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},
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"_sfence" => Intrinsic {
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inputs: vec![],
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output: void(),
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definition: Named("llvm.x86.sse2.sfence")
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},
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"_sqrt_pd" => Intrinsic {
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inputs: vec![v(f(64), 2)],
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output: v(f(64), 2),
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definition: Named("llvm.sqrt.v2f64")
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},
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"_storeu_pd" => Intrinsic {
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inputs: vec![p(false, f(64), Some(u(8))), v(f(64), 2)],
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output: void(),
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definition: Named("llvm.x86.sse2.storeu.pd")
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},
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"_storeu_si128" => Intrinsic {
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inputs: vec![p(false, v(u(8), 16), Some(u(8))), v(u(8), 16)],
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output: void(),
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definition: Named("llvm.x86.sse2.storeu.dq")
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},
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"_subs_epi8" => Intrinsic {
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inputs: vec![v(i(8), 16), v(i(8), 16)],
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output: v(i(8), 16),
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@ -215,6 +250,11 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: v(f(64), 2),
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definition: Named("llvm.x86.sse3.hsub.pd")
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},
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"_lddqu_si128" => Intrinsic {
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inputs: vec![p(true, v(u(8), 16), Some(i(8)))],
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output: v(u(8), 16),
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definition: Named("llvm.x86.sse3.ldu.dq")
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},
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"_abs_epi8" => Intrinsic {
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inputs: vec![v(i(8), 16)],
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output: v(i(8), 16),
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@ -490,6 +530,46 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: v(f(64), 4),
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definition: Named("llvm.x86.avx.max.pd.256")
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},
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"_maskload_ps" => Intrinsic {
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inputs: vec![p(true, f(32), Some(i(8))), v_(i(32), f(32), 4)],
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output: v(f(32), 4),
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definition: Named("llvm.x86.avx.maskload.ps")
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},
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"_maskload_pd" => Intrinsic {
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inputs: vec![p(true, f(64), Some(i(8))), v_(i(64), f(64), 2)],
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output: v(f(64), 2),
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definition: Named("llvm.x86.avx.maskload.pd")
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},
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"256_maskload_ps" => Intrinsic {
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inputs: vec![p(true, f(32), Some(i(8))), v_(i(32), f(32), 8)],
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output: v(f(32), 8),
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definition: Named("llvm.x86.avx.maskload.ps.256")
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},
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"256_maskload_pd" => Intrinsic {
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inputs: vec![p(true, f(64), Some(i(8))), v_(i(64), f(64), 4)],
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output: v(f(64), 4),
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definition: Named("llvm.x86.avx.maskload.pd.256")
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},
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"_maskstore_ps" => Intrinsic {
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inputs: vec![p(false, f(32), Some(i(8))), v_(i(32), f(32), 4), v(f(32), 4)],
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output: void(),
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definition: Named("llvm.x86.avx.maskstore.ps")
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},
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"_maskstore_pd" => Intrinsic {
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inputs: vec![p(false, f(64), Some(i(8))), v_(i(64), f(64), 2), v(f(64), 2)],
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output: void(),
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definition: Named("llvm.x86.avx.maskstore.pd")
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},
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"256_maskstore_ps" => Intrinsic {
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inputs: vec![p(false, f(32), Some(i(8))), v_(i(32), f(32), 8), v(f(32), 8)],
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output: void(),
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definition: Named("llvm.x86.avx.maskstore.ps.256")
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},
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"256_maskstore_pd" => Intrinsic {
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inputs: vec![p(false, f(64), Some(i(8))), v_(i(64), f(64), 4), v(f(64), 4)],
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output: void(),
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definition: Named("llvm.x86.avx.maskstore.pd.256")
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},
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"256_min_ps" => Intrinsic {
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inputs: vec![v(f(32), 8), v(f(32), 8)],
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output: v(f(32), 8),
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@ -540,6 +620,21 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: v(f(32), 8),
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definition: Named("llvm.x86.avx.rsqrt.ps.256")
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},
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"256_storeu_ps" => Intrinsic {
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inputs: vec![p(false, v(f(32), 8), Some(u(8))), v(f(32), 8)],
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output: void(),
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definition: Named("llvm.x86.avx.storeu.ps.256")
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},
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"256_storeu_pd" => Intrinsic {
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inputs: vec![p(false, v(f(64), 4), Some(u(8))), v(f(64), 4)],
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output: void(),
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definition: Named("llvm.x86.avx.storeu.ps.256")
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},
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"256_storeu_si256" => Intrinsic {
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inputs: vec![p(false, v(u(8), 32), Some(u(8))), v(u(8), 32)],
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output: void(),
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definition: Named("llvm.x86.avx.storeu.dq.256")
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},
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"256_sqrt_ps" => Intrinsic {
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inputs: vec![v(f(32), 8)],
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output: v(f(32), 8),
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@ -625,50 +720,60 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
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output: i(32),
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definition: Named("llvm.x86.avx.ptestz.256")
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},
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"256_zeroall" => Intrinsic {
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inputs: vec![],
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output: void(),
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definition: Named("llvm.x86.avx.vzeroall")
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},
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"256_zeroupper" => Intrinsic {
|
||||
inputs: vec![],
|
||||
output: void(),
|
||||
definition: Named("llvm.x86.avx.vzeroupper")
|
||||
},
|
||||
"256_abs_epi8" => Intrinsic {
|
||||
inputs: vec![v(i(8), 32)],
|
||||
output: v(i(8), 32),
|
||||
definition: Named("llvm.x86.avx2.avx2.pabs.b")
|
||||
definition: Named("llvm.x86.avx2.pabs.b")
|
||||
},
|
||||
"256_abs_epi16" => Intrinsic {
|
||||
inputs: vec![v(i(16), 16)],
|
||||
output: v(i(16), 16),
|
||||
definition: Named("llvm.x86.avx2.avx2.pabs.w")
|
||||
definition: Named("llvm.x86.avx2.pabs.w")
|
||||
},
|
||||
"256_abs_epi32" => Intrinsic {
|
||||
inputs: vec![v(i(32), 8)],
|
||||
output: v(i(32), 8),
|
||||
definition: Named("llvm.x86.avx2.avx2.pabs.d")
|
||||
definition: Named("llvm.x86.avx2.pabs.d")
|
||||
},
|
||||
"256_adds_epi8" => Intrinsic {
|
||||
inputs: vec![v(i(8), 32), v(i(8), 32)],
|
||||
output: v(i(8), 32),
|
||||
definition: Named("llvm.x86.avx2.avx2.padds.b")
|
||||
definition: Named("llvm.x86.avx2.padds.b")
|
||||
},
|
||||
"256_adds_epu8" => Intrinsic {
|
||||
inputs: vec![v(u(8), 32), v(u(8), 32)],
|
||||
output: v(u(8), 32),
|
||||
definition: Named("llvm.x86.avx2.avx2.paddus.b")
|
||||
definition: Named("llvm.x86.avx2.paddus.b")
|
||||
},
|
||||
"256_adds_epi16" => Intrinsic {
|
||||
inputs: vec![v(i(16), 16), v(i(16), 16)],
|
||||
output: v(i(16), 16),
|
||||
definition: Named("llvm.x86.avx2.avx2.padds.w")
|
||||
definition: Named("llvm.x86.avx2.padds.w")
|
||||
},
|
||||
"256_adds_epu16" => Intrinsic {
|
||||
inputs: vec![v(u(16), 16), v(u(16), 16)],
|
||||
output: v(u(16), 16),
|
||||
definition: Named("llvm.x86.avx2.avx2.paddus.w")
|
||||
definition: Named("llvm.x86.avx2.paddus.w")
|
||||
},
|
||||
"256_avg_epu8" => Intrinsic {
|
||||
inputs: vec![v(u(8), 32), v(u(8), 32)],
|
||||
output: v(u(8), 32),
|
||||
definition: Named("llvm.x86.avx2.avx2.pavg.b")
|
||||
definition: Named("llvm.x86.avx2.pavg.b")
|
||||
},
|
||||
"256_avg_epu16" => Intrinsic {
|
||||
inputs: vec![v(u(16), 16), v(u(16), 16)],
|
||||
output: v(u(16), 16),
|
||||
definition: Named("llvm.x86.avx2.avx2.pavg.w")
|
||||
definition: Named("llvm.x86.avx2.pavg.w")
|
||||
},
|
||||
"256_hadd_epi16" => Intrinsic {
|
||||
inputs: vec![v(i(16), 16), v(i(16), 16)],
|
||||
@ -710,6 +815,126 @@ pub fn find<'tcx>(_tcx: &ty::ctxt<'tcx>, name: &str) -> Option<Intrinsic> {
|
||||
output: v(i(16), 16),
|
||||
definition: Named("llvm.x86.avx2.pmadd.ub.sw")
|
||||
},
|
||||
"_mask_i32gather_epi32" => Intrinsic {
|
||||
inputs: vec![v(i(32), 4), p(true, i(32), Some(i(8))), v(i(32), 4), v(i(32), 4), i_(32, 8)],
|
||||
output: v(i(32), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.d.d")
|
||||
},
|
||||
"_mask_i32gather_ps" => Intrinsic {
|
||||
inputs: vec![v(f(32), 4), p(true, f(32), Some(i(8))), v(i(32), 4), v_(i(32), f(32), 4), i_(32, 8)],
|
||||
output: v(f(32), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.d.ps")
|
||||
},
|
||||
"256_mask_i32gather_epi32" => Intrinsic {
|
||||
inputs: vec![v(i(32), 8), p(true, i(32), Some(i(8))), v(i(32), 8), v(i(32), 8), i_(32, 8)],
|
||||
output: v(i(32), 8),
|
||||
definition: Named("llvm.x86.avx2.gather.d.d.256")
|
||||
},
|
||||
"256_mask_i32gather_ps" => Intrinsic {
|
||||
inputs: vec![v(f(32), 8), p(true, f(32), Some(i(8))), v(i(32), 8), v_(i(32), f(32), 8), i_(32, 8)],
|
||||
output: v(f(32), 8),
|
||||
definition: Named("llvm.x86.avx2.gather.d.ps.256")
|
||||
},
|
||||
"_mask_i32gather_epi64" => Intrinsic {
|
||||
inputs: vec![v(i(64), 2), p(true, i(64), Some(i(8))), v(i(32), 4), v(i(64), 2), i_(32, 8)],
|
||||
output: v(i(64), 2),
|
||||
definition: Named("llvm.x86.avx2.gather.d.q")
|
||||
},
|
||||
"_mask_i32gather_pd" => Intrinsic {
|
||||
inputs: vec![v(f(64), 2), p(true, f(64), Some(i(8))), v(i(32), 4), v_(i(64), f(64), 2), i_(32, 8)],
|
||||
output: v(f(64), 2),
|
||||
definition: Named("llvm.x86.avx2.gather.d.pd")
|
||||
},
|
||||
"256_mask_i32gather_epi64" => Intrinsic {
|
||||
inputs: vec![v(i(64), 4), p(true, i(64), Some(i(8))), v(i(32), 4), v(i(64), 4), i_(32, 8)],
|
||||
output: v(i(64), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.d.q.256")
|
||||
},
|
||||
"256_mask_i32gather_pd" => Intrinsic {
|
||||
inputs: vec![v(f(64), 4), p(true, f(64), Some(i(8))), v(i(32), 4), v_(i(64), f(64), 4), i_(32, 8)],
|
||||
output: v(f(64), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.d.pd.256")
|
||||
},
|
||||
"_mask_i64gather_epi32" => Intrinsic {
|
||||
inputs: vec![v(i(32), 4), p(true, i(32), Some(i(8))), v(i(64), 2), v(i(32), 4), i_(32, 8)],
|
||||
output: v(i(32), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.q.d")
|
||||
},
|
||||
"_mask_i64gather_ps" => Intrinsic {
|
||||
inputs: vec![v(f(32), 4), p(true, f(32), Some(i(8))), v(i(64), 2), v_(i(32), f(32), 4), i_(32, 8)],
|
||||
output: v(f(32), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.q.ps")
|
||||
},
|
||||
"256_mask_i64gather_epi32" => Intrinsic {
|
||||
inputs: vec![v(i(32), 4), p(true, i(32), Some(i(8))), v(i(64), 4), v(i(32), 4), i_(32, 8)],
|
||||
output: v(i(32), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.q.d")
|
||||
},
|
||||
"256_mask_i64gather_ps" => Intrinsic {
|
||||
inputs: vec![v(f(32), 4), p(true, f(32), Some(i(8))), v(i(64), 4), v_(i(32), f(32), 4), i_(32, 8)],
|
||||
output: v(f(32), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.q.ps")
|
||||
},
|
||||
"_mask_i64gather_epi64" => Intrinsic {
|
||||
inputs: vec![v(i(64), 2), p(true, i(64), Some(i(8))), v(i(64), 2), v(i(64), 2), i_(32, 8)],
|
||||
output: v(i(64), 2),
|
||||
definition: Named("llvm.x86.avx2.gather.q.q")
|
||||
},
|
||||
"_mask_i64gather_pd" => Intrinsic {
|
||||
inputs: vec![v(f(64), 2), p(true, f(64), Some(i(8))), v(i(64), 2), v_(i(64), f(64), 2), i_(32, 8)],
|
||||
output: v(f(64), 2),
|
||||
definition: Named("llvm.x86.avx2.gather.q.pd")
|
||||
},
|
||||
"256_mask_i64gather_epi64" => Intrinsic {
|
||||
inputs: vec![v(i(64), 4), p(true, i(64), Some(i(8))), v(i(64), 4), v(i(64), 4), i_(32, 8)],
|
||||
output: v(i(64), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.q.q.256")
|
||||
},
|
||||
"256_mask_i64gather_pd" => Intrinsic {
|
||||
inputs: vec![v(f(64), 4), p(true, f(64), Some(i(8))), v(i(64), 4), v_(i(64), f(64), 4), i_(32, 8)],
|
||||
output: v(f(64), 4),
|
||||
definition: Named("llvm.x86.avx2.gather.q.pd.256")
|
||||
},
|
||||
"_maskload_epi32" => Intrinsic {
|
||||
inputs: vec![p(true, v(i(32), 4), Some(i(8))), v(i(32), 4)],
|
||||
output: v(i(32), 4),
|
||||
definition: Named("llvm.x86.avx2.maskload.d")
|
||||
},
|
||||
"_maskload_epi64" => Intrinsic {
|
||||
inputs: vec![p(true, v(i(64), 2), Some(i(8))), v(i(64), 2)],
|
||||
output: v(i(64), 2),
|
||||
definition: Named("llvm.x86.avx2.maskload.q")
|
||||
},
|
||||
"256_maskload_epi32" => Intrinsic {
|
||||
inputs: vec![p(true, v(i(32), 8), Some(i(8))), v(i(32), 8)],
|
||||
output: v(i(32), 8),
|
||||
definition: Named("llvm.x86.avx2.maskload.d.256")
|
||||
},
|
||||
"256_maskload_epi64" => Intrinsic {
|
||||
inputs: vec![p(true, v(i(64), 4), Some(i(8))), v(i(64), 4)],
|
||||
output: v(i(64), 4),
|
||||
definition: Named("llvm.x86.avx2.maskload.q.256")
|
||||
},
|
||||
"_maskstore_epi32" => Intrinsic {
|
||||
inputs: vec![p(false, i(32), Some(i(8))), v(i(32), 4), v(i(32), 4)],
|
||||
output: void(),
|
||||
definition: Named("llvm.x86.avx2.maskstore.d")
|
||||
},
|
||||
"_maskstore_epi64" => Intrinsic {
|
||||
inputs: vec![p(false, i(64), Some(i(8))), v(i(64), 2), v(i(64), 2)],
|
||||
output: void(),
|
||||
definition: Named("llvm.x86.avx2.maskstore.q")
|
||||
},
|
||||
"256_maskstore_epi32" => Intrinsic {
|
||||
inputs: vec![p(false, i(32), Some(i(8))), v(i(32), 8), v(i(32), 8)],
|
||||
output: void(),
|
||||
definition: Named("llvm.x86.avx2.maskstore.d.256")
|
||||
},
|
||||
"256_maskstore_epi64" => Intrinsic {
|
||||
inputs: vec![p(false, i(64), Some(i(8))), v(i(64), 4), v(i(64), 4)],
|
||||
output: void(),
|
||||
definition: Named("llvm.x86.avx2.maskstore.q.256")
|
||||
},
|
||||
"256_max_epi8" => Intrinsic {
|
||||
inputs: vec![v(i(8), 32), v(i(8), 32)],
|
||||
output: v(i(8), 32),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user