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Rollup merge of #97663 - RalfJung:keine-halben-sachen, r=oli-obk
take back half-baked noaliasing check in Assignment Doing an aliasing check in `copy_op` does not make a ton of sense. We have to eventually do something in the `Assignment` statement handling instead.
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commit
a6d7939855
@ -869,8 +869,6 @@ where
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Ok(src_val) => {
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Ok(src_val) => {
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assert!(!src.layout.is_unsized(), "cannot have unsized immediates");
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assert!(!src.layout.is_unsized(), "cannot have unsized immediates");
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// Yay, we got a value that we can write directly.
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// Yay, we got a value that we can write directly.
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// FIXME: Add a check to make sure that if `src` is indirect,
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// it does not overlap with `dest`.
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return self.write_immediate_no_validate(*src_val, dest);
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return self.write_immediate_no_validate(*src_val, dest);
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}
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}
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Err(mplace) => mplace,
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Err(mplace) => mplace,
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@ -890,7 +888,7 @@ where
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});
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});
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assert_eq!(src.meta, dest.meta, "Can only copy between equally-sized instances");
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assert_eq!(src.meta, dest.meta, "Can only copy between equally-sized instances");
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self.mem_copy(src.ptr, src.align, dest.ptr, dest.align, size, /*nonoverlapping*/ true)
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self.mem_copy(src.ptr, src.align, dest.ptr, dest.align, size, /*nonoverlapping*/ false)
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}
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}
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/// Copies the data from an operand to a place. The layouts may disagree, but they must
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/// Copies the data from an operand to a place. The layouts may disagree, but they must
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@ -158,6 +158,8 @@ impl<'mir, 'tcx: 'mir, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
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place: mir::Place<'tcx>,
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place: mir::Place<'tcx>,
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) -> InterpResult<'tcx> {
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) -> InterpResult<'tcx> {
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let dest = self.eval_place(place)?;
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let dest = self.eval_place(place)?;
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// FIXME: ensure some kind of non-aliasing between LHS and RHS?
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// Also see https://github.com/rust-lang/rust/issues/68364.
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use rustc_middle::mir::Rvalue::*;
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use rustc_middle::mir::Rvalue::*;
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match *rvalue {
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match *rvalue {
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