Rollup merge of #97663 - RalfJung:keine-halben-sachen, r=oli-obk

take back half-baked noaliasing check in Assignment

Doing an aliasing check in `copy_op` does not make a ton of sense. We have to eventually do something in the `Assignment` statement handling instead.
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Dylan DPC 2022-06-03 11:18:25 +02:00 committed by GitHub
commit a6d7939855
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2 changed files with 3 additions and 3 deletions

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@ -869,8 +869,6 @@ where
Ok(src_val) => { Ok(src_val) => {
assert!(!src.layout.is_unsized(), "cannot have unsized immediates"); assert!(!src.layout.is_unsized(), "cannot have unsized immediates");
// Yay, we got a value that we can write directly. // Yay, we got a value that we can write directly.
// FIXME: Add a check to make sure that if `src` is indirect,
// it does not overlap with `dest`.
return self.write_immediate_no_validate(*src_val, dest); return self.write_immediate_no_validate(*src_val, dest);
} }
Err(mplace) => mplace, Err(mplace) => mplace,
@ -890,7 +888,7 @@ where
}); });
assert_eq!(src.meta, dest.meta, "Can only copy between equally-sized instances"); assert_eq!(src.meta, dest.meta, "Can only copy between equally-sized instances");
self.mem_copy(src.ptr, src.align, dest.ptr, dest.align, size, /*nonoverlapping*/ true) self.mem_copy(src.ptr, src.align, dest.ptr, dest.align, size, /*nonoverlapping*/ false)
} }
/// Copies the data from an operand to a place. The layouts may disagree, but they must /// Copies the data from an operand to a place. The layouts may disagree, but they must

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@ -158,6 +158,8 @@ impl<'mir, 'tcx: 'mir, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
place: mir::Place<'tcx>, place: mir::Place<'tcx>,
) -> InterpResult<'tcx> { ) -> InterpResult<'tcx> {
let dest = self.eval_place(place)?; let dest = self.eval_place(place)?;
// FIXME: ensure some kind of non-aliasing between LHS and RHS?
// Also see https://github.com/rust-lang/rust/issues/68364.
use rustc_middle::mir::Rvalue::*; use rustc_middle::mir::Rvalue::*;
match *rvalue { match *rvalue {