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adapt issue-37945 codegen test to accept any order of ops
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@ -17,7 +17,9 @@ pub fn is_empty_1(xs: Iter<f32>) -> bool {
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// CHECK-NEXT: start:
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// CHECK-NEXT: [[A:%.*]] = icmp ne {{i32\*|ptr}} %xs.1, null
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// CHECK-NEXT: tail call void @llvm.assume(i1 [[A]])
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// CHECK-NEXT: [[B:%.*]] = icmp eq {{i32\*|ptr}} %xs.1, %xs.0
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// The order between %xs.0 and %xs.1 on the next line doesn't matter
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// and different LLVM versions produce different order.
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// CHECK-NEXT: [[B:%.*]] = icmp eq {{i32\*|ptr}} {{%xs.0, %xs.1|%xs.1, %xs.0}}
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// CHECK-NEXT: ret i1 [[B:%.*]]
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{xs}.next().is_none()
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}
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@ -28,7 +30,9 @@ pub fn is_empty_2(xs: Iter<f32>) -> bool {
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// CHECK-NEXT: start:
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// CHECK-NEXT: [[C:%.*]] = icmp ne {{i32\*|ptr}} %xs.1, null
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// CHECK-NEXT: tail call void @llvm.assume(i1 [[C]])
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// CHECK-NEXT: [[D:%.*]] = icmp eq {{i32\*|ptr}} %xs.1, %xs.0
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// The order between %xs.0 and %xs.1 on the next line doesn't matter
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// and different LLVM versions produce different order.
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// CHECK-NEXT: [[D:%.*]] = icmp eq {{i32\*|ptr}} {{%xs.0, %xs.1|%xs.1, %xs.0}}
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// CHECK-NEXT: ret i1 [[D:%.*]]
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xs.map(|&x| x).next().is_none()
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}
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