Auto merge of #112374 - chenx97:better-mips64r6, r=jackh726

add mips64r6 and mips32r6 as target_arch values

This PR introduces `"mips32r6"` and `"mips64r6"` as valid `target_arch` values, and would be the arch value used by Tier-3 targets `mipsisa32r6-unknown-linux-gnu`, `mipsisa32r6el-unknown-linux-gnu`, `mipsisa64r6-unknown-linux-gnuabi64` and `mipsisa64r6el-unknown-linux-gnuabi64`.

This PR was inspired by `rustix` attempting to link traditional mips64el objects with mips64r6el objects when building for mips64r6, even though `rustix` recently removed outline assembly support. This is because currently this target's `target_arch` is `"mips64"` and rustix has its respective assembly implementation as well as a pre-compiled little-endian static library prepared for mips64el, a tier-2 target with the same `target_arch`. After some [discussions on zulip](https://rust-lang.zulipchat.com/#narrow/stream/233931-t-compiler.2Fmajor-changes/topic/Add.20New.20Values.20To.20MIPS_ALLOWED_FEATURES.20compiler-team.23595), I decided to treat mips64r6 as an independent architecture from Rust's POV, since these two architectures are incompatible anyway.

This PR is now waiting for `libc` to release a new version with [support](https://github.com/rust-lang/libc/pull/3268) for these `target_arch` values. It is not expected to introduce changes to any other target, especially Tier-1 and Tier-2 targets.

This PR has its corresponding [MCP](https://github.com/rust-lang/compiler-team/issues/632) approved.

compiler/rustc_codegen_cranelift/example/float-minmax-pass.rs

@@ -22,7 +22,7 @@ fn main() {
 
     #[cfg(not(any(target_arch = "mips", target_arch = "mips64")))]
     let nan = f32::NAN;
-    // MIPS hardware treats f32::NAN as SNAN. Clear the signaling bit.
+    // MIPS hardware except MIPS R6 treats f32::NAN as SNAN. Clear the signaling bit.
     // See https://github.com/rust-lang/rust/issues/52746.
     #[cfg(any(target_arch = "mips", target_arch = "mips64"))]
     let nan = f32::from_bits(f32::NAN.to_bits() - 1);

compiler/rustc_codegen_gcc/example/alloc_system.rs

@@ -10,6 +10,7 @@
 #[cfg(any(target_arch = "x86",
               target_arch = "arm",
               target_arch = "mips",
+              target_arch = "mips32r6",
               target_arch = "powerpc",
               target_arch = "powerpc64"))]
 const MIN_ALIGN: usize = 8;
@@ -17,6 +18,7 @@ const MIN_ALIGN: usize = 8;
               target_arch = "aarch64",
               target_arch = "loongarch64",
               target_arch = "mips64",
+              target_arch = "mips64r6",
               target_arch = "s390x",
               target_arch = "sparc64"))]
 const MIN_ALIGN: usize = 16;

compiler/rustc_codegen_ssa/src/back/metadata.rs

@@ -193,8 +193,8 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
         }
         "x86" => Architecture::I386,
         "s390x" => Architecture::S390x,
-        "mips" => Architecture::Mips,
+        "mips" | "mips32r6" => Architecture::Mips,
-        "mips64" => Architecture::Mips64,
+        "mips64" | "mips64r6" => Architecture::Mips64,
         "x86_64" => {
             if sess.target.pointer_width == 32 {
                 Architecture::X86_64_X32

compiler/rustc_codegen_ssa/src/target_features.rs

@@ -321,7 +321,7 @@ pub fn supported_target_features(sess: &Session) -> &'static [(&'static str, Opt
         "aarch64" => AARCH64_ALLOWED_FEATURES,
         "x86" | "x86_64" => X86_ALLOWED_FEATURES,
         "hexagon" => HEXAGON_ALLOWED_FEATURES,
-        "mips" | "mips64" => MIPS_ALLOWED_FEATURES,
+        "mips" | "mips32r6" | "mips64" | "mips64r6" => MIPS_ALLOWED_FEATURES,
         "powerpc" | "powerpc64" => POWERPC_ALLOWED_FEATURES,
         "riscv32" | "riscv64" => RISCV_ALLOWED_FEATURES,
         "wasm32" | "wasm64" => WASM_ALLOWED_FEATURES,

compiler/rustc_target/src/abi/call/mod.rs

@@ -693,8 +693,8 @@ impl<'a, Ty> FnAbi<'a, Ty> {
             "avr" => avr::compute_abi_info(self),
             "loongarch64" => loongarch::compute_abi_info(cx, self),
             "m68k" => m68k::compute_abi_info(self),
-            "mips" => mips::compute_abi_info(cx, self),
+            "mips" | "mips32r6" => mips::compute_abi_info(cx, self),
-            "mips64" => mips64::compute_abi_info(cx, self),
+            "mips64" | "mips64r6" => mips64::compute_abi_info(cx, self),
             "powerpc" => powerpc::compute_abi_info(self),
             "powerpc64" => powerpc64::compute_abi_info(cx, self),
             "s390x" => s390x::compute_abi_info(cx, self),

compiler/rustc_target/src/asm/mod.rs

@@ -238,8 +238,8 @@ impl FromStr for InlineAsmArch {
             "powerpc64" => Ok(Self::PowerPC64),
             "hexagon" => Ok(Self::Hexagon),
             "loongarch64" => Ok(Self::LoongArch64),
-            "mips" => Ok(Self::Mips),
+            "mips" | "mips32r6" => Ok(Self::Mips),
-            "mips64" => Ok(Self::Mips64),
+            "mips64" | "mips64r6" => Ok(Self::Mips64),
             "s390x" => Ok(Self::S390x),
             "spirv" => Ok(Self::SpirV),
             "wasm32" => Ok(Self::Wasm32),

compiler/rustc_target/src/spec/mipsisa32r6_unknown_linux_gnu.rs

@@ -6,7 +6,7 @@ pub fn target() -> Target {
         llvm_target: "mipsisa32r6-unknown-linux-gnu".into(),
         pointer_width: 32,
         data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(),
-        arch: "mips".into(),
+        arch: "mips32r6".into(),
         options: TargetOptions {
             endian: Endian::Big,
             cpu: "mips32r6".into(),

compiler/rustc_target/src/spec/mipsisa32r6el_unknown_linux_gnu.rs

@@ -5,7 +5,7 @@ pub fn target() -> Target {
         llvm_target: "mipsisa32r6el-unknown-linux-gnu".into(),
         pointer_width: 32,
         data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(),
-        arch: "mips".into(),
+        arch: "mips32r6".into(),
 
         options: TargetOptions {
             cpu: "mips32r6".into(),

compiler/rustc_target/src/spec/mipsisa64r6_unknown_linux_gnuabi64.rs

@@ -6,7 +6,7 @@ pub fn target() -> Target {
         llvm_target: "mipsisa64r6-unknown-linux-gnuabi64".into(),
         pointer_width: 64,
         data_layout: "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(),
-        arch: "mips64".into(),
+        arch: "mips64r6".into(),
         options: TargetOptions {
             abi: "abi64".into(),
             endian: Endian::Big,

compiler/rustc_target/src/spec/mipsisa64r6el_unknown_linux_gnuabi64.rs

@@ -5,7 +5,7 @@ pub fn target() -> Target {
         llvm_target: "mipsisa64r6el-unknown-linux-gnuabi64".into(),
         pointer_width: 64,
         data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128".into(),
-        arch: "mips64".into(),
+        arch: "mips64r6".into(),
         options: TargetOptions {
             abi: "abi64".into(),
             // NOTE(mips64r6) matches C toolchain

library/std/src/os/linux/raw.rs

@@ -94,7 +94,7 @@ mod arch {
     }
 }
 
-#[cfg(target_arch = "mips")]
+#[cfg(any(target_arch = "mips", target_arch = "mips32r6"))]
 mod arch {
     use crate::os::raw::{c_long, c_ulong};
 
@@ -233,6 +233,7 @@ mod arch {
 #[cfg(any(
     target_arch = "loongarch64",
     target_arch = "mips64",
+    target_arch = "mips64r6",
     target_arch = "s390x",
     target_arch = "sparc64",
     target_arch = "riscv64",

library/std/src/sync/mpmc/utils.rs

@@ -35,7 +35,9 @@ use crate::ops::{Deref, DerefMut};
     any(
         target_arch = "arm",
         target_arch = "mips",
+        target_arch = "mips32r6",
         target_arch = "mips64",
+        target_arch = "mips64r6",
         target_arch = "riscv64",
     ),
     repr(align(32))
@@ -59,7 +61,9 @@ use crate::ops::{Deref, DerefMut};
         target_arch = "powerpc64",
         target_arch = "arm",
         target_arch = "mips",
+        target_arch = "mips32r6",
         target_arch = "mips64",
+        target_arch = "mips64r6",
         target_arch = "riscv64",
         target_arch = "s390x",
     )),

library/std/src/sys/common/alloc.rs

@@ -9,6 +9,7 @@ use crate::ptr;
     target_arch = "arm",
     target_arch = "m68k",
     target_arch = "mips",
+    target_arch = "mips32r6",
     target_arch = "powerpc",
     target_arch = "powerpc64",
     target_arch = "sparc",
@@ -24,6 +25,7 @@ pub const MIN_ALIGN: usize = 8;
     target_arch = "aarch64",
     target_arch = "loongarch64",
     target_arch = "mips64",
+    target_arch = "mips64r6",
     target_arch = "s390x",
     target_arch = "sparc64",
     target_arch = "riscv64",

library/std/src/sys/personality/gcc.rs

@@ -59,7 +59,12 @@ const UNWIND_DATA_REG: (i32, i32) = (0, 1); // R0, R1 / X0, X1
 #[cfg(target_arch = "m68k")]
 const UNWIND_DATA_REG: (i32, i32) = (0, 1); // D0, D1
 
-#[cfg(any(target_arch = "mips", target_arch = "mips64"))]
+#[cfg(any(
+    target_arch = "mips",
+    target_arch = "mips32r6",
+    target_arch = "mips64",
+    target_arch = "mips64r6"
+))]
 const UNWIND_DATA_REG: (i32, i32) = (4, 5); // A0, A1
 
 #[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))]

library/unwind/src/libunwind.rs

@@ -51,10 +51,10 @@ pub const unwinder_private_data_size: usize = 5;
 #[cfg(target_arch = "m68k")]
 pub const unwinder_private_data_size: usize = 2;
 
-#[cfg(target_arch = "mips")]
+#[cfg(any(target_arch = "mips", target_arch = "mips32r6"))]
 pub const unwinder_private_data_size: usize = 2;
 
-#[cfg(target_arch = "mips64")]
+#[cfg(any(target_arch = "mips64", target_arch = "mips64r6"))]
 pub const unwinder_private_data_size: usize = 2;
 
 #[cfg(any(target_arch = "powerpc", target_arch = "powerpc64"))]

src/bootstrap/lib.rs

@@ -133,7 +133,12 @@ const EXTRA_CHECK_CFGS: &[(Option<Mode>, &'static str, Option<&[&'static str]>)]
     /* Extra values not defined in the built-in targets yet, but used in std */
     (Some(Mode::Std), "target_env", Some(&["libnx"])),
     // (Some(Mode::Std), "target_os", Some(&[])),
-    (Some(Mode::Std), "target_arch", Some(&["asmjs", "spirv", "nvptx", "xtensa"])),
+    // #[cfg(bootstrap)] mips32r6, mips64r6
+    (
+        Some(Mode::Std),
+        "target_arch",
+        Some(&["asmjs", "spirv", "nvptx", "xtensa", "mips32r6", "mips64r6"]),
+    ),
     /* Extra names used by dependencies */
     // FIXME: Used by serde_json, but we should not be triggering on external dependencies.
     (Some(Mode::Rustc), "no_btreemap_remove_entry", None),

src/librustdoc/clean/cfg.rs

@@ -520,7 +520,9 @@ impl<'a> fmt::Display for Display<'a> {
                         "loongarch64" => "LoongArch LA64",
                         "m68k" => "M68k",
                         "mips" => "MIPS",
+                        "mips32r6" => "MIPS Release 6",
                         "mips64" => "MIPS-64",
+                        "mips64r6" => "MIPS-64 Release 6",
                         "msp430" => "MSP430",
                         "powerpc" => "PowerPC",
                         "powerpc64" => "PowerPC-64",

src/tools/miri/src/shims/foreign_items.rs

@@ -45,8 +45,9 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
         // List taken from `library/std/src/sys/common/alloc.rs`.
         // This list should be kept in sync with the one from libstd.
         let min_align = match this.tcx.sess.target.arch.as_ref() {
-            "x86" | "arm" | "mips" | "powerpc" | "powerpc64" | "asmjs" | "wasm32" => 8,
+            "x86" | "arm" | "mips" | "mips32r6" | "powerpc" | "powerpc64" | "asmjs" | "wasm32" => 8,
-            "x86_64" | "aarch64" | "mips64" | "s390x" | "sparc64" | "loongarch64" => 16,
+            "x86_64" | "aarch64" | "mips64" | "mips64r6" | "s390x" | "sparc64" | "loongarch64" =>
+                16,
             arch => bug!("unsupported target architecture for malloc: `{}`", arch),
         };
         // Windows always aligns, even small allocations.

tests/ui/check-cfg/compact-values.stderr

@@ -4,7 +4,7 @@ warning: unexpected `cfg` condition value
 LL | #[cfg(target(os = "linux", arch = "X"))]
    |                            ^^^^^^^^^^
    |
-   = note: expected values for `target_arch` are: `aarch64`, `arm`, `avr`, `bpf`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips64`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`
+   = note: expected values for `target_arch` are: `aarch64`, `arm`, `avr`, `bpf`, `hexagon`, `loongarch64`, `m68k`, `mips`, `mips32r6`, `mips64`, `mips64r6`, `msp430`, `nvptx64`, `powerpc`, `powerpc64`, `riscv32`, `riscv64`, `s390x`, `sparc`, `sparc64`, `wasm32`, `wasm64`, `x86`, `x86_64`
    = note: `#[warn(unexpected_cfgs)]` on by default
 
 warning: 1 warning emitted

tests/ui/simd/intrinsic/float-minmax-pass.rs

@@ -21,7 +21,7 @@ fn main() {
 
     #[cfg(not(any(target_arch = "mips", target_arch = "mips64")))]
     let nan = f32::NAN;
-    // MIPS hardware treats f32::NAN as SNAN. Clear the signaling bit.
+    // MIPS hardware except MIPS R6 treats f32::NAN as SNAN. Clear the signaling bit.
     // See https://github.com/rust-lang/rust/issues/52746.
     #[cfg(any(target_arch = "mips", target_arch = "mips64"))]
     let nan = f32::from_bits(f32::NAN.to_bits() - 1);