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Rollup merge of #138000 - RalfJung:atomic-rmw, r=Amanieu

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atomic: clarify that failing conditional RMW operations are not 'writes'

Fixes https://github.com/rust-lang/rust/issues/136669

r? ``@Amanieu``
Cc ``@rust-lang/opsem`` ``@chorman0773`` ``@gnzlbg`` ``@briansmith``
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Jacob Pratt 2025-03-07 21:57:51 -05:00 committed by GitHub
commit 8cf86cd68d
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1 changed files with 3 additions and 2 deletions
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library/core/src/sync/atomic.rs
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@ -44,8 +44,9 @@
//! The most important aspect of this model is that *data races* are undefined behavior. A data race
//! is defined as conflicting non-synchronized accesses where at least one of the accesses is
//! non-atomic. Here, accesses are *conflicting* if they affect overlapping regions of memory and at
//! least one of them is a write. They are *non-synchronized* if neither of them *happens-before*
//! the other, according to the happens-before order of the memory model.
//! least one of them is a write. (A `compare_exchange` or `compare_exchange_weak` that does not
//! succeed is not considered a write.) They are *non-synchronized* if neither of them
//! *happens-before* the other, according to the happens-before order of the memory model.
//!
//! The other possible cause of undefined behavior in the memory model are mixed-size accesses: Rust
//! inherits the C++ limitation that non-synchronized conflicting atomic accesses may not partially