Don't disable stdsimd anymore

This doesn't enable simd support. Actually using the functions will
result in a compilation error.

patches/0001-Disable-stdsimd.patch

@@ -1,67 +0,0 @@
-From 95157a64120faffebc2cc67baf65f45f992e167e Mon Sep 17 00:00:00 2001
-From: bjorn3 <bjorn3@users.noreply.github.com>
-Date: Sun, 24 Feb 2019 11:27:11 +0100
-Subject: [PATCH] Disable stdsimd
-
----
- src/libcore/lib.rs | 2 ++
- src/libstd/lib.rs  | 6 ++----
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/src/libcore/lib.rs b/src/libcore/lib.rs
-index f2165c6..cdb42c1 100644
---- a/src/libcore/lib.rs
-+++ b/src/libcore/lib.rs
-@@ -222,6 +222,7 @@ pub mod alloc;
- mod tuple;
- mod unit;
- 
-+/*
- // Pull in the `core_arch` crate directly into libcore. The contents of
- // `core_arch` are in a different repository: rust-lang/stdarch.
- //
-@@ -235,3 +236,4 @@ mod core_arch;
- 
- #[stable(feature = "simd_arch", since = "1.27.0")]
- pub use core_arch::arch;
-+*/
-diff --git a/src/libstd/lib.rs b/src/libstd/lib.rs
-index 6dd3a6c..c7401e2 100644
---- a/src/libstd/lib.rs
-+++ b/src/libstd/lib.rs
-@@ -291,7 +291,6 @@
- #![feature(slice_patterns)]
- #![feature(staged_api)]
- #![feature(std_internals)]
--#![feature(stdsimd)]
- #![feature(stmt_expr_attributes)]
- #![feature(str_internals)]
- #![feature(thread_local)]
-@@ -357,9 +356,6 @@ pub mod prelude;
- // Public module declarations and re-exports
- #[stable(feature = "rust1", since = "1.0.0")]
- pub use core::any;
--#[stable(feature = "simd_arch", since = "1.27.0")]
--#[doc(no_inline)]
--pub use core::arch;
- #[stable(feature = "rust1", since = "1.0.0")]
- pub use core::cell;
- #[stable(feature = "rust1", since = "1.0.0")]
-@@ -489,6 +485,7 @@ mod memchr;
- // compiler
- pub mod rt;
- 
-+/*
- // Pull in the `std_detect` crate directly into libstd. The contents of
- // `std_detect` are in a different repository: rust-lang/stdarch.
- //
-@@ -505,6 +502,7 @@ mod std_detect;
- #[unstable(feature = "stdsimd", issue = "48556")]
- #[cfg(not(test))]
- pub use std_detect::detect;
-+*/
- 
- // Include a number of private modules that exist solely to provide
- // the rustdoc documentation for primitive types. Using `include!`
--- 
-2.17.2 (Apple Git-113)

src/base.rs

@@ -656,7 +656,58 @@ fn trans_stmt<'a, 'tcx: 'a>(
         | StatementKind::Retag { .. }
         | StatementKind::AscribeUserType(..) => {}
 
-        StatementKind::InlineAsm { .. } => unimpl!("Inline assembly is not supported"),
+        StatementKind::InlineAsm(asm) => {
+            use syntax::ast::Name;
+            let InlineAsm { asm, outputs: _, inputs: _ } = &**asm;
+            let rustc::hir::InlineAsm {
+                asm: asm_code, // Name
+                outputs, // Vec<Name>
+                inputs, // Vec<Name>
+                clobbers, // Vec<Name>
+                volatile, // bool
+                alignstack, // bool
+                dialect, // syntax::ast::AsmDialect
+                asm_str_style: _,
+                ctxt: _,
+            } = asm;
+            match &*asm_code.as_str() {
+                "cpuid" | "cpuid\n" => {
+                    assert_eq!(inputs, &[Name::intern("{eax}"), Name::intern("{ecx}")]);
+
+                    assert_eq!(outputs.len(), 4);
+                    for (i, c) in (&["={eax}", "={ebx}", "={ecx}", "={edx}"]).iter().enumerate() {
+                        assert_eq!(&outputs[i].constraint.as_str(), c);
+                        assert!(!outputs[i].is_rw);
+                        assert!(!outputs[i].is_indirect);
+                    }
+
+                    assert_eq!(clobbers, &[Name::intern("rbx")]);
+
+                    assert!(!volatile);
+                    assert!(!alignstack);
+
+                    crate::trap::trap_unimplemented(fx, "__cpuid_count arch intrinsic is not supported");
+                }
+                "xgetbv" => {
+                    assert_eq!(inputs, &[Name::intern("{ecx}")]);
+
+                    assert_eq!(outputs.len(), 2);
+                    for (i, c) in (&["={eax}", "={edx}"]).iter().enumerate() {
+                        assert_eq!(&outputs[i].constraint.as_str(), c);
+                        assert!(!outputs[i].is_rw);
+                        assert!(!outputs[i].is_indirect);
+                    }
+
+                    assert_eq!(clobbers, &[]);
+
+                    assert!(!volatile);
+                    assert!(!alignstack);
+
+                    crate::trap::trap_unimplemented(fx, "_xgetbv arch intrinsic is not supported");
+                }
+                _ => unimpl!("Inline assembly is not supported"),
+            }
+        }
     }
 }
 

src/lib.rs

@@ -43,6 +43,7 @@ mod linkage;
 mod main_shim;
 mod metadata;
 mod pretty_clif;
+mod target_features_whitelist;
 mod trap;
 mod unimpl;
 mod unsize;
@@ -164,7 +165,21 @@ impl CodegenBackend for CraneliftCodegenBackend {
         rustc_codegen_utils::symbol_names::provide(providers);
         rustc_codegen_ssa::back::symbol_export::provide(providers);
 
-        providers.target_features_whitelist = |tcx, _cnum| tcx.arena.alloc(FxHashMap::default());
+        providers.target_features_whitelist = |tcx, cnum| {
+            assert_eq!(cnum, LOCAL_CRATE);
+            if tcx.sess.opts.actually_rustdoc {
+                // rustdoc needs to be able to document functions that use all the features, so
+                // whitelist them all
+                 tcx.arena.alloc(target_features_whitelist::all_known_features()
+                    .map(|(a, b)| (a.to_string(), b))
+                    .collect())
+            } else {
+                tcx.arena.alloc(target_features_whitelist::target_feature_whitelist(tcx.sess)
+                    .iter()
+                    .map(|&(a, b)| (a.to_string(), b))
+                    .collect())
+            }
+        };
     }
     fn provide_extern(&self, providers: &mut Providers) {
         rustc_codegen_ssa::back::symbol_export::provide_extern(providers);

src/target_features_whitelist.rs

@@ -0,0 +1,142 @@
+use syntax::symbol::{sym, Symbol};
+
+use rustc::session::Session;
+
+// Copied from https://github.com/rust-lang/rust/blob/f69b07144a151f46aaee1b6230ba4160e9394562/src/librustc_codegen_llvm/llvm_util.rs#L93-L264
+
+// WARNING: the features after applying `to_llvm_feature` must be known
+// to LLVM or the feature detection code will walk past the end of the feature
+// array, leading to crashes.
+
+const ARM_WHITELIST: &[(&str, Option<Symbol>)] = &[
+    ("aclass", Some(sym::arm_target_feature)),
+    ("mclass", Some(sym::arm_target_feature)),
+    ("rclass", Some(sym::arm_target_feature)),
+    ("dsp", Some(sym::arm_target_feature)),
+    ("neon", Some(sym::arm_target_feature)),
+    ("v5te", Some(sym::arm_target_feature)),
+    ("v6", Some(sym::arm_target_feature)),
+    ("v6k", Some(sym::arm_target_feature)),
+    ("v6t2", Some(sym::arm_target_feature)),
+    ("v7", Some(sym::arm_target_feature)),
+    ("v8", Some(sym::arm_target_feature)),
+    ("vfp2", Some(sym::arm_target_feature)),
+    ("vfp3", Some(sym::arm_target_feature)),
+    ("vfp4", Some(sym::arm_target_feature)),
+];
+
+const AARCH64_WHITELIST: &[(&str, Option<Symbol>)] = &[
+    ("fp", Some(sym::aarch64_target_feature)),
+    ("neon", Some(sym::aarch64_target_feature)),
+    ("sve", Some(sym::aarch64_target_feature)),
+    ("crc", Some(sym::aarch64_target_feature)),
+    ("crypto", Some(sym::aarch64_target_feature)),
+    ("ras", Some(sym::aarch64_target_feature)),
+    ("lse", Some(sym::aarch64_target_feature)),
+    ("rdm", Some(sym::aarch64_target_feature)),
+    ("fp16", Some(sym::aarch64_target_feature)),
+    ("rcpc", Some(sym::aarch64_target_feature)),
+    ("dotprod", Some(sym::aarch64_target_feature)),
+    ("v8.1a", Some(sym::aarch64_target_feature)),
+    ("v8.2a", Some(sym::aarch64_target_feature)),
+    ("v8.3a", Some(sym::aarch64_target_feature)),
+];
+
+const X86_WHITELIST: &[(&str, Option<Symbol>)] = &[
+    ("adx", Some(sym::adx_target_feature)),
+    ("aes", None),
+    ("avx", None),
+    ("avx2", None),
+    ("avx512bw", Some(sym::avx512_target_feature)),
+    ("avx512cd", Some(sym::avx512_target_feature)),
+    ("avx512dq", Some(sym::avx512_target_feature)),
+    ("avx512er", Some(sym::avx512_target_feature)),
+    ("avx512f", Some(sym::avx512_target_feature)),
+    ("avx512ifma", Some(sym::avx512_target_feature)),
+    ("avx512pf", Some(sym::avx512_target_feature)),
+    ("avx512vbmi", Some(sym::avx512_target_feature)),
+    ("avx512vl", Some(sym::avx512_target_feature)),
+    ("avx512vpopcntdq", Some(sym::avx512_target_feature)),
+    ("bmi1", None),
+    ("bmi2", None),
+    ("cmpxchg16b", Some(sym::cmpxchg16b_target_feature)),
+    ("f16c", Some(sym::f16c_target_feature)),
+    ("fma", None),
+    ("fxsr", None),
+    ("lzcnt", None),
+    ("mmx", Some(sym::mmx_target_feature)),
+    ("movbe", Some(sym::movbe_target_feature)),
+    ("pclmulqdq", None),
+    ("popcnt", None),
+    ("rdrand", None),
+    ("rdseed", None),
+    ("rtm", Some(sym::rtm_target_feature)),
+    ("sha", None),
+    ("sse", None),
+    ("sse2", None),
+    ("sse3", None),
+    ("sse4.1", None),
+    ("sse4.2", None),
+    ("sse4a", Some(sym::sse4a_target_feature)),
+    ("ssse3", None),
+    ("tbm", Some(sym::tbm_target_feature)),
+    ("xsave", None),
+    ("xsavec", None),
+    ("xsaveopt", None),
+    ("xsaves", None),
+];
+
+const HEXAGON_WHITELIST: &[(&str, Option<Symbol>)] = &[
+    ("hvx", Some(sym::hexagon_target_feature)),
+    ("hvx-double", Some(sym::hexagon_target_feature)),
+];
+
+const POWERPC_WHITELIST: &[(&str, Option<Symbol>)] = &[
+    ("altivec", Some(sym::powerpc_target_feature)),
+    ("power8-altivec", Some(sym::powerpc_target_feature)),
+    ("power9-altivec", Some(sym::powerpc_target_feature)),
+    ("power8-vector", Some(sym::powerpc_target_feature)),
+    ("power9-vector", Some(sym::powerpc_target_feature)),
+    ("vsx", Some(sym::powerpc_target_feature)),
+];
+
+const MIPS_WHITELIST: &[(&str, Option<Symbol>)] = &[
+    ("fp64", Some(sym::mips_target_feature)),
+    ("msa", Some(sym::mips_target_feature)),
+];
+
+const WASM_WHITELIST: &[(&str, Option<Symbol>)] = &[
+    ("simd128", Some(sym::wasm_target_feature)),
+    ("atomics", Some(sym::wasm_target_feature)),
+];
+
+/// When rustdoc is running, provide a list of all known features so that all their respective
+/// primitives may be documented.
+///
+/// IMPORTANT: If you're adding another whitelist to the above lists, make sure to add it to this
+/// iterator!
+pub fn all_known_features() -> impl Iterator<Item=(&'static str, Option<Symbol>)> {
+    ARM_WHITELIST.iter().cloned()
+        .chain(AARCH64_WHITELIST.iter().cloned())
+        .chain(X86_WHITELIST.iter().cloned())
+        .chain(HEXAGON_WHITELIST.iter().cloned())
+        .chain(POWERPC_WHITELIST.iter().cloned())
+        .chain(MIPS_WHITELIST.iter().cloned())
+        .chain(WASM_WHITELIST.iter().cloned())
+}
+
+pub fn target_feature_whitelist(sess: &Session)
+    -> &'static [(&'static str, Option<Symbol>)]
+{
+    match &*sess.target.target.arch {
+        "arm" => ARM_WHITELIST,
+        "aarch64" => AARCH64_WHITELIST,
+        "x86" | "x86_64" => X86_WHITELIST,
+        "hexagon" => HEXAGON_WHITELIST,
+        "mips" | "mips64" => MIPS_WHITELIST,
+        "powerpc" | "powerpc64" => POWERPC_WHITELIST,
+        // wasm32 on emscripten does not support these target features
+        "wasm32" if !sess.target.target.options.is_like_emscripten => WASM_WHITELIST,
+        _ => &[],
+    }
+}

src/trap.rs

@@ -24,32 +24,48 @@ fn codegen_print(fx: &mut FunctionCx<'_, '_, impl cranelift_module::Backend>, ms
     fx.bcx.ins().call(puts, &[msg_ptr]);
 }
 
+/// Use this when `rustc_codegen_llvm` would insert a call to the panic handler.
+///
 /// Trap code: user0
 pub fn trap_panic(fx: &mut FunctionCx<'_, '_, impl cranelift_module::Backend>, msg: impl AsRef<str>) {
     codegen_print(fx, msg.as_ref());
     fx.bcx.ins().trap(TrapCode::User(0));
 }
 
+/// Use this for example when a function call should never return. This will fill the current block,
+/// so you can **not** add instructions to it afterwards.
+///
 /// Trap code: user65535
 pub fn trap_unreachable(fx: &mut FunctionCx<'_, '_, impl cranelift_module::Backend>, msg: impl AsRef<str>) {
     codegen_print(fx, msg.as_ref());
     fx.bcx.ins().trap(TrapCode::User(!0));
 }
 
+/// Use this when something is unimplemented, but `libcore` or `libstd` requires it to codegen.
+/// Unlike `trap_unreachable` this will not fill the current block, so you **must** add instructions
+/// to it afterwards.
+///
 /// Trap code: user65535
-pub fn trap_unreachable_ret_value<'tcx>(fx: &mut FunctionCx<'_, 'tcx, impl cranelift_module::Backend>, dest_layout: TyLayout<'tcx>, msg: impl AsRef<str>) -> CValue<'tcx> {
+pub fn trap_unimplemented(fx: &mut FunctionCx<'_, '_, impl cranelift_module::Backend>, msg: impl AsRef<str>) {
     codegen_print(fx, msg.as_ref());
     let true_ = fx.bcx.ins().iconst(types::I32, 1);
     fx.bcx.ins().trapnz(true_, TrapCode::User(!0));
+}
+
+/// Like `trap_unreachable` but returns a fake value of the specified type.
+///
+/// Trap code: user65535
+pub fn trap_unreachable_ret_value<'tcx>(fx: &mut FunctionCx<'_, 'tcx, impl cranelift_module::Backend>, dest_layout: TyLayout<'tcx>, msg: impl AsRef<str>) -> CValue<'tcx> {
+    trap_unimplemented(fx, msg);
     let zero = fx.bcx.ins().iconst(fx.pointer_type, 0);
     CValue::by_ref(zero, dest_layout)
 }
 
+/// Like `trap_unreachable` but returns a fake place for the specified type.
+///
 /// Trap code: user65535
 pub fn trap_unreachable_ret_place<'tcx>(fx: &mut FunctionCx<'_, 'tcx, impl cranelift_module::Backend>, dest_layout: TyLayout<'tcx>, msg: impl AsRef<str>) -> CPlace<'tcx> {
-    codegen_print(fx, msg.as_ref());
-    let true_ = fx.bcx.ins().iconst(types::I32, 1);
-    fx.bcx.ins().trapnz(true_, TrapCode::User(!0));
+    trap_unimplemented(fx, msg);
     let zero = fx.bcx.ins().iconst(fx.pointer_type, 0);
     CPlace::for_addr(zero, dest_layout)
 }