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Add basic inline asm support for x86_64
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commit
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@ -76,5 +76,8 @@ function jit_calc() {
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* Good non-rust abi support ([several problems](https://github.com/bjorn3/rustc_codegen_cranelift/issues/10))
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* Proc macros
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* Inline assembly ([no cranelift support](https://github.com/bytecodealliance/wasmtime/issues/1041), not coming soon)
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* Inline assembly ([no cranelift support](https://github.com/bytecodealliance/wasmtime/issues/1041)
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* On Linux there is support for invoking an external assembler for `global_asm!` and `asm!`.
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`llvm_asm!` will remain unimplemented forever. `asm!` doesn't yet support reg classes. You
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have to specify specific registers instead.
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* SIMD ([tracked here](https://github.com/bjorn3/rustc_codegen_cranelift/issues/171), some basic things work)
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29
src/base.rs
29
src/base.rs
@ -36,6 +36,7 @@ pub(crate) fn trans_fn<'tcx, B: Backend + 'static>(
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let mut fx = FunctionCx {
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tcx,
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module: &mut cx.module,
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global_asm: &mut cx.global_asm,
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pointer_type,
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instance,
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@ -307,24 +308,26 @@ fn codegen_fn_content(fx: &mut FunctionCx<'_, '_, impl Backend>) {
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TerminatorKind::InlineAsm {
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template,
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operands,
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options: _,
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options,
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destination,
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line_spans: _,
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} => {
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match template {
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&[] => {
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assert_eq!(operands, &[]);
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match *destination {
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Some(destination) => {
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let destination_block = fx.get_block(destination);
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fx.bcx.ins().jump(destination_block, &[]);
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}
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None => bug!(),
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}
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crate::inline_asm::codegen_inline_asm(
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fx,
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bb_data.terminator().source_info.span,
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template,
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operands,
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*options,
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);
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// Black box
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match *destination {
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Some(destination) => {
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let destination_block = fx.get_block(destination);
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fx.bcx.ins().jump(destination_block, &[]);
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}
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None => {
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crate::trap::trap_unreachable(fx, "[corruption] Returned from noreturn inline asm");
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}
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_ => fx.tcx.sess.span_fatal(bb_data.terminator().source_info.span, "Inline assembly is not supported"),
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}
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}
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TerminatorKind::Resume | TerminatorKind::Abort => {
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@ -254,6 +254,7 @@ pub(crate) struct FunctionCx<'clif, 'tcx, B: Backend + 'static> {
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// FIXME use a reference to `CodegenCx` instead of `tcx`, `module` and `constants` and `caches`
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pub(crate) tcx: TyCtxt<'tcx>,
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pub(crate) module: &'clif mut Module<B>,
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pub(crate) global_asm: &'clif mut String,
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pub(crate) pointer_type: Type, // Cached from module
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pub(crate) instance: Instance<'tcx>,
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@ -273,7 +273,7 @@ fn codegen_global_asm(tcx: TyCtxt<'_>, cgu_name: &str, global_asm: &str) {
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}
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// FIXME fix linker error on macOS
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tcx.sess.fatal("global_asm! is not yet supported on macOS and Windows");
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tcx.sess.fatal("asm! and global_asm! are not yet supported on macOS and Windows");
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}
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let assembler = crate::toolchain::get_toolchain_binary(tcx.sess, "as");
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220
src/inline_asm.rs
Normal file
220
src/inline_asm.rs
Normal file
@ -0,0 +1,220 @@
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use crate::prelude::*;
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use std::fmt::Write;
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use rustc_ast::ast::{InlineAsmTemplatePiece, InlineAsmOptions};
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use rustc_middle::mir::InlineAsmOperand;
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use rustc_target::asm::*;
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pub(crate) fn codegen_inline_asm<'tcx>(
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fx: &mut FunctionCx<'_, 'tcx, impl Backend>,
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_span: Span,
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template: &[InlineAsmTemplatePiece],
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operands: &[InlineAsmOperand<'tcx>],
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options: InlineAsmOptions,
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) {
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// FIXME add .eh_frame unwind info directives
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if template.is_empty() {
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// Black box
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return;
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}
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let mut slot_size = Size::from_bytes(0);
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let mut clobbered_regs = Vec::new();
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let mut inputs = Vec::new();
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let mut outputs = Vec::new();
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let mut new_slot = |reg_class: InlineAsmRegClass| {
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let reg_size = reg_class
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.supported_types(InlineAsmArch::X86_64)
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.iter()
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.map(|(ty, _)| ty.size())
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.max()
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.unwrap();
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let align = rustc_target::abi::Align::from_bytes(reg_size.bytes()).unwrap();
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slot_size = slot_size.align_to(align);
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let offset = slot_size;
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slot_size += reg_size;
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offset
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};
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// FIXME overlap input and output slots to save stack space
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for operand in operands {
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match *operand {
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InlineAsmOperand::In { reg, ref value } => {
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let reg = expect_reg(reg);
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clobbered_regs.push((reg, new_slot(reg.reg_class())));
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inputs.push((reg, new_slot(reg.reg_class()), crate::base::trans_operand(fx, value).load_scalar(fx)));
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}
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InlineAsmOperand::Out { reg, late: _, place } => {
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let reg = expect_reg(reg);
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clobbered_regs.push((reg, new_slot(reg.reg_class())));
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if let Some(place) = place {
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outputs.push((reg, new_slot(reg.reg_class()), crate::base::trans_place(fx, place)));
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}
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}
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InlineAsmOperand::InOut { reg, late: _, ref in_value, out_place } => {
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let reg = expect_reg(reg);
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clobbered_regs.push((reg, new_slot(reg.reg_class())));
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inputs.push((reg, new_slot(reg.reg_class()), crate::base::trans_operand(fx, in_value).load_scalar(fx)));
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if let Some(out_place) = out_place {
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outputs.push((reg, new_slot(reg.reg_class()), crate::base::trans_place(fx, out_place)));
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}
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}
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InlineAsmOperand::Const { value: _ } => todo!(),
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InlineAsmOperand::SymFn { value: _ } => todo!(),
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InlineAsmOperand::SymStatic { def_id: _ } => todo!(),
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}
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}
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let asm_name = format!("{}__inline_asm_{}", fx.tcx.symbol_name(fx.instance).name, /*FIXME*/0);
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let generated_asm = generate_asm_wrapper(&asm_name, InlineAsmArch::X86_64, options, template, clobbered_regs, &inputs, &outputs);
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fx.global_asm.push_str(&generated_asm);
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call_inline_asm(fx, &asm_name, slot_size, inputs, outputs);
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}
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fn generate_asm_wrapper(
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asm_name: &str,
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arch: InlineAsmArch,
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options: InlineAsmOptions,
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template: &[InlineAsmTemplatePiece],
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clobbered_regs: Vec<(InlineAsmReg, Size)>,
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inputs: &[(InlineAsmReg, Size, Value)],
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outputs: &[(InlineAsmReg, Size, CPlace<'_>)],
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) -> String {
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let mut generated_asm = String::new();
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writeln!(generated_asm, ".globl {}", asm_name).unwrap();
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writeln!(generated_asm, ".type {},@function", asm_name).unwrap();
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writeln!(generated_asm, ".section .text.{},\"ax\",@progbits", asm_name).unwrap();
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writeln!(generated_asm, "{}:", asm_name).unwrap();
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generated_asm.push_str(".intel_syntax noprefix\n");
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generated_asm.push_str(" push rbp\n");
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generated_asm.push_str(" mov rbp,rdi\n");
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// Save clobbered registers
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if !options.contains(InlineAsmOptions::NORETURN) {
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// FIXME skip registers saved by the calling convention
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for &(reg, offset) in &clobbered_regs {
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save_register(&mut generated_asm, arch, reg, offset);
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}
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}
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// Write input registers
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for &(reg, offset, _value) in inputs {
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restore_register(&mut generated_asm, arch, reg, offset);
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}
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if options.contains(InlineAsmOptions::ATT_SYNTAX) {
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generated_asm.push_str(".att_syntax\n");
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}
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// The actual inline asm
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for piece in template {
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match piece {
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InlineAsmTemplatePiece::String(s) => {
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generated_asm.push_str(s);
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}
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InlineAsmTemplatePiece::Placeholder { operand_idx: _, modifier: _, span: _ } => todo!(),
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}
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}
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generated_asm.push('\n');
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if options.contains(InlineAsmOptions::ATT_SYNTAX) {
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generated_asm.push_str(".intel_syntax noprefix\n");
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}
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if !options.contains(InlineAsmOptions::NORETURN) {
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// Read output registers
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for &(reg, offset, _place) in outputs {
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save_register(&mut generated_asm, arch, reg, offset);
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}
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// Restore clobbered registers
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for &(reg, offset) in clobbered_regs.iter().rev() {
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restore_register(&mut generated_asm, arch, reg, offset);
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}
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generated_asm.push_str(" pop rbp\n");
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generated_asm.push_str(" ret\n");
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} else {
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generated_asm.push_str(" ud2\n");
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}
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generated_asm.push_str(".att_syntax\n");
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writeln!(generated_asm, ".size {name}, .-{name}", name=asm_name).unwrap();
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generated_asm.push_str(".text\n");
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generated_asm.push_str("\n\n");
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generated_asm
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}
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fn call_inline_asm<'tcx>(
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fx: &mut FunctionCx<'_, 'tcx, impl Backend>,
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asm_name: &str,
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slot_size: Size,
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inputs: Vec<(InlineAsmReg, Size, Value)>,
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outputs: Vec<(InlineAsmReg, Size, CPlace<'tcx>)>,
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) {
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let stack_slot = fx.bcx.func.create_stack_slot(StackSlotData {
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kind: StackSlotKind::ExplicitSlot,
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offset: None,
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size: u32::try_from(slot_size.bytes()).unwrap(),
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});
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#[cfg(debug_assertions)]
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fx.add_comment(stack_slot, "inline asm scratch slot");
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let inline_asm_func = fx.module.declare_function(asm_name, Linkage::Import, &Signature {
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call_conv: CallConv::SystemV,
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params: vec![AbiParam::new(fx.pointer_type)],
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returns: vec![],
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}).unwrap();
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let inline_asm_func = fx.module.declare_func_in_func(inline_asm_func, &mut fx.bcx.func);
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#[cfg(debug_assertions)]
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fx.add_comment(inline_asm_func, asm_name);
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for (_reg, offset, value) in inputs {
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fx.bcx.ins().stack_store(value, stack_slot, i32::try_from(offset.bytes()).unwrap());
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}
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let stack_slot_addr = fx.bcx.ins().stack_addr(fx.pointer_type, stack_slot, 0);
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fx.bcx.ins().call(inline_asm_func, &[stack_slot_addr]);
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for (_reg, offset, place) in outputs {
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let ty = fx.clif_type(place.layout().ty).unwrap();
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let value = fx.bcx.ins().stack_load(ty, stack_slot, i32::try_from(offset.bytes()).unwrap());
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place.write_cvalue(fx, CValue::by_val(value, place.layout()));
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}
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}
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fn expect_reg(reg_or_class: InlineAsmRegOrRegClass) -> InlineAsmReg {
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match reg_or_class {
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InlineAsmRegOrRegClass::Reg(reg) => reg,
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InlineAsmRegOrRegClass::RegClass(class) => unimplemented!("{:?}", class),
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}
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}
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fn save_register(generated_asm: &mut String, arch: InlineAsmArch, reg: InlineAsmReg, offset: Size) {
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match arch {
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InlineAsmArch::X86_64 => {
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write!(generated_asm, " mov [rbp+0x{:x}], ", offset.bytes()).unwrap();
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reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();
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generated_asm.push('\n');
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}
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_ => unimplemented!("save_register for {:?}", arch),
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}
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}
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fn restore_register(generated_asm: &mut String, arch: InlineAsmArch, reg: InlineAsmReg, offset: Size) {
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match arch {
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InlineAsmArch::X86_64 => {
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generated_asm.push_str(" mov ");
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reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();
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writeln!(generated_asm, ", [rbp+0x{:x}]", offset.bytes()).unwrap();
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}
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_ => unimplemented!("restore_register for {:?}", arch),
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}
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}
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@ -55,6 +55,7 @@ mod constant;
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mod debuginfo;
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mod discriminant;
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mod driver;
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mod inline_asm;
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mod intrinsics;
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mod linkage;
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mod main_shim;
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