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tests: update check for inferred nneg on zext
This was broken by upstream llvm/llvm-project@dc6d077396. It's easy enough to use a regex match to support both, so we do that. r? @nikic @rustbot label: +llvm-main
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@ -31,7 +31,7 @@ pub unsafe fn unchecked_shl_unsigned_smaller(a: u16, b: u32) -> u16 {
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#[no_mangle]
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#[no_mangle]
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pub unsafe fn unchecked_shl_unsigned_bigger(a: u64, b: u32) -> u64 {
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pub unsafe fn unchecked_shl_unsigned_bigger(a: u64, b: u32) -> u64 {
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// CHECK-NOT: assume
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// CHECK-NOT: assume
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// CHECK: %[[EXT:.+]] = zext i32 %b to i64
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// CHECK: %[[EXT:.+]] = zext{{( nneg)?}} i32 %b to i64
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// CHECK: shl i64 %a, %[[EXT]]
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// CHECK: shl i64 %a, %[[EXT]]
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a.unchecked_shl(b)
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a.unchecked_shl(b)
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}
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}
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@ -63,7 +63,7 @@ pub unsafe fn unchecked_shr_signed_smaller(a: i16, b: u32) -> i16 {
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#[no_mangle]
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#[no_mangle]
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pub unsafe fn unchecked_shr_signed_bigger(a: i64, b: u32) -> i64 {
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pub unsafe fn unchecked_shr_signed_bigger(a: i64, b: u32) -> i64 {
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// CHECK-NOT: assume
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// CHECK-NOT: assume
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// CHECK: %[[EXT:.+]] = zext i32 %b to i64
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// CHECK: %[[EXT:.+]] = zext{{( nneg)?}} i32 %b to i64
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// CHECK: ashr i64 %a, %[[EXT]]
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// CHECK: ashr i64 %a, %[[EXT]]
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a.unchecked_shr(b)
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a.unchecked_shr(b)
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}
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}
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