Add Vxworks RISC-V targets

This commit is contained in:
B I Mohammed Abbas 2024-09-20 16:15:49 +05:30
parent df7f77811c
commit 485e90f1a7
6 changed files with 60 additions and 0 deletions

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@ -1842,6 +1842,8 @@ supported_targets! {
("powerpc-wrs-vxworks", powerpc_wrs_vxworks), ("powerpc-wrs-vxworks", powerpc_wrs_vxworks),
("powerpc-wrs-vxworks-spe", powerpc_wrs_vxworks_spe), ("powerpc-wrs-vxworks-spe", powerpc_wrs_vxworks_spe),
("powerpc64-wrs-vxworks", powerpc64_wrs_vxworks), ("powerpc64-wrs-vxworks", powerpc64_wrs_vxworks),
("riscv32-wrs-vxworks", riscv32_wrs_vxworks),
("riscv64-wrs-vxworks", riscv64_wrs_vxworks),
("aarch64-kmc-solid_asp3", aarch64_kmc_solid_asp3), ("aarch64-kmc-solid_asp3", aarch64_kmc_solid_asp3),
("armv7a-kmc-solid_asp3-eabi", armv7a_kmc_solid_asp3_eabi), ("armv7a-kmc-solid_asp3-eabi", armv7a_kmc_solid_asp3_eabi),

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@ -0,0 +1,24 @@
use crate::spec::{base, StackProbeType, Target, TargetOptions};
pub(crate) fn target() -> Target {
Target {
llvm_target: "riscv32".into(),
metadata: crate::spec::TargetMetadata {
description: None,
tier: Some(3),
host_tools: Some(false),
std: None, // STD is a work in progress for this target arch
},
pointer_width: 32,
data_layout: "e-m:e-p:32:32-i64:64-n32-S128".into(),
arch: "riscv32".into(),
options: TargetOptions {
cpu: "generic-rv32".into(),
llvm_abiname: "ilp32d".into(),
max_atomic_width: Some(32),
features: "+m,+a,+f,+d,+c,+zicsr".into(),
stack_probes: StackProbeType::Inline,
..base::vxworks::opts()
},
}
}

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@ -0,0 +1,24 @@
use crate::spec::{base, StackProbeType, Target, TargetOptions};
pub(crate) fn target() -> Target {
Target {
llvm_target: "riscv64".into(),
metadata: crate::spec::TargetMetadata {
description: None,
tier: Some(3),
host_tools: Some(false),
std: None, // STD is a work in progress for this target arch
},
pointer_width: 64,
data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(),
arch: "riscv64".into(),
options: TargetOptions {
cpu: "generic-rv64".into(),
llvm_abiname: "lp64d".into(),
max_atomic_width: Some(64),
features: "+m,+a,+f,+d,+c,+zicsr".into(),
stack_probes: StackProbeType::Inline,
..base::vxworks::opts()
},
}
}

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@ -358,12 +358,14 @@ target | std | host | notes
[`riscv32imc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF [`riscv32imc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
[`riscv32imac-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF [`riscv32imac-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
[`riscv32imafc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF [`riscv32imafc-esp-espidf`](platform-support/esp-idf.md) | ✓ | | RISC-V ESP-IDF
[`riscv32-wrs-vxworks`](platform-support/vxworks.md) | ? | |
[`riscv64gc-unknown-hermit`](platform-support/hermit.md) | ✓ | | RISC-V Hermit [`riscv64gc-unknown-hermit`](platform-support/hermit.md) | ✓ | | RISC-V Hermit
`riscv64gc-unknown-freebsd` | | | RISC-V FreeBSD `riscv64gc-unknown-freebsd` | | | RISC-V FreeBSD
`riscv64gc-unknown-fuchsia` | | | RISC-V Fuchsia `riscv64gc-unknown-fuchsia` | | | RISC-V Fuchsia
[`riscv64gc-unknown-netbsd`](platform-support/netbsd.md) | ✓ | ✓ | RISC-V NetBSD [`riscv64gc-unknown-netbsd`](platform-support/netbsd.md) | ✓ | ✓ | RISC-V NetBSD
[`riscv64gc-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/riscv64 [`riscv64gc-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/riscv64
[`riscv64-linux-android`](platform-support/android.md) | | | RISC-V 64-bit Android [`riscv64-linux-android`](platform-support/android.md) | | | RISC-V 64-bit Android
[`riscv64-wrs-vxworks`](platform-support/vxworks.md) | ? | |
`s390x-unknown-linux-musl` | | | S390x Linux (kernel 3.2, musl 1.2.3) `s390x-unknown-linux-musl` | | | S390x Linux (kernel 3.2, musl 1.2.3)
`sparc-unknown-linux-gnu` | ✓ | | 32-bit SPARC Linux `sparc-unknown-linux-gnu` | ✓ | | 32-bit SPARC Linux
[`sparc-unknown-none-elf`](./platform-support/sparc-unknown-none-elf.md) | * | | Bare 32-bit SPARC V7+ [`sparc-unknown-none-elf`](./platform-support/sparc-unknown-none-elf.md) | * | | Bare 32-bit SPARC V7+

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@ -14,6 +14,8 @@ Target triplets available:
- `powerpc-wrs-vxworks` - `powerpc-wrs-vxworks`
- `powerpc64-wrs-vxworks` - `powerpc64-wrs-vxworks`
- `powerpc-wrs-vxworks-spe` - `powerpc-wrs-vxworks-spe`
- `riscv32-wrs-vxworks`
- `riscv64-wrs-vxworks`
## Target maintainers ## Target maintainers

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@ -372,6 +372,9 @@
//@ revisions: powerpc_wrs_vxworks_spe //@ revisions: powerpc_wrs_vxworks_spe
//@ [powerpc_wrs_vxworks_spe] compile-flags: --target powerpc-wrs-vxworks-spe //@ [powerpc_wrs_vxworks_spe] compile-flags: --target powerpc-wrs-vxworks-spe
//@ [powerpc_wrs_vxworks_spe] needs-llvm-components: powerpc //@ [powerpc_wrs_vxworks_spe] needs-llvm-components: powerpc
//@ revisions: riscv32_wrs_vxworks
//@ [riscv32_wrs_vxworks] compile-flags: --target riscv32-wrs-vxworks
//@ [riscv32_wrs_vxworks] needs-llvm-components: riscv
//@ revisions: riscv32gc_unknown_linux_gnu //@ revisions: riscv32gc_unknown_linux_gnu
//@ [riscv32gc_unknown_linux_gnu] compile-flags: --target riscv32gc-unknown-linux-gnu //@ [riscv32gc_unknown_linux_gnu] compile-flags: --target riscv32gc-unknown-linux-gnu
//@ [riscv32gc_unknown_linux_gnu] needs-llvm-components: riscv //@ [riscv32gc_unknown_linux_gnu] needs-llvm-components: riscv
@ -414,6 +417,9 @@
//@ revisions: riscv64_linux_android //@ revisions: riscv64_linux_android
//@ [riscv64_linux_android] compile-flags: --target riscv64-linux-android //@ [riscv64_linux_android] compile-flags: --target riscv64-linux-android
//@ [riscv64_linux_android] needs-llvm-components: riscv //@ [riscv64_linux_android] needs-llvm-components: riscv
//@ revisions: riscv64_wrs_vxworks
//@ [riscv64_wrs_vxworks] compile-flags: --target riscv64-wrs-vxworks
//@ [riscv64_wrs_vxworks] needs-llvm-components: riscv
//@ revisions: riscv64gc_unknown_freebsd //@ revisions: riscv64gc_unknown_freebsd
//@ [riscv64gc_unknown_freebsd] compile-flags: --target riscv64gc-unknown-freebsd //@ [riscv64gc_unknown_freebsd] compile-flags: --target riscv64gc-unknown-freebsd
//@ [riscv64gc_unknown_freebsd] needs-llvm-components: riscv //@ [riscv64gc_unknown_freebsd] needs-llvm-components: riscv