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Improve documentation on success
and failure
arguments
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parent
427996a286
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@ -514,9 +514,10 @@ impl AtomicBool {
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/// the previous value. On success this value is guaranteed to be equal to `current`.
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/// the previous value. On success this value is guaranteed to be equal to `current`.
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///
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///
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/// `compare_exchange` takes two [`Ordering`] arguments to describe the memory
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/// `compare_exchange` takes two [`Ordering`] arguments to describe the memory
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/// ordering of this operation. The first describes the required ordering if the
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/// ordering of this operation. `success` describes the required ordering for the
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/// operation succeeds while the second describes the required ordering when the
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/// read-modify-write operation that takes place if the comparison with `current` succeeds.
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/// operation fails. Using [`Acquire`] as success ordering makes the store part
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/// `failure` describes the required ordering for the load operation that takes place when
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/// the comparison fails. Using [`Acquire`] as success ordering makes the store part
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// and must be equivalent to or weaker than the success ordering.
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/// and must be equivalent to or weaker than the success ordering.
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@ -572,9 +573,10 @@ impl AtomicBool {
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/// previous value.
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/// previous value.
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///
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///
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/// `compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
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/// `compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
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/// ordering of this operation. The first describes the required ordering if the
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/// ordering of this operation. `success` describes the required ordering for the
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/// operation succeeds while the second describes the required ordering when the
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/// read-modify-write operation that takes place if the comparison with `current` succeeds.
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/// operation fails. Using [`Acquire`] as success ordering makes the store part
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/// `failure` describes the required ordering for the load operation that takes place when
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/// the comparison fails. Using [`Acquire`] as success ordering makes the store part
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// and must be equivalent to or weaker than the success ordering.
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/// and must be equivalent to or weaker than the success ordering.
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@ -1138,9 +1140,10 @@ impl<T> AtomicPtr<T> {
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/// the previous value. On success this value is guaranteed to be equal to `current`.
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/// the previous value. On success this value is guaranteed to be equal to `current`.
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///
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///
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/// `compare_exchange` takes two [`Ordering`] arguments to describe the memory
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/// `compare_exchange` takes two [`Ordering`] arguments to describe the memory
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/// ordering of this operation. The first describes the required ordering if the
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/// ordering of this operation. `success` describes the required ordering for the
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/// operation succeeds while the second describes the required ordering when the
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/// read-modify-write operation that takes place if the comparison with `current` succeeds.
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/// operation fails. Using [`Acquire`] as success ordering makes the store part
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/// `failure` describes the required ordering for the load operation that takes place when
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/// the comparison fails. Using [`Acquire`] as success ordering makes the store part
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// and must be equivalent to or weaker than the success ordering.
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/// and must be equivalent to or weaker than the success ordering.
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@ -1201,9 +1204,10 @@ impl<T> AtomicPtr<T> {
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/// previous value.
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/// previous value.
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///
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///
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/// `compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
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/// `compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
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/// ordering of this operation. The first describes the required ordering if the
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/// ordering of this operation. `success` describes the required ordering for the
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/// operation succeeds while the second describes the required ordering when the
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/// read-modify-write operation that takes place if the comparison with `current` succeeds.
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/// operation fails. Using [`Acquire`] as success ordering makes the store part
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/// `failure` describes the required ordering for the load operation that takes place when
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/// the comparison fails. Using [`Acquire`] as success ordering makes the store part
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// of this operation [`Relaxed`], and using [`Release`] makes the successful load
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// [`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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/// and must be equivalent to or weaker than the success ordering.
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/// and must be equivalent to or weaker than the success ordering.
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@ -1708,9 +1712,10 @@ containing the previous value. On success this value is guaranteed to be equal t
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`current`.
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`current`.
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`compare_exchange` takes two [`Ordering`] arguments to describe the memory
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`compare_exchange` takes two [`Ordering`] arguments to describe the memory
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ordering of this operation. The first describes the required ordering if the
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ordering of this operation. `success` describes the required ordering for the
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operation succeeds while the second describes the required ordering when the
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read-modify-write operation that takes place if the comparison with `current` succeeds.
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operation fails. Using [`Acquire`] as success ordering makes the store part
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`failure` describes the required ordering for the load operation that takes place when
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the comparison fails. Using [`Acquire`] as success ordering makes the store part
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of this operation [`Relaxed`], and using [`Release`] makes the successful load
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of this operation [`Relaxed`], and using [`Release`] makes the successful load
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[`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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[`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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and must be equivalent to or weaker than the success ordering.
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and must be equivalent to or weaker than the success ordering.
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@ -1760,9 +1765,10 @@ platforms. The return value is a result indicating whether the new value was
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written and containing the previous value.
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written and containing the previous value.
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`compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
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`compare_exchange_weak` takes two [`Ordering`] arguments to describe the memory
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ordering of this operation. The first describes the required ordering if the
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ordering of this operation. `success` describes the required ordering for the
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operation succeeds while the second describes the required ordering when the
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read-modify-write operation that takes place if the comparison with `current` succeeds.
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operation fails. Using [`Acquire`] as success ordering makes the store part
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`failure` describes the required ordering for the load operation that takes place when
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the comparison fails. Using [`Acquire`] as success ordering makes the store part
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of this operation [`Relaxed`], and using [`Release`] makes the successful load
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of this operation [`Relaxed`], and using [`Release`] makes the successful load
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[`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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[`Relaxed`]. The failure ordering can only be [`SeqCst`], [`Acquire`] or [`Relaxed`]
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and must be equivalent to or weaker than the success ordering.
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and must be equivalent to or weaker than the success ordering.
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